CN-122002905-A - Electrostatic discharge protection device

CN122002905ACN 122002905 ACN122002905 ACN 122002905ACN-122002905-A

Abstract

The invention discloses an electrostatic discharge protection device, which comprises a diode, a voltage clamping element, an electronic element, a first pin and a second pin. The diode includes a first doped region of a first conductivity type and a second doped region of a second conductivity type, wherein the first conductivity type is opposite to the second conductivity type. The voltage clamping element is electrically connected with the first doped region. The electronic component comprises a first area of the first conductivity type, a second area of the second conductivity type, a third area of the first conductivity type and a fourth area of the second conductivity type. The first region is electrically connected with the second doped region, the second region is electrically connected with the first doped region and the voltage clamping element, and the fourth region is electrically connected with the voltage clamping element.

Inventors

CHEN ZHIWEI
LIN GUANYU
LIN KUNXIAN

Assignees

晶焱科技股份有限公司

Dates

Publication Date: 20260508
Application Date: 20241219
Priority Date: 20241106

Claims (14)

1. An electrostatic discharge protection device, comprising: The at least one voltage clamping device comprises: A diode including a first doped region of a first conductivity type and a second doped region of a second conductivity type opposite to the first conductivity type; A voltage clamping element having a first end and a second end, wherein the first end of the voltage clamping element is electrically connected to the first doped region; An electronic component including a first region of the first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type and a fourth region of the second conductivity type, wherein the first region, the second region, the third region and the fourth region are adjacent to each other, the second region is disposed between the first region and the third region, the third region is disposed between the second region and the fourth region, the first region is electrically connected to the second doped region, the second region is electrically connected to the first doped region and the first end of the voltage clamping element, and the fourth region is electrically connected to the second end of the voltage clamping element; A first pin electrically connected to the second doped region and the first region, and And a second pin electrically connected to the second end of the voltage clamping element and the fourth region.
2. The esd protection device of claim 1 wherein the first conductivity type is N-type and the second conductivity type is P-type.
3. The esd protection device of claim 2 wherein the first pin receives a positive pulse voltage and the second pin receives a reference voltage lower than the positive pulse voltage, an esd current flows from the first pin to the second pin through the diode and the voltage clamping element, and a first esd current flows from the second pin to the first pin through the voltage clamping element, the second region and the first region when the first pin receives a negative pulse voltage and the second pin receives a reference voltage higher than the negative pulse voltage, and a second esd current flows from the second pin to the first pin through the electronic component.
4. The esd protection device of claim 1 wherein the first conductivity type is P-type and the second conductivity type is N-type.
5. The esd protection device of claim 4 wherein the second pin receives a reference voltage and the first pin receives a negative pulse voltage lower than the reference voltage, an esd current flows from the second pin to the first pin through the voltage clamping element and the diode, and a first esd current flows from the first pin to the second pin through the first region, the second region, and the voltage clamping element when the first pin receives a positive pulse voltage and the second pin receives a reference voltage lower than the positive pulse voltage.
6. The esd protection device of claim 1 wherein the voltage clamp is a zener diode, an NPN bipolar junction transistor with an electrically floating base, an NPN bipolar junction transistor with an emitter coupled to a base, a PNP bipolar junction transistor with an electrically floating base, or a PNP bipolar junction transistor with an emitter coupled to a base.
7. The esd protection device of claim 1 wherein the at least one voltage clamping device comprises two voltage clamping devices, and the second leg of one of the two voltage clamping devices is electrically connected to the second leg of the other of the two voltage clamping devices.
8. The esd protection device of claim 1 wherein the at least one voltage clamping device comprises two voltage clamping devices, and the first pin of one of the two voltage clamping devices is electrically connected to the first pin of the other of the two voltage clamping devices.
9. The esd protection device of claim 1, wherein the fourth region is implemented with a heavily doped region, the third region is implemented with a first epitaxial region and a second epitaxial region, the second region is implemented with a first heavily doped region, the first and second epitaxial regions are sequentially disposed on the heavily doped region, the first doped well region is disposed in the second epitaxial region, a second heavily doped region of the first and second conductivity types is disposed in the first doped well region, a third heavily doped region of the first conductivity type and a fourth heavily doped region of the second conductivity type is disposed in the second epitaxial region, the second heavily doped region is electrically connected to the third heavily doped region, the first heavily doped region is electrically connected to the fourth heavily doped region, the first doped region is implemented with the second and third heavily doped regions, the second heavily doped region is implemented with the second heavily doped region, and the fourth heavily doped region is implemented with the first heavily doped region.
10. The esd protection device of claim 9, wherein a doping concentration of the first epitaxial region is greater than or equal to a doping concentration of the second epitaxial region.
11. The esd-protection device of claim 9, further comprising two isolation structures disposed in the heavily doped region, the first epitaxial region and the second epitaxial region, one of the two isolation structures surrounding the first doped well region, the first heavily doped region and the second heavily doped region, the other of the two isolation structures surrounding the third heavily doped region and the fourth heavily doped region.
12. The esd protection device of claim 9, further comprising a buried region of the first conductivity type disposed in the first epitaxial region and between the fourth heavily doped region and the heavily doped region, the buried region having a higher doping concentration than the first epitaxial region.
13. The esd protection device of claim 1, wherein the fourth region is implemented with a heavily doped region, the third region is implemented with a first epitaxial region and a second epitaxial region, the second region is implemented with a first heavily doped region, the first epitaxial region and the second epitaxial region are sequentially disposed on the heavily doped region, a second doped well region of the first conductivity type is disposed in the second epitaxial region, a second heavily doped region of the first heavily doped region and the second conductivity type is disposed in the first doped well region, a third heavily doped region of the first conductivity type and a fourth heavily doped region of the second conductivity type is disposed in the second doped well region, the second heavily doped region is electrically connected with the third heavily doped region, the first heavily doped region and the fourth heavily doped region are electrically connected with each other, the first heavily doped region and the second heavily doped region are implemented with a voltage, and the fourth doped region is implemented with a voltage clamp.
14. The esd protection device of claim 1, wherein the fourth region is implemented with a heavily doped region, the third region is implemented with a first epitaxial region, the second region is implemented with a second epitaxial region, the first region is implemented with a first heavily doped region, the first and second epitaxial regions are sequentially disposed on the heavily doped region, a second heavily doped region of the first and second conductivity types is disposed in the second epitaxial region, a third heavily doped region of the first conductivity type and a fourth heavily doped region of the second conductivity type is disposed in a doped well region of the first conductivity type, the doped well region is disposed in the second epitaxial region, the second heavily doped region is electrically connected to the third heavily doped region, the first heavily doped region is implemented with the doped well region and the third heavily doped region, the second heavily doped region is implemented with the heavily doped region and the fourth epitaxial region is implemented with the clamping device.

Description

Electrostatic discharge protection device Technical Field The present invention relates to a protection device, and more particularly, to an electrostatic discharge protection device. Background As the size of Integrated Circuit (IC) devices has been reduced to the nanometer level, the size of consumer electronics such as notebook computers and mobile devices has been designed to be much smaller than ever before. Without suitable protection means, the functionality of these electronic devices may reset or even fail in the event of an electrostatic discharge (ESD). Currently, all consumer electronics are expected to pass the electrostatic discharge (ESD) test requirements of the IEC 61000-4-2 standard. Transient Voltage Suppressors (TVS) are typically designed to bypass ESD energy, thereby protecting electronic systems from ESD damage. The working principle of the transient voltage suppression device is shown in fig. 1, and on a printed circuit board, the transient voltage suppression device 10 is connected in parallel with a circuit 12 to be protected, when an ESD condition occurs, the transient voltage suppression device 10 is triggered instantaneously, and meanwhile, the transient voltage suppression device 10 can also provide a low-resistance path for discharging transient ESD current, so that the energy of the ESD transient current can be discharged through the transient voltage suppression device 10. U.S. patent publication number 8217421B2 discloses a unidirectional vertical PNP electrostatic discharge device triggered by a trigger node. The parasitic capacitance of the vertical PNP ESD device is dependent on the P-type heavily doped region, the N-type well region, the P-type heavily doped substrate, and the P-type well region. Thus, the vertical PNP electrostatic discharge device has a large parasitic capacitance. U.S. patent publication No. 2018/0047717A1 discloses a vertical NPN bipolar junction transistor in parallel with a diode. Since the diode is a single junction capacitive element, the overall capacitance of the ESD protection device is large. U.S. patent publication number 10930637B2 discloses a vertical bipolar junction transistor in parallel with a PNPN diode. The PNPN diode has a reverse bias voltage interface, and a high trigger voltage is generated when the PNPN diode is conducted. Accordingly, the present invention is directed to the above-mentioned problems, and an esd protection device is provided to solve the problems of the prior art. Disclosure of Invention The present invention is directed to an electrostatic discharge protection device having low capacitance and low trigger voltage. The invention provides an electrostatic discharge protection device, which comprises at least one voltage clamping device. The voltage clamping device comprises a diode, a voltage clamping element, an electronic element, a first pin and a second pin. The diode includes a first doped region of a first conductivity type and a second doped region of a second conductivity type opposite the first conductivity type. The voltage clamping element is provided with a first end and a second end, wherein the first end of the voltage clamping element is electrically connected with the first doping region. The electronic component comprises a first area of the first conductivity type, a second area of the second conductivity type, a third area of the first conductivity type and a fourth area of the second conductivity type. The first region is electrically connected with the second doping region, the second region is electrically connected with the first doping region and the first end of the voltage clamping element, and the fourth region is electrically connected with the second end of the voltage clamping element. The first pin is electrically connected with the second doped region and the first region, and the second pin is electrically connected with the second end of the voltage clamping element and the fourth region. In one embodiment of the present invention, the first conductivity type is N-type and the second conductivity type is P-type. In one embodiment of the present invention, when the first pin receives a positive pulse voltage and the second pin receives a reference voltage lower than the positive pulse voltage, an electrostatic discharge current flows from the first pin to the second pin through the diode and the voltage clamping element. When the first pin receives the negative pulse voltage and the second pin receives the reference voltage higher than the negative pulse voltage, the first electrostatic discharge current flows from the second pin to the first pin through the voltage clamping element, the second region and the first region, and the second electrostatic discharge current flows from the second pin to the first pin through the electronic element. In one embodiment of the present invention, the first conductivity type is P-type and the second conductivity type is N-type. In one embodi