CN-122002935-A - Image sensor structure and forming method thereof
Abstract
The application provides an image sensor structure and a forming method thereof, wherein the image sensor structure comprises a semiconductor substrate, a buried metal structure and a first metal interconnection structure, wherein the semiconductor substrate comprises a first surface and a second surface which are opposite, the first surface comprises a plurality of pixel areas distributed in an array, at least one photodiode is formed in each pixel area, the buried metal structure is positioned in the semiconductor substrate between adjacent pixel areas, the first surface of the semiconductor substrate is provided with the first metal interconnection structure which is electrically connected with the at least one photodiode and the buried metal structure, and the second surface of the semiconductor substrate is provided with a plurality of transistor structures and a second metal interconnection structure which is electrically connected with the transistor structures and the buried metal structure. The application provides an image sensor structure and a forming method thereof, which can simultaneously improve the image quality and low light performance of an image sensor and increase the number of pixel units and the photosensitive area.
Inventors
- ZHOU YIKANG
- KANG JIN
- JIA HUIJING
- Teng Xinlu
Assignees
- 北方集成电路技术创新中心(北京)有限公司
Dates
- Publication Date
- 20260508
- Application Date
- 20241105
Claims (12)
- 1. A method of forming an image sensor structure, comprising: Providing a semiconductor substrate, wherein the semiconductor substrate comprises a first surface and a second surface which are opposite, and the first surface comprises a plurality of pixel areas distributed in an array; Forming a buried metal structure in the semiconductor substrate between adjacent pixel regions; Forming at least one photodiode in the pixel region; forming a first metal interconnection structure electrically connecting the at least one photodiode and the buried metal structure on a first side of the semiconductor substrate; and forming a plurality of transistor structures and a second metal interconnection structure electrically connecting the transistor structures and the buried metal structure on a second surface of the semiconductor substrate.
- 2. The method of forming an image sensor structure of claim 1, wherein the buried metal structure is located in the semiconductor substrate at a central location of every four adjacent pixel regions in an array distribution.
- 3. The method of forming an image sensor structure of claim 1, wherein the first metal interconnect structure comprises a plurality of first contact structures electrically connecting the at least one photodiode and the buried metal structure, respectively, and a first intra-layer interconnect layer electrically connecting the plurality of first contact structures.
- 4. The method of forming an image sensor structure of claim 1 wherein said plurality of transistor structures includes a gate structure on a second side of said semiconductor substrate and source and drain electrodes in the semiconductor substrate on opposite sides of said gate structure.
- 5. The method of forming an image sensor structure of claim 4, wherein the second metal interconnect structure comprises a plurality of second contact structures electrically connecting the gate structures, the source and drain electrodes, and the buried metal structures of the plurality of transistor structures, respectively, a second intra-layer interconnect layer electrically connecting the plurality of second contact structures, and a metal pad structure electrically connecting the second intra-layer interconnect layer.
- 6. The method of forming an image sensor structure of claim 1, further comprising forming a plurality of filters positioned corresponding to the plurality of pixel regions over the first metal interconnect structure and a plurality of microlenses positioned over the plurality of filters.
- 7. An image sensor structure, comprising: the semiconductor substrate comprises a first surface and a second surface which are opposite to each other, wherein the first surface comprises a plurality of pixel areas distributed in an array, and at least one photodiode is formed in each pixel area; A buried metal structure in the semiconductor substrate between adjacent pixel regions; a first surface of the semiconductor substrate is formed with a first metal interconnection structure electrically connecting the at least one photodiode and the buried metal structure; A second face of the semiconductor substrate is formed with a plurality of transistor structures and a second metal interconnection structure electrically connecting the plurality of transistor structures and the buried metal structure.
- 8. The image sensor structure of claim 7, wherein the buried metal structure is located in the semiconductor substrate at a central location of every four adjacent pixel regions distributed in an array.
- 9. The image sensor structure of claim 7, wherein the first metal interconnect structure comprises a plurality of first contact structures electrically connecting the at least one photodiode and the buried metal structure, respectively, and a first intra-layer interconnect layer electrically connecting the plurality of first contact structures.
- 10. The image sensor structure of claim 7 wherein the plurality of transistor structures includes a gate structure located on the second side of the semiconductor substrate and source and drain electrodes located in the semiconductor substrate on opposite sides of the gate structure.
- 11. The image sensor structure of claim 10 wherein the second metal interconnect structure comprises a plurality of second contact structures electrically connecting the gate structures, the source and drain electrodes, and the buried metal structures of the plurality of transistor structures, respectively, a second intra-layer interconnect layer electrically connecting the plurality of second contact structures, and a metal pad structure electrically connecting the second intra-layer interconnect layer.
- 12. The image sensor structure of claim 7, further comprising a plurality of filters corresponding to the plurality of pixel regions at positions above the first metal interconnect structure and a plurality of microlenses over the plurality of filters.
Description
Image sensor structure and forming method thereof Technical Field The present disclosure relates to image sensors, and particularly to an image sensor structure and a method for forming the same. Background The front-illuminated image sensor (FS I C I S) is a structure for allowing light to enter a pixel unit from the front surface of the sensor, and the structure of the front-illuminated image sensor is composed of a micro lens, an optical filter, a circuit layer and a photodiode from top to bottom. Some light rays may be blocked or scattered due to the presence of the circuit layer, which may degrade image quality and low light (under illumination) performance. In addition, the light sensing area of the front-illuminated CIS is limited due to the presence of the side signal processing logic. In order to improve the image quality and low light performance of front-illuminated cis, back-illuminated image sensors (BS ii) have been proposed. In BS ii S, light can be directly incident into the photodiode from the back side without passing through a metal wiring layer, and the loss of light is reduced, and the image quality and low light performance are improved. However, the signal processing logic beside BS iics still occupies a certain chip area, which limits the number of pixels and further increases in the photosensitive area. Therefore, it is necessary to provide a more efficient and reliable solution that can improve the image quality and low light performance of the image sensor and increase the number of pixel units and the photosensitive area at the same time. Disclosure of Invention The application provides an image sensor structure and a forming method thereof, which can simultaneously improve the image quality and low light performance of an image sensor and increase the number of pixel units and the photosensitive area. One aspect of the application provides a method for forming an image sensor structure, comprising providing a semiconductor substrate, wherein the semiconductor substrate comprises a first surface and a second surface which are opposite, the first surface comprises a plurality of pixel areas distributed in an array, a buried metal structure is formed in the semiconductor substrate between adjacent pixel areas, at least one photodiode is formed in the pixel areas, a first metal interconnection structure electrically connected with the at least one photodiode and the buried metal structure is formed on the first surface of the semiconductor substrate, and a plurality of transistor structures and a second metal interconnection structure electrically connected with the transistor structures and the buried metal structure are formed on the second surface of the semiconductor substrate. In some embodiments of the application, the buried metal structure is located in the semiconductor substrate at a central location of every four adjacent pixel regions distributed in an array. In some embodiments of the present application, the first metal interconnect structure includes a plurality of first contact structures electrically connecting the at least one photodiode and the buried metal structure, respectively, and a first intra-layer interconnect layer electrically connecting the plurality of first contact structures. In some embodiments of the application, the number of transistor structures includes a gate structure located on a second side of the semiconductor substrate and source and drain electrodes located in the semiconductor substrate on either side of the gate structure. In some embodiments of the application, the second metal interconnection structure comprises a plurality of second contact structures respectively electrically connected with the grid electrode structures, the source electrodes and the drain electrodes of the transistor structures and the buried metal structures, a second intra-layer interconnection layer electrically connected with the second contact structures, and a metal welding pad structure electrically connected with the second intra-layer interconnection layer. In some embodiments of the application, the method of forming an image sensor structure further comprises forming a plurality of filters positioned corresponding to the plurality of pixel regions over the first metal interconnect structure and a plurality of microlenses positioned over the plurality of filters. The application further provides an image sensor structure which comprises a semiconductor substrate, a buried metal structure and a first metal interconnection structure, wherein the semiconductor substrate comprises a first face and a second face which are opposite, the first face comprises a plurality of pixel areas distributed in an array, at least one photodiode is formed in each pixel area, the buried metal structure is located in the semiconductor substrate between the adjacent pixel areas, the first face of the semiconductor substrate is provided with the first metal interconnection stru