CN-122002953-A - Preparation method of three-dimensional silicon detector

CN122002953ACN 122002953 ACN122002953 ACN 122002953ACN-122002953-A

Abstract

The invention discloses a preparation method of a three-dimensional silicon detector, which relates to the field of detectors and comprises the steps of preprocessing a wafer to enable the wafer to meet electrode etching requirements, etching a p-type electrode in stages, enabling the p-type electrode to comprise a plurality of cyclic etching processes in each stage, enabling the cyclic etching parameters in the same stage to be the same, enabling the etching parameters in different stages to gradually change according to etching depths, enabling solid source sheets to carry out thermal diffusion doping, filling polycrystalline silicon into holes or grooves of the p-type electrode, carrying out thermal diffusion doping by using a solid diffusion source to achieve doping of the holes or grooves, carrying out post-processing to form a complete p-type electrode structure, repeating S2-S4 to etch the n-type electrode in stages, enabling the solid source sheets to carry out thermal diffusion doping and post-processing to form the complete n-type electrode structure, enabling metal connection of the n-type electrode and passivation of the surface of the wafer, and enabling window opening and back metal deposition of the wafer back to achieve metal connection of the p-type electrode. The invention can realize the preparation of the high-doped electrode with high precision, high reliability and environmental protection.

Inventors

MA KUO
LIU YANWEN
WANG XIUXIA
PENG JINLAN
Shen Lijue

Assignees

中国科学技术大学

Dates

Publication Date: 20260508
Application Date: 20260403

Claims (10)

1. The preparation method of the three-dimensional silicon detector is characterized by comprising the following steps of: s1, preprocessing a wafer to enable the wafer to meet electrode etching requirements; S2, etching the p-type electrode in stages, wherein each stage comprises a plurality of cyclic etching processes, the cyclic etching parameters of the same stage are the same, and the etching parameters of different stages are gradually changed according to the etching depth; S3, carrying out thermal diffusion doping on the solid source sheet, filling polycrystalline silicon into the hole or the groove of the p-type electrode, and carrying out thermal diffusion doping on the polycrystalline silicon by using the solid source sheet so as to realize the doping of the hole or the groove; S4, post-processing to form a complete p-type electrode structure; s5, repeating the steps S2-S4 to etch the n-type electrode in stages, thermally diffuse doping the solid source sheet and post-processing to form a complete n-type electrode structure; S6, metal connection of the n-type electrode and passivation of the surface of the wafer; s7, etching a window on the back of the wafer and depositing metal on the back so as to realize metal connection of the p-type electrode.
2. The method of manufacturing a three-dimensional silicon detector according to claim 1, wherein in step S2, each cycle process of each stage comprises three steps of depositing a passivation layer, anisotropically etching the bottom of the passivation layer, and isotropically etching silicon; Along with the increase of the etching depth, the pressure of the cavity in the step of depositing the passivation layer is gradually reduced from the initial stage to the final stage, and the deposition time is gradually increased; with the increase of etching depth, the bias power of the process step at the bottom of the anisotropically etched passivation layer is gradually increased from the initial stage to the final stage, the pressure of the cavity is gradually reduced, and the etching time is gradually increased; As the etch depth increases, the etch time of the isotropic etch silicon process step increases gradually from the beginning to the final stage.
3. The method for manufacturing a three-dimensional silicon detector according to claim 1, wherein the step S3 comprises: placing the wafer on a quartz boat in a furnace tube; Pushing the quartz boat into a furnace tube, adjusting the pressure in the furnace tube and the flow of deposition gas, and depositing polysilicon into the holes or grooves by low-pressure gas phase; Pushing the quartz boat out of the furnace tube after the deposition is completed; Placing the wafer and the solid diffusion source on the same quartz boat in the furnace tube; pushing the quartz boat into a furnace tube, adjusting the temperature and the gas atmosphere of the furnace tube, and carrying out high-temperature thermal diffusion doping by using a solid diffusion source; after diffusion doping, the quartz boat is pushed out of the furnace tube, and the unreduced glass layer is removed by using a buffer oxide etching liquid.
4. The method for manufacturing a three-dimensional silicon detector according to claim 1, wherein the step S1 comprises: s101, cleaning a wafer and preparing a field oxide layer on the surface of the wafer; s102, ultraviolet lithography is carried out to form an isolation structure p-stop; s103, windowing and oxidizing an isolation structure p-stop; S104, ultraviolet lithography is carried out to form an isolation structure p-stop; s105, ion implantation of an isolation structure p-stop; s106, high-temperature annealing and oxidation of the isolation structure p-stop; S107, preparing a mask for etching; s108, ultraviolet lithography is carried out to form a p-type electrode; S109, etching the mask and the field oxide layer.
5. The method for manufacturing a three-dimensional silicon detector according to claim 1, wherein the step S4 comprises: s401, preparing a silicon dioxide barrier layer; S402, filling the pores of the p-type electrode, and depositing polysilicon to fill the pores of the p-type electrode; s403, ultraviolet lithography is carried out to form a cap structure on the top of the p-type electrode; S404, etching undoped polysilicon/silicon dioxide/doped polysilicon; s405, preparing a silicon dioxide barrier layer.
6. The method for manufacturing a three-dimensional silicon detector according to claim 1, further comprising the steps of: Preparing a mask for etching; Ultraviolet photoetching to form an n-type electrode; etching mask and field oxide layer.
7. The method for manufacturing a three-dimensional silicon detector according to claim 1, wherein the step S6 comprises: s601, etching an undoped polysilicon layer at the top of an n-type electrode; s602, preparing an n-type electrode contact region; S603, depositing a metal layer to form ohmic contact; s604, ultraviolet lithography and metal etching; s605, preparing a surface passivation layer; S606, windowing a surface passivation layer; S607, preparing a temporary metal layer.
8. The method for manufacturing a three-dimensional silicon detector according to claim 1, wherein the step S7 comprises: Firstly etching polysilicon, then etching silicon dioxide, then continuing etching polysilicon, and finally etching silicon dioxide; And (5) back metal deposition.
9. The method of manufacturing a three-dimensional silicon detector as set forth in claim 1, wherein the isolation structure p-stop is circular, square or hexagonal.
10. The method for manufacturing the three-dimensional silicon detector according to claim 1, wherein the two staged etching processes are selected from a single-sided processing process, namely, the two staged etching processes are performed on the same side of the wafer, or a double-sided processing process is selected, namely, the two staged etching processes are performed from two sides of the wafer respectively, and if the double-sided processing process is selected, the step S7 is completed, the step S6 is repeated on the back of the wafer, so that the metal connection of the p-type electrode is realized.

Description

Preparation method of three-dimensional silicon detector Technical Field The invention relates to the technical field of detectors, in particular to a preparation method of a three-dimensional silicon detector. Background The silicon-based radiation detector has wide and key application in a plurality of fields such as medical detection, high-energy physical research, national defense safety, industrial detection and the like by virtue of the excellent detection performance, and particularly has become an important carrier for acquiring core information such as particle space, time, energy and the like in detection of charged particles such as protons and radiation particles such as soft X-rays and neutrons. In the field of high-energy physics, the measurement accuracy of the silicon-based radiation detector on charged particle information directly determines the reconstruction quality of related physical cases, and in the field of medical clinical diagnosis, the sensitivity and accuracy of X-ray detection are more relevant to the reliability of a diagnosis result, so that the promotion of the technical upgrading of the silicon-based radiation detector has important industrial and scientific research values. The three-dimensional silicon detector has excellent anti-radiation performance and ten-step performance as an important development direction of the silicon-based radiation detectorThe m-level high spatial resolution performance has the potential of realizing ultrafast time resolution, and becomes a research hotspot in the current radiation detection field. The cylindrical or groove electrode of the detector is perpendicular to the surface of the wafer, is in a structure form of partially penetrating or completely penetrating the silicon substrate, and in order to effectively reduce the dead zone of the detector and ensure that the detector can generate induction signals with enough intensity (the induction signal intensity is positively correlated with the thickness of the silicon substrate), the electrode structure of the detector needs to have a larger depth-to-width ratio (the ratio of depth to width), and the preparation process of the three-dimensional silicon detector is strictly required. At present, the preparation process of the three-dimensional silicon detector still faces a plurality of key technical difficulties and challenges, wherein the preparation of the highly doped electrode is a core difficulty and is mainly embodied in two links of electrode etching and electrode doping, and the prior art scheme has obvious technical defects in the two links, so that the preparation requirement of the high-performance three-dimensional silicon detector is difficult to meet. In the electrode etching step, the deep hole or deep trench electrode with high aspect ratio is mainly prepared by adopting a Bosch process in the Deep Reactive Ion Etching (DRIE) technology in the prior art. The Bosch process, also called alternating side wall passivation deep silicon etching process, realizes anisotropic etching of silicon through rapid circulation of etching and passivation steps, wherein polymer films are deposited on the side wall and the bottom of an etched hole/groove under the action of plasma by using gases such as C 4F8 in the passivation stage, and the bottom passivation layer is removed by ion bombardment generated by fluorine-containing gases such as SF 6 in the etching stage, so that fluorine free radicals only react with the silicon exposed at the bottom, and a vertical etching profile is formed. However, the existing scheme adopts an integral deep reactive ion etching process, namely the whole etching process uses the same set of process parameters, so that in order to improve the depth-to-width ratio and perpendicularity of etching holes/grooves and improve the shape of side walls, complex integral optimization of multiple parameters such as gas flow, radio frequency power, matrix temperature, vacuum pressure and the like is required, and the flexibility of process adjustment is extremely poor. Meanwhile, the cycle characteristic of the Bosch process can enable the etching side wall to form a wavy scallop shape, the cycle process of passivation-etching two steps in the integral etching process cannot finely adapt to the process requirements of different etching depths, the problems of transverse over-etching at the top of an etching area, bottom shrinkage, poor side wall roughness and the like are further aggravated, and the accuracy of an electrode structure is seriously affected. In the electrode doping link, the electrode region of the three-dimensional silicon detector needs to be doped with high concentration so as to realize low-resistance ohmic contact between the doped region and the metal electrode and ensure efficient transmission of electric signals. In the prior art, ion implantation is used as a conventional high-concentration doping technology, the dosage and depth of the doping c