CN-122002970-A - LED chip assembly and manufacturing method thereof

CN122002970ACN 122002970 ACN122002970 ACN 122002970ACN-122002970-A

Abstract

The application relates to an LED chip assembly and a manufacturing method thereof. The manufacturing method of the LED chip assembly comprises the steps of providing an epitaxial wafer, wherein the epitaxial wafer comprises a substrate and an epitaxial layer growing on a first surface of the substrate, forming a first stress release groove on a second surface of the substrate, filling a first thermal expansion material in the first stress release groove, enabling the thermal expansion coefficient of the first thermal expansion material to be smaller than that of the substrate, providing a target substrate, and carrying out Jin Jinjian integration on the epitaxial layer and the target substrate. According to the application, the first stress release groove is formed in one side of the substrate, which is away from the epitaxial layer, and the first thermal expansion material with the thermal expansion coefficient smaller than that of the substrate is filled in the first stress release groove, so that the epitaxial layer and the target substrate can play a role in buffering in the bonding process, the tensile stress generated by the substrate at the cooling section in the bonding process is reduced, and the cracking phenomenon of the wafer heterogeneous integration is further reduced, so that the wafer heterogeneous integration yield is improved.

Inventors

XU LIANGYU
ZHAO YONGZHOU
WANG XIBIN
MA FEIFAN
DAI GUANGCHAO

Assignees

重庆康佳光电科技有限公司

Dates

Publication Date: 20260508
Application Date: 20241101

Claims (10)

1. A method of fabricating an LED chip assembly, comprising: providing an epitaxial wafer, wherein the epitaxial wafer comprises a substrate and an epitaxial layer grown on a first surface of the substrate; a first stress release groove is formed in the second surface of the substrate; filling a first thermal expansion material in the first stress release groove, wherein the thermal expansion coefficient of the first thermal expansion material is smaller than that of the substrate; Providing a target substrate; And carrying out Jin Jinjian combination on the epitaxial layer and the target substrate.
2. The method of manufacturing an LED chip assembly of claim 1, wherein said opening a first stress relief groove in a second side of said substrate comprises: Thinning the second surface of the substrate to obtain a thinned substrate; and a first stress releasing groove is formed in the second surface of the thinned substrate.
3. The method of manufacturing an LED chip assembly of claim 2, wherein the width of the first stress relief groove is 0.1-0.3mm and the depth of the first stress relief groove is 0.05-0.1mm.
4. The method of claim 3, wherein the substrate is sapphire and the first thermal expansion material comprises at least one of Cr, ir, siO and SiNx.
5. The method of manufacturing an LED chip assembly of any of claims 1-4, wherein prior to bonding the epitaxial layer to the target substrate Jin Jinjian, the method further comprises: a second stress release groove is formed in the target substrate; and filling a second thermal expansion material in the second stress release groove, wherein the thermal expansion coefficient of the second thermal expansion material is larger than that of the target substrate.
6. The method of manufacturing an LED chip assembly of claim 5, wherein the orthographic projection of the second stress relief groove on the substrate is located between scribe lines or alignment marks of the substrate.
7. The method of manufacturing an LED chip assembly of claim 5, wherein the width of the second stress relief groove is 0.1-0.3mm.
8. The method of manufacturing an LED chip assembly of claim 7, wherein the second stress relief groove has a depth of 0.05-0.1mm.
9. The method of claim 5, wherein the target substrate is silicon-based cmos and the second thermal expansion material comprises at least one of Al, cu, cr, ag, zn, au.
10. An LED chip assembly, comprising: A substrate; An epitaxial layer grown on a first side of the substrate; The first stress release groove is formed in the second surface of the substrate, and is filled with a first thermal expansion material, and the thermal expansion coefficient of the first thermal expansion material is smaller than that of the substrate; And a target substrate bonded to the epitaxial layer.

Description

LED chip assembly and manufacturing method thereof Technical Field The invention relates to the technical field of LED chips, in particular to an LED chip assembly and a manufacturing method thereof. Background In the Micro-LED near-to-eye display field, it is generally required to heterointegrate a sapphire-based GaN epitaxial wafer with a silicon-based CMOS drive back plate, and then manufacture a wafer to obtain a Micro display device. However, in the wafer heterogeneous integration process, thermal compression bonding is generally required for wafer integration, and because the difference of thermal expansion coefficients of the sapphire substrate and the silicon substrate of the silicon-based CMOS is larger (the thermal expansion coefficient of the silicon substrate is 2.6x10 -6/K, and the thermal expansion coefficient of the sapphire substrate is 7.5x10 -6/K) and the thickness of the silicon-based CMOS is larger than that of the sapphire epitaxial wafer, the shrinkage of the sapphire substrate is easily larger than that of the silicon substrate in the cooling section of the thermal compression bonding, so that the silicon substrate of the silicon-based CMOS is subjected to the abnormality of tensile stress chapping and cracking, and the production yield and the manufacturing cost are greatly influenced. Disclosure of Invention In view of the above-mentioned shortcomings of the prior art, an objective of the present application is to provide an LED chip assembly and a method for manufacturing the same, which aims to solve the problem of low wafer heterogeneous integration yield. In a first aspect, the present application provides a method for manufacturing an LED chip assembly, including: providing an epitaxial wafer, wherein the epitaxial wafer comprises a substrate and an epitaxial layer grown on a first surface of the substrate; a first stress release groove is formed in the second surface of the substrate; filling a first thermal expansion material in the first stress release groove, wherein the thermal expansion coefficient of the first thermal expansion material is smaller than that of the substrate; Providing a target substrate; And carrying out Jin Jinjian combination on the epitaxial layer and the target substrate. In a possible embodiment, the opening a first stress relief groove on the second surface of the substrate includes: Thinning the second surface of the substrate to obtain a thinned substrate; and a first stress releasing groove is formed in the second surface of the thinned substrate. In a possible embodiment, the width of the first stress relief groove is 0.1-0.3mm, and the depth of the first stress relief groove is 0.05-0.1mm. In a possible embodiment, the substrate is sapphire, and the first thermal expansion material includes at least one of Cr, ir, siO a and SiNx. In a possible embodiment, before the epitaxial layer is bonded to the target substrate Jin Jinjian, the method further includes: a second stress release groove is formed in the target substrate; and filling a second thermal expansion material in the second stress release groove, wherein the thermal expansion coefficient of the second thermal expansion material is larger than that of the target substrate. In a possible embodiment, the orthographic projection of the second stress relief groove on the substrate is located between scribe lines or alignment marks of the substrate. In a possible embodiment, the width of the second stress relief groove is 0.1-0.3mm. In a possible embodiment, the depth of the second stress relief groove is 0.05-0.1mm. In a possible embodiment, the target substrate is a silicon-based cmos and the second thermal expansion material includes at least one of Al, cu, cr, ag, zn, au. In a second aspect, the present application also provides an LED chip assembly, comprising: A substrate; An epitaxial layer grown on a first side of the substrate; The first stress release groove is formed in the second surface of the substrate, and is filled with a first thermal expansion material, and the thermal expansion coefficient of the first thermal expansion material is smaller than that of the substrate; And a target substrate bonded to the epitaxial layer. The beneficial effects are that: According to the LED chip assembly and the manufacturing method thereof, the first stress release groove is formed in the second surface of the substrate, and the thermal expansion material with the thermal expansion coefficient smaller than that of the substrate is filled in the first stress release groove, so that the epitaxy and the target substrate can play a role in buffering in the bonding process, the tensile stress generated by the substrate at the cooling section in the bonding process is reduced, and the cracking phenomenon of wafer heterogeneous integration is further reduced, so that the wafer heterogeneous integration yield is improved. Drawings Fig. 1 is a schematic flow chart of a method for manufacturing an L