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CN-122002976-A - Light-emitting diode chip and manufacturing method thereof

CN122002976ACN 122002976 ACN122002976 ACN 122002976ACN-122002976-A

Abstract

The disclosure provides a light emitting diode chip and a manufacturing method thereof, and belongs to the technical field of semiconductors. The light-emitting diode chip comprises an epitaxial layer, a transparent conducting layer, a first electrode and a second electrode, wherein the epitaxial layer comprises a first semiconductor layer, a second semiconductor layer and a light-emitting layer positioned between the first semiconductor layer and the second semiconductor layer, the transparent conducting layer is positioned on the second semiconductor layer and is directly contacted with the second semiconductor layer, the first electrode is connected with the first semiconductor layer, the second electrode is connected with the transparent conducting layer, a plurality of first through holes are arranged at intervals in the transparent conducting layer, and orthographic projections of the first through holes on one surface of the second semiconductor layer are not overlapped with orthographic projections of the second electrode on the surface of the second semiconductor layer. The light emitting efficiency of the light emitting diode chip can be improved.

Inventors

  • PENG YUXING
  • SHEN YAN
  • XIU PENG
  • TIAN YANHONG

Assignees

  • 京东方华灿光电(浙江)有限公司

Dates

Publication Date
20260508
Application Date
20251218

Claims (10)

  1. 1. A light emitting diode chip, characterized in that the light emitting diode chip comprises an epitaxial layer (2), a transparent conductive layer (4), a first electrode (51) and a second electrode (52); the epitaxial layer (2) comprises a first semiconductor layer (21), a second semiconductor layer (22), and a light emitting layer (23) between the first semiconductor layer (21) and the second semiconductor layer (22); The transparent conductive layer (4) is positioned above the second semiconductor layer (22) and is directly contacted with the second semiconductor layer (22); the first electrode (51) is connected to the first semiconductor layer (21), and the second electrode (52) is connected to the transparent conductive layer (4); the transparent conductive layer (4) is provided with a plurality of first through holes (401) which are distributed at intervals, and the orthographic projection of the first through holes (401) on one surface of the second semiconductor layer (22) is not overlapped with the orthographic projection of the second electrode (52) on the surface of the second semiconductor layer (22).
  2. 2. The light emitting diode chip according to claim 1, characterized in that the area of the cross section of the first via (401) increases monotonically along the normal direction of the surface of the second semiconductor layer (22) and towards the surface, the cross section of the first via (401) being a plane parallel to the surface of the second semiconductor layer (22).
  3. 3. A light emitting diode chip as claimed in claim 2, characterized in that the angle between the wall of the first via (401) and the surface of the second semiconductor layer (22) is 30-70 °.
  4. 4. The light emitting diode chip according to claim 2, characterized in that the cross-section of the first via (401) is orthographic projected as a regular polygon on the surface of the second semiconductor layer (22).
  5. 5. The led chip of claim 4, wherein each of said plurality of vertices of said regular polygon has a rounded transition.
  6. 6. The light emitting diode chip of claim 4, wherein the diameter of the largest circumcircle of the first via hole (401) is 2-10 μm.
  7. 7. The light emitting diode chip of any one of claims 1-6, wherein the plurality of first through holes (401) are uniformly arranged with an arrangement density of 50-200/mm 2 .
  8. 8. A light emitting diode chip according to any one of claims 1-6, characterized in that the light emitting diode chip further comprises a passivation layer (6), the passivation layer (6) being located on a side of the transparent conductive layer (4) remote from the second semiconductor layer (22); The passivation layer (6) has second through holes (601) corresponding to the first through holes (401) one by one, and each second through hole (601) is communicated with the corresponding first through hole (401).
  9. 9. The light emitting diode chip according to claim 8, characterized in that the orthographic projection of the second through hole (601) on the surface of the second semiconductor layer (22) is located inside the orthographic projection of the corresponding first through hole (401) on the surface of the second semiconductor layer (22).
  10. 10. A method for manufacturing a light emitting diode chip, the method comprising: Sequentially forming an epitaxial layer and a transparent conductive layer, and manufacturing a first electrode and a second electrode; The epitaxial layer comprises a first semiconductor layer, a second semiconductor layer and a light emitting layer positioned between the first semiconductor layer and the second semiconductor layer; the transparent conductive layer is positioned on the second semiconductor layer and is directly contacted with the second semiconductor layer; the first electrode is connected with the first semiconductor layer, and the second electrode is connected with the transparent conductive layer; The transparent conductive layer is provided with a plurality of first through holes which are arranged at intervals, and orthographic projections of the first through holes on one surface of the second semiconductor layer are not overlapped with orthographic projections of the second electrode on the surface of the second semiconductor layer.

Description

Light-emitting diode chip and manufacturing method thereof Technical Field The disclosure belongs to the technical field of semiconductors, and in particular relates to a light emitting diode chip and a manufacturing method thereof. Background With the wide use of led chips, market demands for high-brightness, low-voltage, high-light-efficiency products are increasing. Transparent conductive layers, such as indium tin oxide films, are widely used in light emitting diode chips because of their high conductivity and high light transmittance. In the related art, a light emitting diode chip includes a substrate, an epitaxial layer, a transparent conductive layer, and first and second electrodes sequentially stacked on the substrate. The first electrode is in ohmic contact with the n-type layer of the epitaxial layer, and the second electrode is in ohmic contact with the p-type layer of the epitaxial layer through the transparent conductive layer. However, since the conductivity of the transparent conductive layer is dependent on its own internal doping. For example, the conductivity of an indium tin oxide film is in a forward relationship with Sn doping. The increase of the doping concentration of the dopant can enhance the absorption and scattering effects of the transparent conductive layer on visible light, so that the light transmittance is reduced, and finally the brightness of the light emitting diode chip is affected. Disclosure of Invention The embodiment of the disclosure provides a light-emitting diode chip and a manufacturing method thereof, which can improve the brightness of the light-emitting diode chip under the condition of ensuring the conductivity of a transparent conductive layer. The technical scheme is as follows: The embodiment of the disclosure provides a light-emitting diode chip, which comprises an epitaxial layer, a transparent conducting layer, a first electrode and a second electrode, wherein the epitaxial layer comprises a first semiconductor layer, a second semiconductor layer and a light-emitting layer positioned between the first semiconductor layer and the second semiconductor layer, the transparent conducting layer is positioned on the second semiconductor layer and is directly contacted with the second semiconductor layer, the first electrode is connected with the first semiconductor layer, the second electrode is connected with the transparent conducting layer, a plurality of first through holes are arranged in the transparent conducting layer at intervals, and the orthographic projection of the plurality of first through holes on one surface of the second semiconductor layer is not overlapped with the orthographic projection of the second electrode on the surface of the second semiconductor layer. In yet another implementation of the present disclosure, the area of the cross section of the first via increases monotonically along a normal direction of the surface of the second semiconductor layer and toward the surface, the cross section of the first via being a plane parallel to the surface of the second semiconductor layer. In yet another implementation of the present disclosure, an angle between a hole wall of the first via and the surface of the second semiconductor layer is 30-70 °. In yet another implementation of the present disclosure, an orthographic projection of a cross section of the first via on the surface of the second semiconductor layer is a regular polygon, and a number of sides of the regular polygon is 3-10. In yet another implementation of the present disclosure, the plurality of vertices of the regular polygon are all arc transitions. In yet another implementation of the present disclosure, a diameter of a largest circumscribed circle of the first via is 2-10 μm. In yet another implementation of the present disclosure, the plurality of first through holes are uniformly arranged with an arrangement density of 50-200/mm 2. In yet another implementation of the present disclosure, the light emitting diode chip further includes a passivation layer located on a side of the transparent conductive layer remote from the second semiconductor layer; The passivation layer is provided with a plurality of second through holes which are in one-to-one correspondence with the first through holes, and each second through hole is communicated with the corresponding first through hole. In yet another implementation of the present disclosure, the orthographic projection of the second via on the surface of the second semiconductor layer is located inside the orthographic projection of the corresponding first via on the surface of the second semiconductor layer. On the other hand, the embodiment of the disclosure also provides a manufacturing method of the light-emitting diode chip, which comprises the steps of sequentially forming an epitaxial layer and a transparent conductive layer, and manufacturing a first electrode and a second electrode, wherein the epitaxial layer comp