CN-122002991-A - HEMT integrated light-emitting chip, preparation method thereof, epitaxial wafer and display backboard

CN122002991ACN 122002991 ACN122002991 ACN 122002991ACN-122002991-A

Abstract

The application discloses a HEMT integrated light-emitting chip and a preparation method thereof, an epitaxial wafer and a display backboard, wherein the HEMT integrated light-emitting chip comprises an N-type semiconductor layer, an intrinsic semiconductor layer, a first quantum well layer and a second quantum well layer which are sequentially stacked from bottom to top, the light-emitting colors of the first quantum well layer and the second quantum well layer are different, and the energy band width of the first quantum well layer and the energy band width of the second quantum well layer are sequentially reduced; the second quantum well layer is arranged on the second light-emitting area on the first quantum well layer, barrier layers and P-type semiconductor layers which are sequentially stacked are arranged on the first light-emitting area on the first quantum well layer and the second quantum well layer, source electrodes are correspondingly arranged on the P-type semiconductor layers, grid electrodes which are arranged at intervals with the P-type semiconductor layers are arranged on the barrier layers, and a common drain electrode which is connected with the N-type semiconductor layers and penetrates through the electrode holes is arranged on the N-type semiconductor layers. The HEMT integrated light-emitting chip manufactured by the method has the advantages of more compact structure, strong light-adjusting capability and higher light-emitting efficiency, and realizes single-color and double-color display.

Inventors

DONG HONGWEI
WEI SHENGLONG
Xun Likai
TANG YUYING
CHEN XIAOFENG

Assignees

重庆康佳光电科技有限公司

Dates

Publication Date: 20260508
Application Date: 20241101

Claims (20)

1. The HEMT integrated light-emitting chip is characterized by comprising an N-type semiconductor layer, an intrinsic semiconductor layer, a first quantum well layer and a second quantum well layer which are sequentially stacked from bottom to top, wherein the light-emitting colors of the first quantum well layer and the second quantum well layer are different, and the energy bandwidths of the first quantum well layer and the second quantum well layer are sequentially reduced; The first quantum well layer comprises a first light emitting region and a second light emitting region, the second quantum well layer is arranged on the second light emitting region, a first barrier layer and a first P-type semiconductor layer are sequentially laminated on the surface of the first light emitting region, a first source electrode is arranged on the first P-type semiconductor layer, a first grid electrode which is arranged at intervals with the first P-type semiconductor layer is arranged on the first barrier layer, a second barrier layer and a second P-type semiconductor layer are sequentially laminated on the surface of the second quantum well layer, a second source electrode is arranged on the second P-type semiconductor layer, a second grid electrode which is arranged at intervals with the second P-type semiconductor layer is arranged on the second barrier layer, and a common drain electrode which is connected with the N-type semiconductor layer and penetrates through the intrinsic semiconductor layer or sequentially penetrates through the intrinsic semiconductor layer and the exposed first quantum well layer is arranged on the N-type semiconductor layer.
2. The HEMT-integrated light-emitting chip of claim 1, wherein the first quantum well layer corresponding to the first light-emitting region and the first quantum well layer corresponding to the second light-emitting region are disposed apart.
3. The HEMT integrated light-emitting chip of claim 2, wherein the common drain is disposed between the first light-emitting region and the second light-emitting region.
4. The HEMT-integrated light-emitting chip of any one of claims 1 to 3, wherein the first quantum well layer and the second quantum well layer each comprise at least one of an In-doped InGaN layer, an Al-doped AlGaN layer, an undoped GaN layer, an In-doped Al-gainn layer.
5. The HEMT integrated light emitting chip of claim 4 wherein the first and second quantum well layers are In-doped InGaN layers, and wherein the In doping levels of the first and second quantum well layers increase sequentially.
6. The HEMT integrated light-emitting chip of claim 5, wherein the first quantum well layer is a blue light quantum well layer and the second quantum well layer is a green light quantum well layer, or wherein the first quantum well layer is a blue light quantum well layer and the second quantum well layer is a red light quantum well layer, or wherein the first quantum well layer is a green light quantum well layer and the second quantum well layer is a red light quantum well layer.
7. The HEMT-integrated light-emitting chip of claim 5 or 6, wherein the first barrier layer and the second barrier layer each comprise at least one of an AlN barrier layer and an AlGaN barrier layer.
8. The HEMT integrated light-emitting chip of claim 7, wherein the first barrier layer and the second barrier layer are both Al-doped AlGaN barrier layers.
9. The HEMT-integrated light-emitting chip of claim 8, The N-type semiconductor layer comprises at least one of an N-type GaN layer, an N-type AlGaN layer and an N-type InGaN layer; the first P-type semiconductor layer and the second P-type semiconductor layer are made of the same material, and the first P-type semiconductor layer comprises at least one of a P-type GaN layer, a P-type AlGaN layer and a P-type InGaN layer.
10. The HEMT integrated light-emitting chip of claim 9, wherein the N-type semiconductor layer is an N-type GaN layer and the first P-type semiconductor layer and the second P-type semiconductor layer are both P-type GaN layers.
11. A HEMT-integrated light-emitting chip according to claim 1 or 2 or 3 or 5 or 6 or 8 or 9 or 10, wherein said HEMT-integrated light-emitting chip can be MiniLED or MicroLED.
12. The HEMT-integrated light-emitting chip according to claim 1 or 2 or 3 or 5 or 6 or 8 or 9 or 10, further comprising a substrate and a buffer layer, wherein the buffer layer and the substrate are sequentially stacked on a side of the N-type semiconductor layer away from the intrinsic semiconductor layer.
13. A HEMT integrated epitaxial wafer, which is used for preparing a HEMT integrated light-emitting chip according to any one of claims 1 to 12, and comprises a substrate, a buffer layer, an N-type semiconductor layer, an intrinsic semiconductor layer and a bicolor quantum well layer which are sequentially stacked from bottom to top, wherein the bicolor quantum well layer comprises a primary first quantum well layer and a primary second quantum well layer which are sequentially stacked on the intrinsic semiconductor layer, the light-emitting colors of the primary first quantum well layer and the primary second quantum well layer are different, and the energy band widths of the primary first quantum well layer and the primary second quantum well layer are sequentially reduced.
14. The HEMT-integrated epitaxial wafer of claim 13, wherein said growing a buffer layer, an N-type semiconductor layer, an intrinsic semiconductor layer, and a two-color quantum well layer in this order from bottom to top on the surface of said substrate comprises performing the steps of: Growing the buffer layer with a first preset thickness on the surface of the substrate at a first preset temperature and a first preset pressure; Growing the N-type semiconductor layer with a second preset thickness on the surface of the buffer layer at a second preset temperature and a second preset pressure; Growing a third intrinsic semiconductor layer with a third preset thickness on the surface of the N-type semiconductor layer at a third preset temperature and a third preset pressure; growing the original first quantum well layer with a fourth preset thickness on the surface of the intrinsic semiconductor layer at a fourth preset temperature and a fourth preset pressure; growing a first quantum well layer with a first preset thickness on the surface of the first quantum well layer under a first preset temperature and a first preset pressure; The step of sequentially growing the barrier layer and the P-type semiconductor layer comprises the following steps: growing a barrier layer with a sixth preset thickness on the etched epitaxial wafer at a sixth preset temperature and a sixth preset pressure; And growing the P-type semiconductor layer with a seventh preset thickness on the surface of the barrier layer at a seventh preset temperature and a seventh preset pressure.
15. The HEMT-integrated epitaxial wafer of claim 13, wherein the raw first quantum well layer and the raw second quantum well layer are of the same material class.
16. A method for manufacturing the HEMT-integrated light-emitting chip according to any one of claims 1 to 12, characterized by comprising the steps of: Providing a HEMT-integrated epitaxial wafer according to any one of claims 13 to 15, wherein the HEMT-integrated epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, an intrinsic semiconductor layer and a bicolor quantum well layer which are sequentially stacked from bottom to top, wherein the bicolor quantum well layer comprises a primary first quantum well layer and a primary second quantum well layer which are sequentially stacked on the intrinsic semiconductor layer, the light-emitting colors of the primary first quantum well layer and the primary second quantum well layer are different, and the energy bandwidths of the primary first quantum well layer and the primary second quantum well layer are sequentially reduced; Etching the bicolor quantum well lamination to form a first quantum well layer and a second quantum well layer laminated on the first quantum well layer, wherein the first quantum well layer comprises a first light-emitting area and a second light-emitting area, and the second quantum well layer is arranged on the second light-emitting area; Sequentially growing a barrier layer and a P-type semiconductor layer; sequentially etching the P-type semiconductor layer and the barrier layer to form a first barrier layer and a first P-type semiconductor layer sequentially stacked on the first light emitting region, and a second barrier layer and a second P-type semiconductor layer sequentially stacked on the second quantum well layer; etching the intrinsic semiconductor layer or sequentially etching the exposed first quantum well layer and the intrinsic semiconductor layer until the N-type semiconductor layer is exposed, and forming an electrode hole; Growing electrode layers on the epitaxial wafer after the electrode hole etching is completed and in the electrode hole; The electrode layer is etched to form a first source electrode and a second source electrode which are respectively arranged on the first P-type semiconductor layer and the second P-type semiconductor layer, a first grid electrode and a second grid electrode which are respectively arranged on the first barrier layer and the second barrier layer, and a common drain electrode which is connected with the exposed N-type semiconductor layer and penetrates through the electrode hole, wherein the first source electrode is connected with the first P-type semiconductor layer, the first grid electrode is arranged at intervals with the first P-type semiconductor layer, the second source electrode is connected with the second P-type semiconductor layer, and the second grid electrode is arranged at intervals with the second P-type semiconductor layer, so that the HEMT integrated luminous chip is obtained.
17. The method of manufacturing a HEMT integrated light-emitting chip of claim 16, wherein said etching said bi-color quantum well stack forms a first quantum well layer and a second quantum well layer stacked on said first quantum well layer, said first quantum well layer comprising a first light-emitting region and a second light-emitting region, said second quantum well layer being disposed on said second light-emitting region, comprising the steps of: and etching the original second quantum well layer until the original first quantum well layer to obtain a second quantum well layer laminated on the first quantum well layer, wherein the first quantum well layer comprises a first light-emitting area and a second light-emitting area, and the second quantum well layer is arranged on the second light-emitting area.
18. The method of manufacturing a HEMT integrated light-emitting chip of claim 17, comprising the steps of, after obtaining the second quantum well layer: And etching the first quantum well layer between the first light emitting region and the second light emitting region until the intrinsic semiconductor layer, so that the first quantum well layer corresponding to the first light emitting region and the first quantum well layer corresponding to the second light emitting region are spaced apart.
19. The method of manufacturing a HEMT integrated light-emitting chip according to claim 16, wherein, after said etching of said electrode layer to form first and second source electrodes respectively provided on said first and second P-type semiconductor layers, first and second gate electrodes respectively provided on said first and second barrier layers, and a common drain electrode connected to said exposed N-type semiconductor layer and passing through said electrode hole, said first source electrode is connected to said first P-type semiconductor layer, said first gate electrode is spaced apart from said first P-type semiconductor layer, said second source electrode is connected to said second P-type semiconductor layer, said second gate electrode is spaced apart from said second P-type semiconductor layer, further comprising the steps of: the buffer layer is decomposed to peel off the substrate.
20. A display back plate comprising a drive substrate and the HEMT-integrated light-emitting chip of any one of claims 1 to 12 bonded to the drive substrate.

Description

HEMT integrated light-emitting chip, preparation method thereof, epitaxial wafer and display backboard Technical Field The application relates to the field of display, in particular to an HEMT integrated light emitting chip and a preparation method thereof, an epitaxial wafer and a display backboard. Background HEMT (High Electron Mobility Transistor) and LED (LIGHT EMITTING Diode) have great potential and wide application fields as devices having important applications in the electronic and optoelectronic fields. HEMTs are high electron mobility transistors that have excellent performance in high frequency and microwave circuits, and are commonly used in the fields of radio frequency power amplifiers, microwave receivers, radio frequency switches, and the like. An LED is a semiconductor device capable of converting electric energy into light energy, and is widely used in the fields of lighting, display screens, and communication. In recent years, with the development of electronic and optoelectronic integration technology, how to apply HEMTs to MicroLED is a difficulty in the art. The chinese patent document CN117153961a discloses a HEMT-driven MicroLED integrated back plate and a method for manufacturing the same, the method steps include growing HEMT epitaxial structures on a substrate, sequentially growing three single-color LED epitaxial structures on the HEMT epitaxial structures to obtain epitaxial wafers, etching to the substrate-to-epitaxial wafer partition, depositing passivation layers, etching through holes, and then depositing conductors to connect n-GaN layers of three LED regions to one HEMT region, and connecting the remaining three HEMT regions to p-GaN layers of one LED region. The method is to arrange the epitaxy of the three-color LED device on the HEMT structure layer, and is a design to apply the HEMT to MicroLED display fields. And the existing two-color MicroLED structure with strong light adjusting capability and high luminous efficiency is further prepared, so that a lot of limitations exist. Disclosure of Invention In view of the shortcomings of the related art, the application aims to provide an HEMT integrated light-emitting chip, a preparation method thereof, an epitaxial wafer and a display backboard, which are more compact in structure, strong in light adjusting capability and higher in light emitting efficiency, and realize single-color and double-color display. The application provides an HEMT integrated light-emitting chip, which comprises an N-type semiconductor layer, an intrinsic semiconductor layer, a first quantum well layer and a second quantum well layer which are sequentially stacked from bottom to top, wherein the light-emitting colors of the first quantum well layer and the second quantum well layer are different, and the energy bandwidths of the first quantum well layer and the second quantum well layer are sequentially reduced; The first quantum well layer comprises a first light emitting region and a second light emitting region, the second quantum well layer is arranged on the second light emitting region, a first barrier layer and a first P-type semiconductor layer are sequentially laminated on the surface of the first light emitting region, a first source electrode is arranged on the first P-type semiconductor layer, a first grid electrode which is arranged at intervals with the first P-type semiconductor layer is arranged on the first barrier layer, a second barrier layer and a second P-type semiconductor layer are sequentially laminated on the surface of the second quantum well layer, a second source electrode is arranged on the second P-type semiconductor layer, a second grid electrode which is arranged at intervals with the second P-type semiconductor layer is arranged on the second barrier layer, and a common drain electrode which is connected with the N-type semiconductor layer and penetrates through the intrinsic semiconductor layer or sequentially penetrates through the intrinsic semiconductor layer and the exposed first quantum well layer is arranged on the N-type semiconductor layer. Optionally, the first quantum well layer corresponding to the first light emitting region and the first quantum well layer corresponding to the second light emitting region are spaced apart. Optionally, the common drain is disposed between the first light emitting region and the second light emitting region. Optionally, the first quantum well layer and the second quantum well layer each include at least one of an In-doped InGaN layer, an Al-doped AlGaN layer, an undoped GaN layer, an In-doped Al-gainn layer. Optionally, the first quantum well layer and the second quantum well layer are both InGaN layers doped with In, and the In doping content of the first quantum well layer and the second quantum well layer is sequentially increased. Optionally, the first quantum well layer is a blue light quantum well layer, the second quantum well layer is a green light quantum wel