CN-122003046-A - Display panel and electronic device including the same

Abstract

The present disclosure relates to a display panel and an electronic device including the display panel. The display panel includes a pixel circuit group including a first pixel circuit, a second pixel circuit, and a third pixel circuit, a first pixel electrode overlapping the first pixel circuit in a plan view, a second pixel electrode overlapping the second pixel circuit in a plan view, a third pixel electrode overlapping the third pixel circuit in a plan view, and a connection electrode disposed under the first pixel electrode, the second pixel electrode, and the third pixel electrode. In a plan view, one end of the connection electrode overlaps the first pixel electrode, and the other end of the connection electrode overlaps the second pixel electrode.

Inventors

• JIN HE
• Bai Chengzhu
• ZHENG BAORONG
• JIN ZHONGXI

Assignees

• 三星显示有限公司

Dates

Publication Date

20260508

Application Date

20251029

Priority Date

20241101

Claims (20)

1. 1. A display panel, comprising: A pixel circuit group including a first pixel circuit, a second pixel circuit, and a third pixel circuit; A first pixel electrode overlapping the first pixel circuit in a plan view; a second pixel electrode overlapping the second pixel circuit in a plan view; a third pixel electrode overlapping the third pixel circuit in plan view, and The electrodes are connected to each other, is arranged below the first pixel electrode, the second pixel electrode and the third pixel electrode, Wherein one end of the connection electrode overlaps the first pixel electrode and the other end of the connection electrode overlaps the second pixel electrode in a plan view.
2. 2. The display panel of claim 1, further comprising: a bank layer disposed over the first, second, and third pixel electrodes, the bank layer including a first opening overlapping the first pixel electrode in a plan view, a second opening overlapping the second pixel electrode, and a third opening overlapping the third pixel electrode.
3. 3. The display panel of claim 2, wherein, In plan view, the first opening is larger than the second opening and the third opening, and In a plan view, the second opening is smaller than the third opening.
4. 4. The display panel of claim 2, wherein, The second pixel electrode includes a first portion and a second portion, the first portion overlapping the second opening in a plan view, and the second portion is spaced apart from the first portion with a gap therebetween, an In plan view, the gap extends along a portion of an edge of the second opening.
5. 5. The display panel of claim 4, wherein, The second portion includes a contact portion electrically connected to the second pixel circuit, and The connection electrode connects the first pixel electrode and the second portion to each other.
6. 6. The display panel of claim 4, wherein, The second pixel electrode and the third pixel electrode are adjacent to each other in the first direction, and The second pixel electrode includes a protrusion protruding in a second direction intersecting the first direction.
7. 7. The display panel of claim 6, wherein the second portion comprises the protrusion.
8. 8. The display panel of claim 1, wherein each of the first, second, and third pixel circuits comprises: A first transistor including a gate electrode, a first terminal, and a second terminal, the gate electrode being connected to a first node, the first terminal being connected to a driving voltage line, and the second terminal being connected to a second node; A second transistor connected between the first node and one of the first, second and third data lines; a third transistor connected between the initialization sense line and the second node, and A capacitor connected between the first node and the second node.
9. 9. The display panel of claim 8, wherein, The second transistor of the first pixel circuit is connected to the first data line, The second node of the first pixel circuit is connected to the first pixel electrode, The second transistor of the second pixel circuit is connected to the second data line, The second node of the second pixel circuit is connected to the second pixel electrode, The second transistor of the third pixel circuit is connected to the third data line, and The second node of the third pixel circuit is connected to the third pixel electrode.
10. 10. The display panel of claim 8, wherein, The second transistor of the second pixel circuit is connected to the first data line, and The second node of the second pixel circuit is connected to the first pixel electrode.
11. 11. A display panel, comprising: A pixel circuit group including a first pixel circuit, a second pixel circuit, and a third pixel circuit; A first pixel electrode overlapping the first pixel circuit in a plan view; a second pixel electrode overlapping the second pixel circuit in a plan view; a third pixel electrode overlapping the third pixel circuit in plan view, and A connection electrode connecting the first pixel electrode and the second pixel electrode to each other, Wherein the second pixel electrode includes a first portion and a second portion spaced apart from the first portion with a gap therebetween, and the second portion is connected to the connection electrode.
12. 12. The display panel of claim 11, further comprising: a bank layer disposed over the first, second, and third pixel electrodes, the bank layer including a first opening overlapping the first pixel electrode in a plan view, a second opening overlapping the second pixel electrode, and a third opening overlapping the third pixel electrode.
13. 13. The display panel of claim 12, wherein, In plan view, the first opening is larger than the second opening and the third opening, and In a plan view, the second opening is smaller than the third opening.
14. 14. The display panel of claim 12, wherein the gap extends along a portion of an edge of the second opening in plan view.
15. 15. The display panel of claim 11, wherein, The second portion includes a contact portion electrically connected to the second pixel circuit, and The connection electrode connects the first pixel electrode and the second portion to each other.
16. 16. The display panel of claim 11, wherein, The second pixel electrode and the third pixel electrode are adjacent to each other in the first direction, and The second pixel electrode includes a protrusion protruding in a second direction intersecting the first direction.
17. 17. The display panel of claim 16, wherein the first portion comprises the protrusion.
18. 18. The display panel of claim 16, wherein the second portion comprises the protrusion.
19. 19. An electronic device, comprising: Display panel, and A processor for driving the display panel, Wherein, the display panel includes: A pixel circuit group including a first pixel circuit, a second pixel circuit, and a third pixel circuit; A first pixel electrode overlapping the first pixel circuit in a plan view; a second pixel electrode overlapping the second pixel circuit in a plan view; a third pixel electrode overlapping the third pixel circuit in plan view, and A connection electrode connecting the first pixel electrode and the second pixel electrode to each other, Wherein the second pixel electrode includes a first portion and a second portion spaced apart from the first portion with a gap therebetween, and the second portion is connected to the connection electrode.
20. 20. The electronic device of claim 19, wherein the connection electrode is disposed under the first, second, and third pixel electrodes, and In a plan view, one end of the connection electrode overlaps the first pixel electrode, and the other end of the connection electrode overlaps the second portion of the second pixel electrode.

Description

Display panel and electronic device including the same Cross Reference to Related Applications The present application claims priority and rights of korean patent application No. 10-2024-0153717, filed on the Korean Intellectual Property Office (KIPO) at 1, 11, 2024, the entire contents of which are incorporated herein by reference. Technical Field Embodiments relate to a display panel and an electronic device including the display panel. Background The display panel may include a plurality of pixels. Each pixel may include sub-pixels that emit light of different colors. Each of the sub-pixels may include a light emitting element including an emission layer and a pixel circuit configured to control brightness of the light emitting element. The pixel circuit may include a thin film transistor, a capacitor, and a line. Recently, display panels have become thinner and lighter, and thus may be applied to various electronic devices. Since the display panel as described above is widely used, various forms of display panels and electronic devices including the display panels have been designed. Disclosure of Invention Defects in some of the pixel circuits may cause bright or dark spots to appear on the display panel. In this regard, embodiments include a display panel that displays high quality images by using a repair process of connecting a light emitting diode connected to a defective pixel circuit to a normal pixel circuit, and an electronic device including the display panel. However, the scope of the present disclosure is not limited thereto. Additional aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the embodiments of the disclosure. According to an embodiment, a display panel may include a pixel circuit group including a first pixel circuit, a second pixel circuit, and a third pixel circuit, a first pixel electrode overlapping the first pixel circuit in a plan view, a second pixel electrode overlapping the second pixel circuit in a plan view, a third pixel electrode overlapping the third pixel circuit in a plan view, and a connection electrode disposed under the first pixel electrode, the second pixel electrode, and the third pixel electrode. In a plan view, one end of the connection electrode may overlap the first pixel electrode, and the other end of the connection electrode may overlap the second pixel electrode. In an embodiment, the display panel may further include a bank layer disposed over the first, second, and third pixel electrodes, the bank layer including a first opening overlapping the first pixel electrode in a plan view, a second opening overlapping the second pixel electrode, and a third opening overlapping the third pixel electrode. In an embodiment, the first opening may be larger than the second opening and the third opening in a plan view, and the second opening may be smaller than the third opening in a plan view. In an embodiment, the second pixel electrode may include a first portion overlapping the second opening in a plan view and a second portion spaced apart from the first portion with a gap therebetween, and the gap may extend along a portion of an edge of the second opening in a plan view. In an embodiment, the second portion may include a contact portion electrically connected to the second pixel circuit, and the connection electrode may connect the first pixel electrode and the second portion to each other. In an embodiment, the second pixel electrode and the third pixel electrode may be adjacent to each other in the first direction, and the second pixel electrode may include a protrusion protruding in a second direction intersecting the first direction. In an embodiment, the second portion may comprise a protrusion. In an embodiment, each of the first, second, and third pixel circuits may include a first transistor including a gate electrode, a first terminal and a second terminal, the gate electrode being connected to the first node, the first terminal being connected to the driving voltage line, and the second terminal being connected to the second node, a second transistor connected between the first node and one of the first, second, and third data lines, a third transistor connected between the initialization sense line and the second node, and a capacitor connected between the first and second nodes. In an embodiment, the second transistor of the first pixel circuit may be connected to the first data line, the second node of the first pixel circuit may be connected to the first pixel electrode, the second transistor of the second pixel circuit may be connected to the second data line, the second node of the second pixel circuit may be connected to the second pixel electrode, the second transistor of the third pixel circuit may be connected to the third data line, and the second node of the third pixel circuit may be connected to the third pixel electrode. In an embod