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CN-122003056-A - Display device and electronic device including the same

CN122003056ACN 122003056 ACN122003056 ACN 122003056ACN-122003056-A

Abstract

A display device and an electronic device including the same are disclosed. The display device includes a substrate, a circuit layer, and an element layer. The display region of the substrate includes emission regions arranged side by side and configured to emit light, and non-emission regions between the emission regions. The display sensing region, which is at least a portion of the display region, includes a light sensing region disposed in the non-emission region. The element layer includes a light emitting element in an emission region and a light sensing element in a light sensing region. The circuit layer includes an additional conductive layer on the substrate, an additional buffer layer covering the additional conductive layer, a light blocking conductive layer on the additional buffer layer, a buffer layer covering the light blocking conductive layer, and a first semiconductor layer on the buffer layer.

Inventors

  • Pu Xiange
  • SONG PUGUANG
  • LIN SHUYING
  • HONG XIUYING

Assignees

  • 三星显示有限公司

Dates

Publication Date
20260508
Application Date
20251103
Priority Date
20241108

Claims (20)

  1. 1. A display device, the display device comprising: a substrate having a display region from which light is emitted and a non-display region around the display region; A circuit layer on the substrate, and An element layer, on the circuit layer, Wherein the display area comprises emission areas arranged side by side and emitting light and non-emission areas between the emission areas, Wherein a display sensing region as at least a portion of the display region includes a light sensing region disposed in the non-emission region, Wherein the element layer includes a light emitting element in the emission region and a light sensing element in the light sensing region, and The circuit layer comprises an additional conductive layer on the substrate, an additional buffer layer covering the additional conductive layer, a light blocking conductive layer on the additional buffer layer, a buffer layer covering the light blocking conductive layer, and a first semiconductor layer on the buffer layer.
  2. 2. The display device according to claim 1, further comprising a scan driving circuit configured to collect a light sensing signal through the light sensing element, Wherein the circuit layer further comprises a light sensing pixel driver electrically connected to the light sensing element, and a readout line electrically connected between the light sensing pixel driver and the scan driving circuit, and Wherein the sense line is in the additional conductive layer.
  3. 3. The display device of claim 2, wherein the circuit layer further comprises: a light emitting pixel driver electrically connected to the light emitting element, and And a data line electrically connected to the light emitting pixel driver.
  4. 4. A display device according to claim 3, wherein the circuit layer further comprises: a first gate insulating layer covering the first semiconductor layer; a first gate conductive layer on the first gate insulating layer; a second gate insulating layer covering the first gate conductive layer; a second gate conductive layer on the second gate insulating layer; a first interlayer insulating layer covering the second gate conductive layer; A second semiconductor layer on the first interlayer insulating layer; a third gate insulating layer covering the second semiconductor layer; A third gate conductive layer on the third gate insulating layer; a second interlayer insulating layer covering the third gate conductive layer; a first source-drain conductive layer on the second interlayer insulating layer; A first planarization layer covering the first source-drain conductive layer; A second source-drain conductive layer on the first planarization layer; a second planarization layer covering the second source-drain conductive layer; a third source-drain conductive layer on the second planarization layer, and A third planarization layer covering the third source-drain conductive layer, Wherein the data line is in the third source-drain conductive layer.
  5. 5. The display device of claim 4, wherein the display sensing area is in the entire display area.
  6. 6. The display device of claim 4, wherein each of the light sensing pixel drivers comprises: at least one first sense transistor electrically connected between an output node and at least one of the light sensing elements; A second sensing transistor electrically connected between the output node and a reset voltage line configured to transmit a reset voltage; a third sensing transistor electrically connected to a sensing initialization voltage line configured to transmit a sensing initialization voltage, the third sensing transistor being turned on according to a potential of the output node, and And a fourth sensing transistor electrically connected between one of the sense lines and the third sensing transistor.
  7. 7. The display device according to claim 6, wherein each of the at least one first, second, third, and fourth sensing transistors includes a gate electrode, a channel portion overlapping the gate electrode, a first electrode portion connected to one side of the channel portion, and a second electrode portion connected to the other side of the channel portion, The channel portion, the first electrode portion and the second electrode portion of each of the third and fourth sensing transistors are in the first semiconductor layer, The gate electrode of each of the third and fourth sense transistors is in the first gate conductive layer, The first electrode part of the third sensing transistor is electrically connected to the sensing initialization voltage line, The first electrode portion of the fourth sense transistor is connected between the second electrode portion of the third sense transistor and the one side of the channel portion of the fourth sense transistor, and The second electrode portion of the fourth sensing transistor is electrically connected to the one readout line.
  8. 8. The display device according to claim 7, wherein the circuit layer further comprises a readout connection electrode in the third gate conductive layer and electrically connected to the one readout line and the second electrode portion of the fourth sensing transistor.
  9. 9. The display device according to claim 7, wherein the channel portion, the first electrode portion, and the second electrode portion of each of the at least one first sense transistor and the second sense transistor are in the second semiconductor layer, and The gate electrode of each of the at least one first sense transistor and the second sense transistor is in the third gate conductive layer.
  10. 10. The display device according to claim 4, further comprising a display driving circuit configured to supply a data signal of the data line, Wherein the circuit layer further includes data supply lines in the non-display region and electrically connected between each of the data lines and the display driving circuit, and first power supply lines in the non-display region and configured to transmit first power, Wherein the sense line extends to the non-display region, and Each of the data supply lines is in one of the first gate conductive layer and the second gate conductive layer, The first power line is in the light-blocking conductive layer, and A portion of the first power line overlaps the data supply line and the sense line.
  11. 11. The display device according to claim 10, wherein in the display region, a bypass region includes a bypass intermediate region, a first bypass side region parallel to the bypass intermediate region in a first direction and in contact with the non-display region, and a second bypass side region between the bypass intermediate region and the first bypass region, Wherein the data supply line extends to the bypass middle region and the second bypass side region, Wherein the data lines include a first data line in the first bypass side region and a second data line in the second bypass side region, Wherein the circuit layer further includes a first auxiliary line extending in the display area and in the first direction, and a second auxiliary line extending in the display area and in a second direction intersecting the first direction and adjacent to the data line, Wherein the first auxiliary line includes a first bypass auxiliary line in at least one of the first source-drain conductive layer and the second source-drain conductive layer and electrically connected to the first data line, Wherein the second auxiliary line includes a second bypass auxiliary line in the third source-drain conductive layer, adjacent to the second data line, and electrically connected to the first bypass auxiliary line, Wherein the data supply line includes a first data supply line transmitting a data signal of the first data line and a second data supply line transmitting a data signal of the second data line, Wherein the first data supply line is electrically connected to the first data line through the second bypass auxiliary line and the first bypass auxiliary line, and Wherein the second data supply line is directly electrically connected to the second data line.
  12. 12. The display device of claim 10, wherein each of the light emitting pixel drivers comprises: A first transistor electrically connected between a first node and a second node; a second transistor electrically connected between the first node and one of the data lines; a pixel capacitor electrically connected between a first power line configured to transmit the first power and a gate electrode of the first transistor; A third transistor electrically connected between the second node and the gate electrode of the first transistor; A fourth transistor electrically connected between a first initialization voltage line configured to transmit a first initialization voltage and the gate electrode of the first transistor; a fifth transistor electrically connected between the first power line and the first node; A sixth transistor electrically connected between a third node and the second node; A seventh transistor electrically connected between the third node and a second initialization voltage line configured to transmit a second initialization voltage, and An eighth transistor electrically connected between the first node and a bias voltage line configured to transmit a bias voltage.
  13. 13. The display device according to claim 12, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor includes a gate electrode, a channel portion overlapping with the gate electrode, a first electrode portion connected to one side of the channel portion, and a second electrode portion connected to the other side of the channel portion, Wherein the channel portion, the first electrode portion, and the second electrode portion of each of the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are in the first semiconductor layer, Wherein the gate electrode of each of the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor is in the first gate conductive layer, Wherein the channel portion, the first electrode portion, and the second electrode portion of each of the third transistor and the fourth transistor are in the second semiconductor layer, Wherein the gate electrode of each of the third transistor and the fourth transistor is in the third gate conductive layer, and Wherein the light blocking conductive layer includes a light blocking portion overlapping the channel portion of the first transistor.
  14. 14. The display device according to claim 13, wherein the circuit layer further comprises a power auxiliary line in the light blocking conductive layer, connected to the light blocking portion, and configured to transmit the first power.
  15. 15. An electronic device, the electronic device comprising: A display device configured to display an image; A memory configured to store an application; a processor configured to execute the application and transmit an image data signal and an input control signal to the display device, and A power supply module configured to supply power to the display device, Wherein the display device includes a substrate having a display region from which light is emitted and a non-display region around the display region, a circuit layer on the substrate, and an element layer on the circuit layer, Wherein the display region includes emission regions arranged side by side and configured to emit light and non-emission regions between the emission regions, Wherein a display sensing region as at least a portion of the display region includes a light sensing region disposed in the non-emission region, Wherein the element layer includes a light emitting element in the emission region and a light sensing element in the light sensing region, and The circuit layer comprises an additional conductive layer on the substrate, an additional buffer layer covering the additional conductive layer, a light blocking conductive layer on the additional buffer layer, a buffer layer covering the light blocking conductive layer, a first semiconductor layer on the buffer layer, a first gate insulating layer covering the first semiconductor layer, a first gate conductive layer on the first gate insulating layer, a second gate insulating layer covering the first gate conductive layer, a second gate conductive layer on the second gate insulating layer, a first interlayer insulating layer covering the second gate conductive layer, a second semiconductor layer on the first interlayer insulating layer, a third gate insulating layer covering the second semiconductor layer, a third gate conductive layer on the third gate insulating layer, a second interlayer insulating layer covering the third gate conductive layer, a first source-drain conductive layer on the second insulating layer, a first planarization layer covering the first gate insulating layer, a second interlayer insulating layer covering the first drain-source conductive layer, a second source-drain conductive layer, a second planarization layer on the first drain-source electrode, a second drain electrode-planarization layer, a third gate conductive layer covering the second drain electrode-source electrode-planarization layer, a third drain electrode-source electrode-a second electrode-planarization layer, and a third source electrode-planarization layer on the second drain electrode-planarization layer.
  16. 16. The electronic device of claim 15, the electronic device further comprising: a display driving circuit configured to supply the data signal, and A scan driving circuit configured to collect light sensing signals of the light sensing elements, Wherein the circuit layer further comprises a light sensing pixel driver electrically connected to the light sensing element, a readout line electrically connected between the light sensing pixel driver and the scan driving circuit, a light emitting pixel driver electrically connected to the light emitting element, and a data line electrically connected between the light emitting pixel driver and the display driving circuit, Wherein the sense line is in the additional conductive layer, and Wherein the data line is in the third source-drain conductive layer.
  17. 17. The electronic device of claim 16, wherein the display sensing area is in the entire display area.
  18. 18. The electronic device of claim 16, wherein each of the light sensing pixel drivers comprises: at least one first sense transistor electrically connected between an output node and at least one of the light sensing elements; A second sensing transistor electrically connected between the output node and a reset voltage line configured to transmit a reset voltage; a third sensing transistor electrically connected to a sensing initialization voltage line configured to transmit a sensing initialization voltage, the third sensing transistor being turned on according to a potential of the output node, and A fourth sense transistor electrically connected between one of the sense lines and the third sense transistor, Wherein each of the first, second, third and fourth sensing transistors includes a gate electrode, a channel portion overlapped with the gate electrode, a first electrode portion connected to one side of the channel portion, and a second electrode portion connected to the other side of the channel portion, Wherein the channel portion, the first electrode portion, and the second electrode portion of each of the third and fourth sense transistors are in the first semiconductor layer, Wherein the second electrode portion of the fourth sense transistor is electrically connected to the one sense line through a sense connection electrode, and Wherein the readout connection electrode is in the third gate conductive layer.
  19. 19. The electronic device of claim 16, wherein the display driving circuit supplies a data signal of the data line, Wherein the circuit layer further includes data supply lines in the non-display region and electrically connected between each of the data lines and the display driving circuit, and first power supply lines in the non-display region and configured to transmit first power, Wherein the sense lines extend to the non-display area, Wherein each of the data supply lines is in one of the first gate conductive layer and the second gate conductive layer, Wherein the first power line is in the light blocking conductive layer, and Wherein a portion of the first power line overlaps the data supply line and the readout line.
  20. 20. The electronic device of claim 16, wherein each of the light emitting pixel drivers comprises: A first transistor electrically connected between a first node and a second node; a second transistor electrically connected between the first node and one of the data lines; a pixel capacitor electrically connected between a first power line configured to transmit a first power and a gate electrode of the first transistor; A third transistor electrically connected between the second node and the gate electrode of the first transistor; A fourth transistor electrically connected between a first initialization voltage line configured to transmit a first initialization voltage and the gate electrode of the first transistor; a fifth transistor electrically connected between the first power line and the first node; A sixth transistor electrically connected between a third node and the second node; A seventh transistor electrically connected between the third node and a second initialization voltage line configured to transmit a second initialization voltage, and An eighth transistor electrically connected between the first node and a bias voltage line configured to transmit a bias voltage, Wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor includes a gate electrode, a channel portion overlapping the gate electrode, a first electrode portion connected to one side of the channel portion, and a second electrode portion connected to the other side of the channel portion, Wherein the channel portion, the first electrode portion, and the second electrode portion of each of the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are in the first semiconductor layer, Wherein the channel portion, the first electrode portion, and the second electrode portion of each of the third transistor and the fourth transistor are in the second semiconductor layer, and The light blocking conductive layer includes a light blocking portion overlapping the channel portion of the first transistor, and a power auxiliary line connected to the light blocking portion and configured to transmit the first power.

Description

Display device and electronic device including the same Technical Field The present disclosure relates to a display device and an electronic device including the same. Background With the development of information-oriented society, there is an increasing demand for display devices for displaying images in various ways. For example, display devices are used in various electronic devices such as smart phones, digital cameras, laptop computers, navigation devices, and/or smart televisions. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, and a light emitting display device. Examples of the light emitting display device may include an organic light emitting display device including an organic light emitting element, an inorganic light emitting display device including an inorganic light emitting element such as an inorganic semiconductor, and a micro light emitting display device including a micro light emitting element. The organic light emitting display device displays an image using light emitting elements each including a light emitting layer made of an organic light emitting material. As described above, the organic light emitting display device realizes image display using self-luminous elements, and thus can have relatively superior performance in terms of power consumption, response speed, light emitting efficiency, luminance, and wide viewing angle, as compared to other display devices. One surface of the display device may be a display surface including a display area in which an image is displayed and a non-display area that is a periphery of the display area. An emission region emitting light having a corresponding brightness and color may be disposed in the display region. Disclosure of Invention In addition to the function of displaying images, the display device may additionally provide various input functions so as to be applied to various electronic devices. For example, the display device may provide a scanning function for detecting the curvature of an object in contact with the screen based on a difference in the amount of light reflected from the screen. In this case, the display device may include a light sensing element sensing an amount of light, a light sensing pixel driver electrically connected to the light sensing element, a scan driving circuit collecting a light sensing signal through the light sensing element, and a readout line electrically connected between the light sensing pixel driver and the scan driving circuit. However, the light sensing signal transmitted through the readout line may be coupled with the data signal transmitted to the light emitting pixel driver through the data line, and thus may be easily distorted. Therefore, the accuracy of the scanning function may be deteriorated. Alternatively, the sense lines may be spaced (e.g., separated) from the data lines by a critical gap or more in order to reduce coupling failure of the light sense signals. Therefore, it may be difficult to improve the resolution of the display device. In view of the foregoing, one or more embodiments of the present disclosure provide a display device capable of improving resolution while preventing degradation of accuracy of a scanning function, and an electronic device including the display device. However, aspects and features of embodiments of the present disclosure are not limited to the aspects and features set forth herein. The above and other aspects and features of embodiments of the present disclosure will become more apparent to those of ordinary skill in the art to which the present disclosure pertains by referencing the detailed description of the present disclosure given below. According to one or more embodiments of the present disclosure, there is provided a display device including a substrate having a display region from which light is emitted and a non-display region around the display region, a circuit layer on the substrate, and an element layer on the circuit layer. The display region includes emission regions arranged side by side and emitting light and non-emission regions between the emission regions. The display sensing region, which is at least a portion of the display region, includes a light sensing region disposed in the non-emission region. The element layer includes a light emitting element in an emission region and a light sensing element in a light sensing region. The circuit layer includes an additional conductive layer on the substrate, an additional buffer layer covering the additional conductive layer, a light blocking conductive layer on the additional buffer layer, a buffer layer covering the light blocking conductive layer, and a first semiconductor layer on the buffer layer. The display device further includes a scan driving circuit configured to collect the light sensing signal through the light sensing element. The circuit layer further includes a light sensing pixel d