CN-122003141-A - Method for preparing semiconductor structure and semiconductor structure

Abstract

The invention provides a preparation method of a semiconductor structure and the semiconductor structure, and relates to the technical field of semiconductor manufacturing methods. And then depositing an isolation layer on the surface of the nitride layer, wherein a concave part is formed on the isolation layer at a position corresponding to the shallow trench structure. And depositing a hard mask layer on the surface of the isolation layer. The hard mask layer around the recess is then removed by a first polish. And etching to remove the isolation layer around the concave part by taking the hard mask layer as a mask pattern. And finally, grinding for the second time to remove the hard mask layer and the isolation layer. Compared with the prior art, the invention does not introduce any new photomask pattern, skillfully utilizes the physical structure naturally generated by the process, can remove the residual oxide without an AR photomask, simplifies the process steps, reduces a plurality of steps such as photoetching, gluing, developing, photoresist removing and the like, and greatly reduces the cost and time.

Inventors

• SUN GUANGCHAO

Assignees

• 广州增芯科技有限公司

Dates

Publication Date

20260508

Application Date

20260206

Claims (10)

1. 1. A method of fabricating a semiconductor structure, comprising: Providing a substrate, wherein a shallow trench structure is formed in the substrate, a nitride layer is deposited on the surface of the substrate, and the shallow trench structure penetrates through the nitride layer; depositing an isolation layer on the surface of the nitride layer, wherein the isolation layer is filled into the shallow trench structure, and a concave part is formed at a position corresponding to the shallow trench structure; Depositing a hard mask layer on the surface of the isolation layer, wherein the hard mask layer also covers the inner surface of the concave part; Removing the hard mask layer around the concave part by first grinding, and reserving the hard mask layer on the inner surface of the concave part; Etching to remove the isolation layer around the concave part by taking the hard mask layer as a mask pattern; and removing the rest hard mask layer and the isolation layer positioned on the shallow trench structure by secondary grinding so that the isolation layer in the shallow trench structure is level with the nitride layer.
2. 2. The method of claim 1, wherein prior to the step of depositing the spacer layer on the surface of the nitride layer, the method further comprises: and forming a layer of liner layer on the inner wall of the shallow trench structure.
3. 3. The method of claim 1, wherein the step of removing the remaining hard mask layer and the isolation layer on the shallow trench structure by a second polishing comprises: Removing the residual hard mask layer by adopting a timing grinding process; And flattening the isolation layer on the shallow trench structure by adopting an end point detection grinding process so that the isolation layer in the shallow trench structure is level with the nitride layer.
4. 4. The method of claim 3, wherein planarizing the isolation layer on the shallow trench structure using an endpoint detection polishing process comprises: and taking the nitride layer as a grinding stop layer, and adopting an end point detection grinding process to grind and remove the isolation layer on the shallow trench structure.
5. 5. The method of fabricating a semiconductor structure of claim 1, wherein the step of providing a substrate comprises: Forming a buffer layer on a substrate; forming a nitride layer on the buffer layer; and grooving the surface of the nitride layer to form a shallow groove structure, wherein the shallow groove structure penetrates through the nitride layer and the buffer layer.
6. 6. The method of claim 1, wherein after the step of removing the remaining hard mask layer and isolation layer by a second polish, the method further comprises: and removing the nitride layer.
7. 7. The method of claim 1, wherein the step of depositing an isolation layer on the surface of the nitride layer comprises: and growing high-density plasma oxide in the nitride layer and the shallow trench structure by adopting a high-density plasma chemical vapor deposition process so as to form the isolation layer.
8. 8. The method of claim 1, wherein the nitride layer and the hard mask layer are both silicon nitride.
9. 9. A semiconductor structure prepared by the method of preparing a semiconductor structure according to claim 1, wherein the semiconductor structure comprises: A substrate, wherein a shallow trench structure is formed in the substrate; A nitride layer deposited on the surface of the substrate, wherein the shallow trench structure penetrates through the nitride layer; And the isolation layer is filled into the shallow trench structure and is flush with the nitride layer.
10. 10. The semiconductor structure of claim 9, wherein the shallow trench structure has a width of less than 1 μιη.

Description

Method for preparing semiconductor structure and semiconductor structure Technical Field The invention relates to the technical field of semiconductor manufacturing methods, in particular to a semiconductor structure manufacturing method and a semiconductor structure. Background The existing BCD process platform can integrate various devices on the same silicon wafer. In the process, when the initial thickness of an oxide layer deposited on the surface of the whole silicon wafer is too large before chemical mechanical Polishing (CMP, chemical Mechanical Polishing) or the density or Area of an Active Area (AA) is designed to be too large, massive oxide residues on the Active Area (AA) need to be removed, so that oxide residues on SiN after shallow trench isolation chemical mechanical Polishing (STI CMP) are prevented, uneven SiN removal in the subsequent step is caused, and the performance of a device is seriously affected. In this regard, conventional processes typically use photolithography to define a pattern and then etch away the unwanted bulk oxide layer on the AA area, thus requiring the use of an AR mask, and are complex, requiring multiple steps such as photolithography, photoresist coating, developing, photoresist stripping, and the like, which increases costs and time. Disclosure of Invention The invention aims to provide a preparation method of a semiconductor structure and the semiconductor structure, which can remove residual oxide without an AR photomask, simplify process steps and greatly reduce cost and time. In a first aspect, the present invention provides a method for preparing a semiconductor structure, including: Providing a substrate, wherein a shallow trench structure is formed in the substrate, a nitride layer is deposited on the surface of the substrate, and the shallow trench structure penetrates through the nitride layer; depositing an isolation layer on the surface of the nitride layer, wherein the isolation layer is filled into the shallow trench structure, and a concave part is formed at a position corresponding to the shallow trench structure; Depositing a hard mask layer on the surface of the isolation layer, wherein the hard mask layer also covers the inner surface of the concave part; Removing the hard mask layer around the concave part by first grinding, and reserving the hard mask layer on the inner surface of the concave part; Etching to remove the isolation layer around the concave part by taking the hard mask layer as a mask pattern; and removing the rest hard mask layer and the isolation layer positioned on the shallow trench structure by secondary grinding so that the isolation layer in the shallow trench structure is level with the nitride layer. In an alternative embodiment, before the step of depositing the isolation layer on the surface of the nitride layer, the method further comprises: and forming a layer of liner layer on the inner wall of the shallow trench structure. In an alternative embodiment, the step of removing the remaining hard mask layer and the isolation layer on the shallow trench structure by second grinding includes: Removing the residual hard mask layer by adopting a timing grinding process; And flattening the isolation layer on the shallow trench structure by adopting an end point detection grinding process so that the isolation layer in the shallow trench structure is level with the nitride layer. In an alternative embodiment, the step of planarizing the isolation layer on the shallow trench structure using an endpoint detection polishing process includes: and taking the nitride layer as a grinding stop layer, and adopting an end point detection grinding process to grind and remove the isolation layer on the shallow trench structure. In an alternative embodiment, the step of providing a substrate comprises: Forming a buffer layer on a substrate; forming a nitride layer on the buffer layer; and grooving the surface of the nitride layer to form a shallow groove structure, wherein the shallow groove structure penetrates through the nitride layer and the buffer layer. In an alternative embodiment, after the step of removing the remaining hard mask layer and isolation layer by second grinding, the method further comprises: and removing the nitride layer. In an alternative embodiment, the step of depositing an isolation layer on the surface of the nitride layer includes: and growing high-density plasma oxide in the nitride layer and the shallow trench structure by adopting a high-density plasma chemical vapor deposition process so as to form the isolation layer. In an alternative embodiment, the material of the nitride layer and the hard mask layer is silicon nitride. In a second aspect, the present invention provides a semiconductor structure prepared by a method for preparing a semiconductor structure according to the foregoing embodiment, where the semiconductor structure includes: A substrate, wherein a shallow trench structure is formed in the