CN-122003156-A - Substrate and method of embedding semiconductor die

Abstract

The application relates to a substrate and a method of embedding a semiconductor die. A particular implementation of a substrate may include a semiconductor material, a redistribution layer coupled to a first largest planar surface of the semiconductor material, and a hollow via extending completely through a thickness of the semiconductor material from a second largest planar surface of the semiconductor material, the hollow via being directly coupled to the redistribution layer.

Inventors

• Christopher Li Tesla

Assignees

• 半导体元件工业有限责任公司

Dates

Publication Date

20260508

Application Date

20251029

Priority Date

20241104

Claims (20)

1. 1. A substrate, the substrate comprising: A semiconductor material; A redistribution layer coupled to the first largest planar surface of the semiconductor material, an A hollow via extending completely through the thickness of the semiconductor material from the second largest planar surface of the semiconductor material, the hollow via being directly coupled with the redistribution layer.
2. 2. The substrate of claim 1, wherein the redistribution layer comprises at least one thick copper layer.
3. 3. The substrate of claim 1, wherein the redistribution layer comprises at least one dielectric layer and comprises at least one layer of a solderable metal or a sinterable metal.
4. 4. The substrate of claim 1, wherein the semiconductor material is thinned from an initial thickness.
5. 5. The substrate of claim 1, wherein the semiconductor material is silicon carbide.
6. 6. The substrate of claim 1, wherein the semiconductor material is silicon.
7. 7. The substrate of claim 6 further comprising an oxide layer interposed between the redistribution layer and the semiconductor material.
8. 8. The substrate of claim 6 further comprising an oxide layer on the second largest planar surface of the semiconductor material.
9. 9. The substrate of claim 1 further comprising a back metal layer coupled to the second largest planar surface of the semiconductor material.
10. 10. A method of embedding a semiconductor die, the method comprising: providing a silicon substrate, wherein the silicon substrate comprises a first oxide layer; forming at least one opening in the first oxide layer; etching a cavity into the silicon substrate at the at least one opening in the first oxide layer; forming a second oxide layer in the cavity; Forming a thick copper layer on the first oxide layer and on the second oxide layer; patterning the thick copper layer; sintering at least one semiconductor die to the thick copper layer in the cavity; Filling a gap between the at least one semiconductor die and the thick copper layer with polyimide in the cavity; Forming a photopolymer layer over the at least one semiconductor die, the thick copper layer, and the first oxide layer; Patterning the photopolymer layer to form a plurality of openings in the photopolymer layer; forming a first copper layer in the plurality of openings, and A second copper layer is formed over the photopolymer layer and the first copper layer.
11. 11. The method of claim 10, wherein forming the first copper layer and forming the second copper layer occur simultaneously.
12. 12. The method of claim 10, further comprising forming a seed layer on the second oxide layer prior to forming the thick copper layer.
13. 13. The method of claim 10, further comprising baking the polyimide.
14. 14. The method of claim 10, further comprising coupling a redistribution layer or another semiconductor die to the second copper layer.
15. 15. A method of embedding a semiconductor die, the method comprising: providing a silicon substrate, wherein the silicon substrate comprises an oxide layer; Forming a thick copper layer on the oxide layer; patterning the thick copper layer; applying a first photosensitive polyimide over the thick copper layer; Patterning the first photosensitive polyimide to form an opening in the first photosensitive polyimide; Sintering or soldering a semiconductor die in the opening; Forming a first copper layer over the first photosensitive polyimide and the semiconductor die; Applying a second photosensitive polyimide over the first copper layer; patterning the second photosensitive polyimide; Forming a second copper layer on the second photosensitive polyimide, and A redistribution layer or another semiconductor die is coupled to the second copper layer.
16. 16. The method of claim 15, further comprising forming a seed layer on the oxide layer prior to forming the thick copper layer.
17. 17. The method of claim 15, further comprising filling a space around the semiconductor die with polyimide prior to forming the first copper layer.
18. 18. The method of claim 15, wherein forming the first copper layer further comprises simultaneously forming vias and traces.
19. 19. The method of claim 15, wherein forming the first copper layer further comprises first forming a via and then forming a trace.
20. 20. The method of claim 15, wherein forming the second copper layer further comprises: simultaneously forming vias and traces, or The vias are formed first and then the traces are formed.

Description

Substrate and method of embedding semiconductor die Technical Field Aspects of this document relate generally to semiconductor packages. More particularly, implementations relate to power semiconductor packages. Background Semiconductor packages have been designed to provide mechanical support and protection for one or more semiconductor die included in the package. Other semiconductor packages are used to prevent damage to the semiconductor die from electrostatic discharge. Still other semiconductor packages are used to help prevent damage to semiconductor die included in the package from shock, vibration, or humidity. Disclosure of Invention A particular implementation of a substrate may include a semiconductor material, a redistribution layer coupled to a first largest planar surface of the semiconductor material, and a hollow via extending completely through a thickness of the semiconductor material from a second largest planar surface of the semiconductor material, the hollow via being directly coupled to the redistribution layer. Embodiments of the substrate may include one, all or any of the following: the redistribution layer may comprise at least one thick copper layer. The redistribution layer may include at least one dielectric layer and at least one layer of one of a solderable metal or a sinterable metal. The semiconductor material may be thinned from the initial thickness. The semiconductor material may be silicon carbide. The semiconductor material may be silicon. The substrate may include an oxide layer between the redistribution layer and the semiconductor material. The substrate may include an oxide layer on the second largest planar surface of the semiconductor material. The substrate may include a back metal layer coupled to the second largest planar surface of the semiconductor material. A specific implementation of a method of embedding a semiconductor die may include providing a silicon substrate including a first oxide layer thereon, forming at least one opening in the first oxide layer, etching a cavity into the silicon substrate at the at least one opening in the first oxide layer, forming a second oxide layer in the cavity, forming a thick copper layer over the first oxide layer and over the second oxide layer, and patterning the hard copper layer. The method may include sintering at least one semiconductor die to a thick copper layer in a cavity, filling a gap between the at least one semiconductor die and the thick copper layer with polyimide in the cavity, forming a photopolymer layer over the at least one semiconductor die, the thick copper layer, and the first oxide layer, and patterning the photopolymer layer to form a plurality of openings therein. The method may include forming a first copper layer in the plurality of openings and forming a second copper layer over the photopolymer layer and the first copper layer. Specific implementations of the method of embedding a semiconductor die may include one, all, or any of the following: the forming of the first copper layer and the forming of the second copper layer may occur simultaneously. The method may include forming a seed layer on the second oxide layer prior to forming the thick copper layer. The method may include baking the polyimide. The method may include coupling one of the redistribution layer or the further semiconductor die to the second copper layer. A specific implementation of a method of embedding a semiconductor die may include providing a silicon substrate including an oxide layer thereon, forming a thick copper layer on the oxide layer, patterning the thick copper layer, applying a first photosensitive polyimide over the thick copper layer, and patterning the first photosensitive polyimide to form an opening therein. The method may include one of sintering or soldering the semiconductor die in the opening, forming a first copper layer over the first photosensitive polyimide and the semiconductor die, and applying a second photosensitive polyimide over the first copper layer. The method may include patterning a second photosensitive polyimide, forming a second copper layer on the second photosensitive polyimide, and coupling one of the redistribution layer or the other semiconductor die to the second copper layer. Specific implementations of the method of embedding a semiconductor die may include one, all, or any of the following: the method may include forming a seed layer on the oxide layer prior to forming the thick copper layer. The method may include filling a space around the semiconductor die with polyimide prior to forming the first copper layer. Forming the first copper layer may also include forming vias and traces simultaneously. Forming the first copper layer may further include first forming a via and then forming a trace. Forming the second copper layer may also include one of simultaneously forming a via and a trace, or first forming a via and then forming a trace. The above and other aspect