CN-122003157-A - Memory adapter plate for radio frequency core particle integrated system and preparation method thereof

CN122003157ACN 122003157 ACN122003157 ACN 122003157ACN-122003157-A

Abstract

The invention provides a memory adapter plate for a radio frequency core particle integrated system and a preparation method thereof, wherein the preparation method comprises the steps of providing a semiconductor substrate with a plurality of grooves distributed at intervals at the edge part, and forming a grounding layer; the method comprises the steps of providing a plurality of radio frequency core particles, correspondingly placing the radio frequency core particles in a plurality of grooves, forming a first rewiring layer on a grounding layer, forming a second rewiring layer on the first rewiring layer, wherein the second rewiring layer comprises a non-wiring area and a wiring area surrounding the non-wiring area, a conductive circuit layer of the second rewiring layer is arranged in the wiring area, and forming a memristor switch matrix on the non-wiring area, wherein the memristor switch matrix comprises a plurality of input ends and a plurality of output ends. The memory adapter plate prepared by the preparation method for the memory adapter plate of the radio frequency core particle integrated system meets the requirements of parasitic inhibition, process compatibility and thickness reduction, and the radio frequency core particle integrated system with simple structure, low cost and low power consumption is constructed.

Inventors

WU LINCHENG
XU ZONGRUI
ZHANG ZHIYI

Assignees

上海交通大学

Dates

Publication Date: 20260508
Application Date: 20251126

Claims (10)

1. A method of manufacturing a memory patch panel for a radio frequency core integrated system, comprising: providing a semiconductor substrate, wherein the semiconductor substrate comprises a first surface and a second surface which are oppositely arranged, the first surface of the semiconductor substrate comprises a middle part and an edge part surrounding the middle part, and the edge part is provided with a plurality of grooves which are distributed at intervals; Forming a grounding layer on the first surface of the semiconductor substrate and the inner wall of the groove; providing a plurality of radio frequency core particles, wherein each radio frequency core particle is provided with a first surface and a second surface which are opposite, the first surface is provided with a metal bonding pad, the second surface is a grounding surface, and the first surfaces of the radio frequency core particles are upwards so as to be correspondingly placed in a plurality of grooves, so that the grounding surface of the radio frequency core particle is electrically connected with the grounding layer; Forming a first rewiring layer on the grounding layer, wherein the first rewiring layer is electrically connected with the metal bonding pad of the radio frequency core particle, and the grounding layer is provided with an external connection part exposed outside the first rewiring layer; forming a second re-wiring layer on the first re-wiring layer, the second re-wiring layer including a non-wiring region and a wiring region surrounding the non-wiring region, a conductive line layer of the second re-wiring layer being disposed in the wiring region and electrically connected to the conductive line layer of the first re-wiring layer; And forming a memristor switch matrix on the non-wiring area, wherein the memristor switch matrix comprises a plurality of input ends and a plurality of output ends, and each input end and each output end are electrically connected with the conductive circuit layer in the wiring area so as to be electrically communicated with the corresponding radio frequency core particle through the second re-wiring layer and the first re-wiring layer in sequence.
2. The method of manufacturing a memory interposer for a radio frequency core integrated system of claim 1, wherein the step of forming the first rewiring layer comprises: Forming a first dielectric layer on a first surface of the semiconductor substrate, wherein the first dielectric layer covers the ground layer and the radio frequency core particles, and patterning the first dielectric layer to form a plurality of through holes exposing the ground layer and the first surface of the radio frequency core particles on the first dielectric layer; forming a first seed layer on the first dielectric layer, wherein the first seed layer covers the inner wall of the through hole and the first surface of the radio frequency core particle exposed on the first dielectric layer; Forming a first dry film layer on the first seed layer, and patterning the first dry film layer to form a plurality of openings corresponding to the first dielectric layer through holes in the first dry film layer; Forming a first conductive column in the first dielectric layer through hole by adopting an electroplating process, and removing the patterned first dry film layer; forming a first photoresist layer on the first seed layer and the conductive column, and patterning the first photoresist layer; Forming a first wiring conducting layer on the first dielectric layer by adopting an electroplating process, and removing the patterned first photoresist layer; and removing the first seed layer exposed outside the first wiring conductive layer to obtain the first rewiring layer.
3. The method of manufacturing a memory interposer for a radio frequency core integrated system of claim 1, wherein the step of forming the second rewiring layer comprises: Forming a second dielectric layer on the first rewiring layer, wherein the second dielectric layer comprises a non-patterned area and a patterned area surrounding the non-patterned area, and patterning the second dielectric layer in the patterned area to form a plurality of through holes exposing the first wiring conductive layer; forming a second seed layer on the second dielectric layer, wherein the second seed layer covers the inner wall of the through hole and the first wiring conductive layer exposed on the second dielectric layer; forming a second dry film layer on the second seed layer, and patterning the second dry film layer to form a plurality of openings corresponding to the second dielectric layer through holes in the second dry film layer; Forming a second conductive column in the second dielectric layer through hole by adopting an electroplating process, and removing the patterned second dry film layer; Forming a second photoresist layer on the second seed layer and the second conductive column, and patterning the second photoresist layer; Forming a second wiring conducting layer on the second dielectric layer by adopting an electroplating process, and removing the patterned second photoresist layer; and removing the second seed layer exposed outside the second wiring conductive layer to obtain the second re-wiring layer.
4. The method of manufacturing a memory interposer for a radio frequency core integrated system of claim 3, wherein the step of forming a memristor switch matrix comprises: Forming a plurality of bottom electrodes on the second dielectric layer in the non-patterned area, wherein the bottom electrodes are arranged at intervals along the X direction, and two ends of each bottom electrode are electrically connected with the two wiring conductive layers; spin-coating a memristor functional layer on the second dielectric layer in the non-patterned region, the memristor functional layer covering the bottom electrode; patterning the memristor functional layer, and removing the memristor functional layer outside the preset switch matrix unit area to obtain the memristor functional layer unit; And forming a plurality of top electrodes on the second dielectric layer in the non-patterned area, wherein the top electrodes are arranged at intervals along the Y direction and cover the memristor functional layer units, and two ends of each top electrode are electrically connected with the two wiring conductive layers.
5. The method of claim 1, wherein the thickness of the RF core is the same as the depth of the corresponding recess.
6. The method of claim 1, further comprising the step of injecting conductive silver paste into the plurality of grooves to form a conductive silver paste layer between the passive surface of the radio frequency core and the inner wall of the grooves before the active surface of the radio frequency core is upward and correspondingly placed in the plurality of grooves.
7. The method for manufacturing a memory patch panel for a radio frequency core integrated system according to claim 1, wherein: the memristor functional layer includes a Nafion layer.
8. The method for manufacturing a memory patch panel for a radio frequency core integrated system according to claim 1, wherein: the radio frequency core particle comprises a GaAs core particle, a CMOS core particle and a GaN core particle.
9. A memory patch panel for a radio frequency core integrated system, comprising: The semiconductor substrate comprises a first surface and a second surface which are oppositely arranged, wherein the first surface of the semiconductor substrate comprises a middle part and an edge part surrounding the middle part, and the edge part is provided with a plurality of grooves which are distributed at intervals; The grounding layer is positioned on the first surface of the semiconductor substrate and the inner wall of the groove; The radio frequency core particles are correspondingly placed in the grooves, each radio frequency core particle is provided with a first surface and a second surface which are opposite, the first surface is provided with a metal bonding pad, the second surface is a grounding surface, the first surfaces of the radio frequency core particles face upwards, and the grounding surface is electrically connected with the grounding layer; a first rewiring layer located on the ground layer, the first rewiring layer being electrically connected with the metal pad of the radio frequency core particle, and the ground layer having an external connection portion exposed outside the first rewiring layer; a second rewiring layer on the first rewiring layer, the second rewiring layer including a non-wiring region and a wiring region surrounding the non-wiring region, a conductive line layer of the second rewiring layer being disposed in the wiring region and electrically connected with the conductive line layer of the first rewiring layer; the memristor switch matrix is located on the non-wiring area and comprises a plurality of input ends and a plurality of output ends, wherein each input end and each output end are electrically connected with the conductive circuit layer in the wiring area so as to be electrically communicated with the corresponding radio frequency core particle through the second re-wiring layer and the first re-wiring layer in sequence.
10. A radio frequency core integration system, comprising: The memory patch board and antenna assembly for a radio frequency core particle integrated system of claim 9, wherein the antenna assembly comprises a supporting substrate, and a transmitting antenna and a receiving antenna which are arranged on the supporting substrate, the supporting substrate is buckled on one surface of the memory patch board for the radio frequency core particle integrated system, which is provided with the second rewiring layer, the transmitting antenna is electrically connected with the output end of the memristor switch matrix through the second rewiring layer, the receiving antenna is electrically connected with the input end of the memristor switch matrix through the second rewiring layer, and the grounding ends of the transmitting antenna and the receiving antenna are electrically connected with the external connection part of the grounding layer.

Description

Memory adapter plate for radio frequency core particle integrated system and preparation method thereof Technical Field The invention belongs to the technical field of radio frequency core particle integration, and relates to a memory adapter plate for a radio frequency core particle integration system. Background In recent years, the rapid development of the fields of 5G communication, satellite Internet, intelligent driving and the like promotes the evolution of a radio frequency system to miniaturization, complexity and high frequency, the working frequency band of key applications such as a 5G millimeter wave base station module, a satellite communication radio frequency front end and the like breaks through 24GHz, and a single module needs to integrate multiple types of radio frequency core particles, so that severe requirements are provided for signal integrity, thermal management and extreme environment reliability. The current mainstream core particle integrated system adopts an active silicon adapter plate as an interconnection carrier, realizes core particle interconnection through integrating active devices on a silicon substrate, is not designed to adapt to the requirements of digital core particles for the purpose of optimizing the characteristics of radio frequency core particles, has the defects of high cost, high power consumption, high static power consumption of the active devices, incapability of effectively inhibiting parasitic effects, and additional amplification circuit compensation, and formation of vicious cycle of power consumption, complicated and difficult simplification of process steps, large thickness of an integrated structure caused by superposition of the active devices and a multi-layer structure, and limitation of miniaturization of a radio frequency system. Therefore, how to provide a memory adapter board for a radio frequency core integrated system to meet the requirements of parasitic suppression, process simplification and thickness reduction, and to construct a radio frequency core integrated system with compact structure, process compatibility, low cost and low power consumption becomes an important problem to be solved by those skilled in the art. It should be noted that the foregoing description of the background art is only for the purpose of providing a clear and complete description of the technical solution of the present application and is presented for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background of the application section. Disclosure of Invention In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a memory interposer for a radio frequency core integrated system, which is used for solving the problems of high cost, large power consumption, inability to suppress parasitic effects and large thickness of an integrated structure in the prior art that the core integrated system adopts an active silicon interposer as an interconnection carrier. To achieve the above and other related objects, the present invention provides a method for manufacturing a memory interposer for a radio frequency core integrated system, comprising: providing a semiconductor substrate, wherein the semiconductor substrate comprises a first surface and a second surface which are oppositely arranged, the first surface of the semiconductor substrate comprises a middle part and an edge part surrounding the middle part, and the edge part is provided with a plurality of grooves which are distributed at intervals; Forming a grounding layer on the first surface of the semiconductor substrate and the inner wall of the groove; providing a plurality of radio frequency core particles, wherein each radio frequency core particle is provided with a first surface and a second surface which are opposite, the first surface is provided with a metal bonding pad, the second surface is a grounding surface, and the first surfaces of the radio frequency core particles are upwards so as to be correspondingly placed in a plurality of grooves, so that the grounding surface of the radio frequency core particle is electrically connected with the grounding layer; Forming a first rewiring layer on the grounding layer, wherein the first rewiring layer is electrically connected with the metal bonding pad of the radio frequency core particle, and the grounding layer is provided with an external connection part exposed outside the first rewiring layer; forming a second re-wiring layer on the first re-wiring layer, the second re-wiring layer including a non-wiring region and a wiring region surrounding the non-wiring region, a conductive line layer of the second re-wiring layer being disposed in the wiring region and electrically connected to the conductive line layer of the first re-wiring layer; And forming