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CN-122003640-A - Aberration correction in metrology systems

CN122003640ACN 122003640 ACN122003640 ACN 122003640ACN-122003640-A

Abstract

Metrology systems and methods are described. In these systems and methods, one or more super-structured surfaces are used to correct aberrations caused by optical element(s) (e.g., lens, beam splitter, mirror, refractive or diffractive optical component, etc.). The super-structured surface (also referred to as a superlens) is a relatively thin array of 2D planar surface structures configured to modify the trajectory, amplitude, phase, polarization, and/or other characteristics of the incident beam. The one or more super-structured surfaces are configured to replace, for example, one or more refractive elements, diffractive elements, and/or a moving stage previously used for aberration correction in existing metrology systems. Among other advantages, this makes the present metrology system more compact, lighter, and less expensive than existing systems.

Inventors

  • S. Djahani
  • A. In Brazil
  • R. Rezvani Naraji

Assignees

  • ASML荷兰有限公司

Dates

Publication Date
20260508
Application Date
20240912
Priority Date
20231012

Claims (15)

  1. 1. A metrology system associated with semiconductor manufacturing, the system comprising: An optical element configured to receive and transmit an incident radiation beam, the optical element causing aberrations in the incident radiation beam, the aberrations including an undesired change in a target characteristic of the incident radiation beam, and One or more super-structured surfaces configured to reverse the change in the target characteristic to correct the aberration caused by the optical element.
  2. 2. The system of claim 1, wherein the one or more super-constructed surfaces comprise an array of super-constructed surfaces.
  3. 3. The system of claim 2, wherein the array of the super-constructed surfaces comprises a two-dimensional 2D array of super-constructed surfaces.
  4. 4. A system according to claim 2 or 3, wherein each superstructured surface comprises a nano-antenna, a superstructured atom or a nano-particle.
  5. 5. The system of any one of claims 2 to 4, wherein the one or more super-structured surfaces are active.
  6. 6. The system of any one of claims 2 to 4, wherein the one or more super-structured surfaces are passive.
  7. 7. The system of any of claims 1 to 6, wherein the corrected radiation beam is configured to be used in an illumination branch of the metrology system to illuminate a metrology target on a patterned substrate and/or by a detector in a detection branch of the metrology system to generate a metrology detection signal.
  8. 8. The system of any one of claims 1 to 7, wherein the aberrations comprise chromatic aberration, spherical aberration, and/or coma.
  9. 9. The system of any one of claims 1 to 8, wherein the aberrations comprise lateral chromatic aberration.
  10. 10. The system of any of claims 1-9, wherein the undesired change in the target characteristic of the incident radiation beam comprises a shift in the incident radiation beam due to a change in wavelength, and the one or more super-constructed surfaces are configured to adjust the incident radiation beam back to a target position that helps eliminate mechanical movement required of a stage of the metrology system.
  11. 11. The system of any of claims 1 to 10, wherein the undesired change comprises a change in trajectory of the incident radiation beam away from a target focus, and wherein the one or more super-structured surfaces are configured to redirect the incident radiation beam back to the target focus.
  12. 12. The system of any one of claims 1 to 11, wherein the one or more super-structured surfaces are positioned before the optical element along the optical path of the incident radiation beam.
  13. 13. The system of any one of claims 1 to 11, wherein the one or more super-structured surfaces are positioned after the optical element along the optical path of the incident radiation beam.
  14. 14. The system of any one of claims 1 to 13, wherein the optical element comprises a lens, a beam splitter, a mirror, and/or a refractive or diffractive optical component.
  15. 15. The system of any one of claims 1 to 14, wherein the one or more super-structured surfaces are configured to replace one or more refractive elements, diffractive elements, and/or moving stages in the metrology system that were previously used for aberration correction.

Description

Aberration correction in metrology systems Cross Reference to Related Applications The present application claims priority from U.S. application 63/543,884 filed 10/12 of 2023, which is incorporated herein by reference in its entirety. Technical Field The present description relates to aberration correction in metrology systems. Background Lithographic projection apparatus can be used, for example, in the manufacture of Integrated Circuits (ICs). The patterning device (e.g., mask) may comprise or provide a pattern corresponding to an individual layer of the IC (a "design layout"), and this pattern may be transferred onto a target portion (e.g., comprising one or more dies) on a substrate (e.g., a silicon wafer) that has been coated with a layer of radiation-sensitive material (a "resist") by, for example, irradiating the target portion through the pattern on the patterning device. Typically, a single substrate comprises a plurality of adjacent target portions to which the pattern is successively transferred by the lithographic projection apparatus, one target portion at a time. The substrate may undergo various procedures such as priming, resist coating, and soft baking before transferring the pattern from the patterning device to the substrate. After exposure, the substrate may be subjected to other procedures ("post-exposure procedures"), such as post-exposure bake (PEB), development, hard bake, and measurement/inspection of the transferred pattern. The program array is used as a basis for manufacturing individual layers (e.g., ICs) of the device. The substrate may then undergo various processes such as etching, ion implantation (doping), metallization, oxidation, deposition, chemical mechanical polishing, etc., all of which are intended to complete individual layers of the device. If several layers are required in the device, the entire procedure or a variant thereof is repeated for each layer. Eventually, there will be a device in each target portion on the substrate. These devices are then separated from each other by techniques such as dicing or sawing so that individual devices can be mounted on a carrier, connected to pins, etc. The device manufacturing process may be considered a patterning process. Patterning processes involve patterning steps, such as optical and/or nanoimprint lithography using a patterning device in a lithographic apparatus to transfer a pattern on the patterning device to a substrate, and patterning processes typically, but optionally, involve one or more related pattern processing steps, such as resist development by a developing device, baking of the substrate using a baking tool, etching with a pattern using an etching device, deposition, etc. Photolithography is a core step in the fabrication of devices such as ICs, where patterns formed on a substrate define the functional elements of the device, such as microprocessors, memory chips, and the like. Similar lithographic techniques are also used in forming flat panel displays, microelectromechanical systems (MEMS) and other devices. With the continued advancement of semiconductor manufacturing processes, the size of functional elements has been continuously reduced, and the number of functional elements (such as transistors) per device has steadily increased over decades following a trend commonly referred to as "moore's law. In the state of the art, layers of the apparatus are manufactured using a lithographic projection apparatus that uses illumination from a deep ultraviolet illumination source to project a design layout onto a substrate, creating individual functional elements having dimensions well below 100 nm (i.e., less than half the wavelength of the radiation from the illumination source (e.g., 193nm illumination source). This process in which features having dimensions smaller than the classical resolution limit of a lithographic projection apparatus are printed according to the resolution formula cd=k 1 ×λ/NA is commonly referred to as low-k 1 lithography, where λ is the wavelength of the radiation employed (currently in most cases 248nm or 193 nm), NA is the numerical aperture of the projection optics in the lithographic projection apparatus, CD is the "critical dimension", typically the minimum feature size printed, and k 1 is the empirical resolution factor. In general, the smaller the k 1, the more difficult it becomes to reproduce a pattern on a substrate that is similar in shape and size to what a designer desires to achieve a particular electrical function and performance. To overcome these difficulties, complex fine tuning steps are applied to lithographic projection apparatus, design layouts or patterning devices. These fine tuning steps include, for example, but are not limited to, optimization of NA and optical coherence settings, tailoring the illumination scheme, using phase shifting patterning devices, optical proximity correction (OPC, sometimes also referred to as "optical and process correction"