CN-122003808-A - Power factor correction architecture

CN122003808ACN 122003808 ACN122003808 ACN 122003808ACN-122003808-A

Abstract

A circuit architecture includes a plurality of circuits, each circuit including a phase rectifier bridge, at least two inductors, each connected to an inlet and an outlet of the phase rectifier bridge, at least one transistor connected between the outlets of each inductor, and at least two diodes, each diode connected to the inlet and the outlet of the transistor, the plurality of circuits capable of outputting a DC voltage at an output terminal.

Inventors

Albedo Blani

Assignees

MKS股份有限公司

Dates

Publication Date: 20260508
Application Date: 20241017
Priority Date: 20231027

Claims (16)

1. A circuit architecture, comprising: a plurality of circuits, each of the plurality of circuits comprising: a phase rectifier bridge; at least two inductors, each of the at least two inductors connected to an inlet end and an outlet end of the phase rectifier bridge; At least one transistor connected between the output terminals of each of the at least two inductors, and At least two diodes, each of the at least two diodes being connected to an inlet and an outlet of the at least one transistor, Wherein the plurality of circuits are capable of outputting a direct voltage at the output terminal.
2. The circuit architecture of claim 1, wherein the circuit architecture is capable of three-phase active power factor correction.
3. The circuit architecture of claim 1, wherein the at least two inductors have equal impedance.
4. The circuit architecture of claim 1, wherein the at least one transistor is a silicon carbide MOSFET transistor.
5. The circuit architecture of claim 1, further comprising a direct connection to a three-phase power supply through a main line.
6. The circuit architecture of claim 5, wherein the plurality of circuits have a delta connection to the main rail.
7. A voltage source inverter circuitry, comprising: A transformer for receiving three-phase ac power from an ac source; a circuit architecture comprising a plurality of circuits, each of the plurality of circuits comprising: a phase rectifier bridge; at least two inductors, each of the at least two inductors connected to an inlet end and an outlet end of the phase rectifier bridge; at least one transistor connected between the output terminals of each of the at least two inductors, and At least two diodes, each of the at least two diodes connected to an inlet and an outlet of the at least one transistor; Wherein the plurality of circuits are capable of outputting a direct voltage at an output terminal; an inverter for receiving DC power and converting the DC power into AC power, and A link circuit connected between each dc output and the inverter circuit, the link circuit comprising a dc bus and a dc bus capacitor, the dc bus having a first rail and a second rail to provide the dc voltage, and the dc bus capacitor being capable of smoothing voltage ripple across the first rail and the second rail.
8. The voltage source inverter circuitry of claim 7, wherein the circuit architecture is capable of three-phase active power factor correction.
9. The voltage source inverter circuitry of claim 7, wherein the at least two inductors have equal impedance.
10. The voltage source inverter circuitry of claim 7, wherein the at least one transistor is a silicon carbide MOSFET transistor.
11. The voltage source inverter circuitry of claim 7 further comprising a direct connection to a three-phase power supply through a main line.
12. The voltage source inverter circuitry of claim 11, wherein the plurality of circuits have a delta connection to the main rail.
13.A power factor correction circuit, comprising: a plurality of single-phase boost converters, each of the plurality of single-phase boost converters comprising: a rectifier bridge; A first inductor connected between an input of the rectifier bridge and a first node; a second inductor connected between the output of the rectifier bridge and a second node; a transistor connected between the first node and the second node, and A first diode connected between the first node and a positive output terminal; a second diode connected between the second node and the positive output terminal; wherein the plurality of single-phase boost converters are connected in a delta configuration to receive three-phase alternating current power, and A controller configured to operate the transistors of the plurality of single-phase boost converters to perform power factor correction.
14. The power factor correction circuit of claim 13, wherein the controller comprises a master stage and two slave stages, the master stage configured to calculate current set points for the master stage itself and the two slave stages.
15. The power factor correction circuit of claim 13, wherein the first inductor and the second inductor of each of the plurality of single-phase boost converters have equal inductance values.
16. The power factor correction circuit of claim 13, further comprising a dc bus capacitance connected across the positive and negative output terminals, wherein the dc bus capacitance is a film capacitor.

Description

Power factor correction architecture Technical Field The present invention relates to an apparatus capable of performing power factor correction, and a method of performing power factor correction using the same. Background A Variable Frequency Drive (VFD) based voltage source inverter has an ac-dc rectifier unit equipped with a large dc bus capacitor to smooth the voltage ripple. The dc bus capacitor draws charging current only when discharging to the motor load. When the input rectifier is forward biased (which occurs when the instantaneous input voltage is higher than the dc voltage across the dc bus capacitor), a charging current flows into the dc bus capacitor. The pulsed current drawn from the ac source is rich in harmonics due to the discontinuity. This type of nonlinear current flow is associated with a poor input power factor. Furthermore, the power delivery device also suffers from unnecessary power loss and affects overall system efficiency. In view of the above, there is a need for alternative power supply topologies that help improve input power factor and reduce input current distortion, thereby improving system efficiency. Techniques that are both active and passive can be employed to improve the current waveform and reduce the total current harmonics. Active techniques are advantageous over passive techniques from a size and performance perspective. However, the cost of certain types of active technologies may be higher than the cost of passive technologies. Three-phase power factor corrector circuits and circuits capable of rectifying signals using three-phase rectifier bridges are known. Fig. 1 shows a known circuit system configuration capable of rectifying using a three-phase rectifier bridge. The circuit illustrated in fig. 1 includes a three-phase rectifier bridge connected to an input capacitor and a load. This circuitry produces high current peaks in the main line and also produces distortion in the voltage if the line impedance is high. Furthermore, without any type of power factor correction, the power factor would be very low, in the range of 0.6, and the harmonic content of the three currents of the power supplies V1, V2 and V3 would be very high. For a circuit having the topology of fig. 1, at any given moment, three semiconductor devices are operating-which is three diodes and a semiconductor switch or three diodes. This may reduce power loss in the boost converter, thereby improving system efficiency. But the dc inductor needs to be designed to handle the dc component, which can make it bulky. The ac inductor can be made smaller because the magnetic flux in the core is not unidirectional. In addition, the input ac inductor also helps to reduce conducted electromagnetic interference (EMI) noise. But control requires sensing the input current through all of the boost inductors. This can be a complex process. To address this problem, other three-phase PFC controller architectures have been developed. Active PFC systems can be drawn into two types, direct three-phase systems and phase modular systems. The phase modular system can be further divided into a Y-type rectifier and a Delta-type rectifier. Direct three-phase rectification systems may have a variety of configurations. The vienna architecture is the most common of such architectures, as shown in fig. 2. The illustrated configuration allows good power factor correction performance and efficiency using only three controlled switches and 18 discrete diodes. The success of this architecture is that all necessary components are rated at 650V because they are connected between the input phase and the "virtual neutral". The introduction of silicon carbide allows for comparable performance between 650V and 1200V devices. One of the main drawbacks of such a configuration is that a large number of discrete diodes are required and the presence of the control algorithm also requires digital control with firmware that requires long time setting and debugging of the control. The vienna rectifier system is a unidirectional converter that can only function in rectifier mode, cannot operate in inverter mode, and the generation of reactive power is severely limited. Typically, the vienna rectifier is controlled based on a dc control method. However, this approach allows inappropriate control sequences to occur. The application of vienna rectifiers in the field of electrical dc drive is limited only to systems with low dynamic range without regenerative braking. What is needed is a solution that uses an off-the-shelf single-phase power factor control controller that is easy to design, as compared to the solutions presented in the prior art. Fig. 3 is a circuit schematic of a prior art phase-modularized power factor correction circuit. The circuit uses an autotransformer to have a "" center star "" point. As can be seen in the figures, the zig-zag autotransformer 20 may take a conventional configuration and provide a neutral point N. As shown