CN-122003969-A - Package and method for manufacturing a package

Abstract

The packaged chip can be realized while minimizing an increase in the mounting area. A package includes a sensor chip mounted face-down, a semiconductor chip mounted face-down at a position different from the sensor chip, a sealing material sealing the sensor chip and the semiconductor chip together in such a manner that a back surface side of the sensor chip is exposed, and a wiring layer formed on a mounting surface on which the sensor chip and the semiconductor chip are mounted. The sensor chip may be a backside illuminated image sensor. The package further includes an interposer substrate including a wiring layer, and the interposer substrate may include a through electrode connected to the wiring layer.

Inventors

• Da Pingguang

Assignees

• 索尼半导体解决方案公司

Dates

Publication Date

20260508

Application Date

20240819

Priority Date

20231012

Claims (20)

1. 1. A package, comprising: A sensor chip mounted face down; a semiconductor chip mounted face down at a different position from the sensor chip; a sealing material for sealing the sensor chip and the semiconductor chip together in such a manner that the back surface side of the sensor chip is exposed, and Wiring layers formed on a mounting surface on which the sensor chip and the semiconductor chip are mounted.
2. 2. The package of claim 1, wherein The sensor chip is a backside illuminated image sensor.
3. 3. The package of claim 1, wherein The back surface side of the semiconductor chip is exposed from the sealing material.
4. 4. The package of claim 1, wherein The sealing material is a molded resin.
5. 5. The package of claim 1, further comprising An interposer substrate including the wiring layer, wherein The interposer substrate includes a through electrode connected to the wiring layer.
6. 6. The package of claim 5, wherein The sensor chip and the semiconductor chip are flip-chip mounted on the interposer substrate.
7. 7. The package of claim 5, wherein The position of the end portion of the sealing material in the horizontal direction is equal to the position of the end portion of the interposer substrate in the horizontal direction.
8. 8. The package of claim 1, wherein The wiring layer is a redistribution layer formed between the mounting surface on which the sensor chip and the semiconductor chip are mounted and the sealing material.
9. 9. The package of claim 1, wherein The distance between the sensor surface of the sensor chip and the mounting surface is shorter than the distance between the back surface of the semiconductor chip and the mounting surface.
10. 10. The package of claim 1, wherein The distance between the surface of the sealing material and the mounting surface is longer than the distance between the back surface of the semiconductor chip and the mounting surface.
11. 11. The package of claim 1, wherein The distance between the sensor surface of the sensor chip and the mounting surface is equal to the distance between the back surface of the semiconductor chip and the mounting surface.
12. 12. The package of claim 1, wherein The sensor chip includes a plurality of sensor chips having different types and mounted face down at different positions from each other.
13. 13. The package of claim 1, further comprising A transparent substrate disposed on a sensor surface of the sensor chip.
14. 14. The package of claim 13, further comprising And a transparent adhesive layer provided between the sensor chip and the transparent substrate.
15. 15. The package of claim 13, further comprising And a cavity arranged between the sensor chip and the transparent substrate.
16. 16. The package of claim 15, wherein The height of the cavity on the sensor surface is greater than the height of the cavity on an area other than the sensor surface.
17. 17. The package of claim 1, further comprising An opaque layer disposed around a sensor surface of the sensor chip.
18. 18. The package of claim 1, further comprising A spacer disposed around a sensor surface of the sensor chip.
19. 19. A method for manufacturing a package, comprising: A step of collectively sealing the sensor chip and the semiconductor chip disposed at different positions from each other with a sealing material; and thinning the sensor chip, the semiconductor chip and the sealing material to expose a back surface of the sensor chip and a back surface of the semiconductor chip.
20. 20. The method of manufacturing a package of claim 19, the method further comprising: and a step of mounting the sensor chip and the semiconductor chip face down on an interposer substrate at different positions from each other before the sensor chip and the semiconductor chip are sealed together with the sealing material.

Description

Package and method for manufacturing a package Technical Field The present technology relates to a package and a method of manufacturing the package. In particular, the present technology relates to a package to which chip pellets are applied and a method for manufacturing the package. Background In order to enable high density integration of the sensor chip, the die (chiplets) may be applied to a System In Package (SiP) or the like. For example, an apparatus having a sensor disposed on a substrate and including an active surface and a sensor bonding pad, and a mold layer covering a side surface of the sensor (see, for example, patent document 1). List of references Patent literature Patent document 1 JP 2022-532811A Disclosure of Invention Problems to be solved by the invention However, in the above-described related art, since the overhang portion of the mold layer is formed on the sensor, there is a risk that the chip size may increase due to the overhang portion. The present technology has been made in view of such a situation, and its object is to enable packaging of chips while minimizing an increase in mounting area. Solution to the problem The present technology is made to solve the above-described problems, and a first aspect thereof is a package including a sensor chip mounted face-down, a semiconductor chip mounted face-down at a position different from the sensor chip, a sealing material sealing the sensor chip and the semiconductor chip together in such a manner that a back surface side of the sensor chip is exposed, and a wiring layer formed on a mounting surface on which the sensor chip and the semiconductor chip are mounted. Thus, an effect of improving the mounting density of chips of different sizes while enabling sensing is obtained. Further, in the first aspect, the sensor chip may be a backside illuminated image sensor. Thus, an effect of enabling sensing of the sensor chip while the sensor chip is mounted face down is obtained. Further, in the first aspect, the back surface side of the semiconductor chip may be exposed from the sealing material. Thus, the effect of reducing the height difference around the sensor chip while the sensor chip and the semiconductor chip are sealed together is obtained. Further, in the first aspect, the sealing material may be a molded resin. Thus, the effect that the sensor chip and the semiconductor chip are sealed together is obtained. Further, in the first aspect, the package further includes an interposer substrate including a wiring layer, wherein the interposer substrate may include a through electrode connected to the wiring layer. Thus, an effect of electrically connecting the sensor chip and the semiconductor chip mounted face down to the outside is obtained. Further, in the first aspect, the sensor chip and the semiconductor chip may be flip-chip mounted on the interposer substrate. Thus, the effect of mounting the sensor chip and the semiconductor chip face down while electrically connecting the sensor chip and the semiconductor chip to the interposer substrate is obtained. Further, in the first aspect, the position of the end portion of the sealing material in the horizontal direction may be equal to the position of the end portion of the interposer substrate in the horizontal direction. Thus, an effect of realizing Wafer Level Chip Size Package (WLCSP) to which the chip particles are applied is obtained. Further, in the first aspect, the wiring layer may be a redistribution layer formed between the mounting surface on which the sensor chip and the semiconductor chip are mounted and the sealing material. Thus, an effect of electrically connecting the sensor chip and the semiconductor chip mounted face down to the outside without forming the through electrode in the package is obtained. Further, in the first aspect, a distance between the sensor surface of the sensor chip and the mounting surface may be shorter than a distance between the back surface of the semiconductor chip and the mounting surface. Thus, an effect of forming a sensor chip having a recess having a bottom surface where a sensor surface is disposed is obtained. Further, in the first aspect, a distance between the surface of the sealing material and the mounting surface may be longer than a distance between the back surface of the semiconductor chip and the mounting surface. Thus, the effect of encapsulating the semiconductor chip with the sealing material is obtained. Further, in the first aspect, a distance between the sensor surface and the mounting surface of the sensor chip may be equal to a distance between the back surface and the mounting surface of the semiconductor chip. Thus, the effect of realizing a backside illuminated image sensor while minimizing the height difference around the sensor surface of the sensor chip is obtained. Further, in the first aspect, the sensor chip may include a plurality of sensor chips having different types and mounted face down at differ