CN-122003986-A - Integrated device and integrated passive device including an inductively coupled inductor surrounded by magnetic material

Abstract

A device includes a die substrate, a plurality of interconnects over the die substrate, wherein the plurality of interconnects includes a first plurality of interconnects including a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor, and a second plurality of interconnects including a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor, wherein the first inductor and the second inductor are intertwined, at least one magnetic layer surrounding at least a portion of the first plurality of via interconnects and at least a portion of the second plurality of via interconnects, and at least one dielectric layer over the die substrate.

Inventors

• K.LIU
• J-Y.Qiu
• J.Jin

Assignees

• 高通股份有限公司

Dates

Publication Date

20260508

Application Date

20240912

Priority Date

20230926

Claims (20)

1. 1. A device, the device comprising: A die substrate; a plurality of interconnects located over the die substrate, wherein the plurality of interconnects comprises: A first plurality of interconnects including a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor, and A second plurality of interconnects including a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor, Wherein the first inductor is intertwined with the second inductor; At least one magnetic layer surrounding at least a portion of the first plurality of via interconnects and at least a portion of the second plurality of via interconnects, and At least one of the dielectric layers is formed, the at least one dielectric layer is located over the die substrate.
2. 2. The device of claim 1, wherein the first inductor and the second inductor are configured as transformers or inductively coupled inductors.
3. 3. The device according to claim 1, Wherein the first inductor comprises a first solenoid inductor, and Wherein the second inductor comprises a second solenoid inductor intertwined with the first solenoid inductor.
4. 4. The device of claim 1, further comprising a plurality of transistors in the die substrate.
5. 5. The device of claim 1, wherein the plurality of interconnects comprises a plurality of redistribution interconnects.
6. 6. The device of claim 5, wherein the plurality of redistribution interconnects comprises one or more redistribution metal layers.
7. 7. The device of claim 1, wherein the at least one magnetic layer comprises an insulating layer and/or a dielectric layer.
8. 8. The device of claim 1, wherein the at least one magnetic layer comprises a non-conductive material.
9. 9. The device of claim 1, wherein the at least one magnetic layer has a relative permeability value greater than 1.
10. 10. The device of claim 1, wherein the device is selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile phone, a smart phone, a personal digital assistant, a fixed location terminal, a tablet computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, and a device in a motor vehicle.
11. 11. A method, the method comprising: Providing a die substrate; forming a plurality of interconnects, the plurality of interconnects being located over the die substrate, Wherein the plurality of interconnects comprises: A first plurality of interconnects including a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor, and A second plurality of interconnects including a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor, Wherein the first inductor is intertwined with the second inductor; Forming at least one magnetic layer surrounding at least a portion of the first plurality of via interconnects and at least a portion of the second plurality of via interconnects, and At least one dielectric layer is formed over the die substrate.
12. 12. The method of claim 11, wherein the first inductor and the second inductor are configured as transformers or inductively coupled inductors.
13. 13. The method according to claim 11, Wherein the first inductor comprises a first solenoid inductor, and Wherein the second inductor comprises a second solenoid inductor intertwined with the first solenoid inductor.
14. 14. The method of claim 11, further comprising a plurality of transistors in the die substrate.
15. 15. The method of claim 11, wherein the plurality of interconnects comprises a plurality of redistribution interconnects.
16. 16. The method of claim 15, wherein the plurality of redistribution interconnects comprises one or more redistribution metal layers.
17. 17. The method of claim 11, wherein the at least one magnetic layer comprises an insulating layer and/or a dielectric layer.
18. 18. The method of claim 11, wherein the at least one magnetic layer comprises a non-conductive material.
19. 19. The method of claim 11, wherein the at least one magnetic layer has a relative permeability value greater than 1.
20. 20. The method of claim 11, wherein the at least one magnetic layer, the first inductor, and the second inductor are integrated passive devices or part of an integrated device.

Description

Integrated device and integrated passive device including an inductively coupled inductor surrounded by magnetic material Cross Reference to Related Applications The present application claims priority and equity to U.S. non-provisional application serial No. 18/475,080 filed by the U.S. patent and trademark office at month 26 of 2023, the entire contents of which are incorporated herein by reference as if fully set forth in its entirety below and for all applicable purposes. Fields Various features relate to packages, integrated devices, and/or integrated passive devices. Background The package may include a substrate, an integrated device, and an integrated passive device. The substrate may include a plurality of interconnects. The integrated device and/or the integrated passive device may be coupled to an interconnect of the substrate. There is a continuing need to provide smaller packages with improved performance. Disclosure of Invention Various features relate to packages, integrated devices, and/or integrated passive devices. One example provides a device comprising a die substrate, a plurality of interconnects located over the die substrate, wherein the plurality of interconnects comprises a first plurality of interconnects including a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor, and a second plurality of interconnects including a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor, wherein the first inductor and the second inductor are intertwined, at least one magnetic layer surrounding at least a portion of the first plurality of via interconnects and at least a portion of the second plurality of via interconnects, and at least one dielectric layer located over the die substrate. Another example provides a method of providing a die substrate. The method forms a plurality of interconnects that are located over the die substrate. The plurality of interconnects includes a first plurality of interconnects including a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor, and a second plurality of interconnects including a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor, wherein the first inductor and the second inductor are intertwined. The method forms at least one magnetic layer surrounding at least a portion of the first plurality of via interconnects and at least a portion of the second plurality of via interconnects. The method forms at least one dielectric layer over the die substrate. Drawings Various features, objects, and advantages will become apparent upon reading the following detailed description in conjunction with the drawings in which like reference characters identify correspondingly throughout. Fig. 1 illustrates an exemplary cross-sectional view of a package including a substrate, an integrated device, and an integrated passive device. Fig. 2 illustrates an exemplary cross-sectional view of an integrated passive device including magnetic material surrounding an interconnect. Fig. 3 illustrates an exemplary cross-sectional view of an integrated passive device including magnetic material surrounding an interconnect. Fig. 4 illustrates an exemplary cross-sectional view of an integrated passive device including magnetic material surrounding an interconnect. Fig. 5 illustrates a plan view of metal layers of an integrated passive device. Fig. 6 illustrates a plan view of another metal layer of the integrated passive device. Fig. 7 illustrates a plan view of two metal layers of an integrated passive device. Fig. 8 illustrates an exemplary cross-sectional view of an integrated device including magnetic material surrounding an interconnect. Fig. 9 illustrates an exemplary graph of the inductance of an inductor surrounded by magnetic material and/or an inductively coupled inductor. Fig. 10A-10J illustrate an exemplary process for fabricating an integrated passive device including magnetic material surrounding an interconnect. Fig. 11 illustrates an exemplary flow chart of a method for fabricating an integrated passive device including magnetic material surrounding an interconnect. Fig. 12 illustrates an exemplary process for fabricating a package including a substrate, an integrated device, and an integrated passive device. Fig. 13 illustrates an exemplary flow chart of a method for fabricating a package including a substrate, an integrated device, and an integrated passive device. Fig. 14 illustrates various electronic devices that may integrate a die, electronic circuit, integrated device, integrated Passive Device (IPD), passive component, package, and/or device package described herein. Detailed Description In the following description, specific details are given to provide a thorough understanding of various asp