CN-122008061-A - Silicon wafer V-shaped groove polishing positioning deviation management and control system

CN122008061ACN 122008061 ACN122008061 ACN 122008061ACN-122008061-A

Abstract

The invention discloses a silicon wafer V-shaped groove polishing positioning deviation management and control system, which particularly relates to the field of semiconductor material manufacturing, and comprises the steps of collecting relevant parameters of a silicon wafer V-shaped groove, a positioning block and a Notch grinding part, calculating to obtain polishing abnormal inducement parameters, calling PEEK material parameters, designing a novel positioning block by combining positioning requirements and installation space, verifying accuracy through CAD modeling, collecting positioning block parameter fitting abrasion trend, setting an inspection period, detecting abrasion parameter comparison threshold, and establishing a replacement mechanism. According to the invention, a novel positioning block structure is designed by adopting PEEK materials, so that the abrasion resistance is improved, the positions of the grinding part and the V-shaped groove are calibrated by combining parameter detection and operation, a positioning block periodic inspection and replacement mechanism is established, and polishing abnormal causes are quantitatively judged through production data statistics, physical detection and mechanism analysis, so that a standardized management and control flow is formed to replace experience management and control, and polishing abnormal reworking, management and control process and material cost are reduced.

Inventors

CHEN KAI
HONG YI
WU FENQI
ZHANG JING
GUO BEIBEI
MA AI
CHEN KUI
XUE HAO

Assignees

上海中欣晶圆半导体科技有限公司

Dates

Publication Date: 20260512
Application Date: 20260324

Claims (9)

1. The utility model provides a silicon chip V type groove polishing positioning deviation management and control system which characterized in that, the system includes: Collecting image outline parameters of a silicon wafer V-shaped groove which is not thrown in place, actual size parameters of a transplanting arm positioning block, and relative position coordinate parameters of a Notch grinding part and the V-shaped groove, and performing set association operation on the parameters to obtain polishing abnormal cause parameters; the method comprises the steps of calling wear resistance, hardness and creep resistance parameters of PEEK materials, combining silicon wafer positioning requirement parameters and equipment installation space parameters, designing a novel positioning block structure aiming at a positioning block wear key part, modeling and simulating the contact state of the silicon wafer and the positioning block through CAD software, and performing matching verification on modeling structure parameters and positioning precision requirement parameters; Manufacturing a novel positioning block sample, assembling the novel positioning block sample to a test bed transplanting arm, detecting the actual positioning coordinate parameter of the silicon wafer through a coordinate measuring instrument, performing difference operation on the actual positioning coordinate parameter and the standard positioning coordinate parameter of the silicon wafer to obtain a positioning deviation parameter, and comparing the V-shaped groove polishing and grinding effect parameters of the used novel positioning block and the old positioning block; and acquiring a using time length parameter, a production frequency parameter and a trial stage abrasion rate parameter of the positioning block, performing fitting operation to obtain a positioning block abrasion trend parameter, setting an inspection period, periodically detecting an actual abrasion parameter of the positioning block, comparing the actual abrasion parameter with an abrasion early warning threshold parameter, and establishing a positioning block replacement mechanism.
2. The system for controlling polishing positioning deviation of a silicon wafer V-shaped groove according to claim 1, wherein the step of collecting the complete profile coordinate parameters of the polished area, the area parameters of the unpolished area and the position coordinate parameters of the unpolished area of the V-shaped groove after the step of polishing the edge of the silicon wafer is performed.
3. The system for controlling polishing positioning deviation of a silicon wafer V-shaped groove according to claim 1, wherein the actual dimension parameter of the positioning block of the transplanting arm is a length dimension parameter, a width dimension parameter, a height dimension parameter obtained by detecting a key position where the positioning block is in contact with the silicon wafer, and a difference value parameter between the length dimension parameter, the width dimension parameter and the height dimension parameter.
4. The system for controlling polishing positioning deviation of a V-shaped groove of a silicon wafer according to claim 1, wherein the relative position coordinate parameters of the Notch grinding part and the V-shaped groove are the detected working reference coordinate parameter of the Notch grinding part, the central position coordinate parameter of the V-shaped groove of the silicon wafer, and the offset parameter of the Notch grinding part and the V-shaped groove in the horizontal direction and the offset parameter in the vertical direction.
5. The system for controlling polishing positioning deviation of a silicon wafer V-shaped groove according to claim 1, wherein the novel positioning block is structurally designed to adjust structural radian parameters, contact area parameters and chamfer size parameters of a contact area of the positioning block and the silicon wafer according to the abrasion key parts of the positioning block in the polishing abnormal inducement parameters.
6. The system for controlling the polishing positioning deviation of the silicon wafer V-shaped groove according to claim 1, wherein the CAD software is used for modeling and verifying, in order to guide the structural parameters of the novel positioning block into the computer aided design software, simulate the actual contact state of the silicon wafer and the positioning block, calculate and obtain the simulated positioning deviation parameters, and compare and verify with the preset positioning precision parameters.
7. The system for controlling polishing positioning deviation of a silicon wafer V-shaped groove according to claim 1, wherein the comparison of polishing effect parameters of the V-shaped groove of the new positioning block and the old positioning block is to count the batch number parameters of abnormal polishing of the silicon wafer V-shaped groove and the maximum size parameters of the area which is not polished in place during the trial of the two, and then calculate the polishing abnormal rate parameters of the two according to the statistical result and compare the difference.
8. The system for controlling the polishing positioning deviation of a silicon wafer V-shaped groove according to claim 1, wherein the fitting operation of the inspection period of the positioning block is to perform multiple fitting operation on the time length parameter of the positioning block, the production frequency parameter and the abrasion rate parameter of the positioning block obtained in the trial stage to obtain the abrasion trend parameter of the positioning block, and then set the parameter of the fixed inspection period of not more than fifteen days according to the parameter.
9. The system for controlling polishing positioning deviation of a silicon wafer V-shaped groove according to claim 1, wherein the positioning block replacement mechanism is configured to compare an actual wear parameter of a positioning block obtained by periodic detection with a preset wear early-warning threshold parameter, and to immediately replace the positioning block if the actual wear parameter is greater than or equal to the wear early-warning threshold parameter, and to record a time-length parameter of use of the positioning block during replacement and a lot parameter of a corresponding production silicon wafer, so as to update a wear rate parameter of the positioning block.

Description

Silicon wafer V-shaped groove polishing positioning deviation management and control system Technical Field The invention relates to the field of semiconductor material manufacturing, in particular to a silicon wafer V-shaped groove polishing positioning deviation management and control system. Background The technical field of semiconductor material manufacturing comprises the technical research and process implementation of the whole process related to the preparation and processing of a semiconductor silicon wafer, the core carries out technical optimization around key processes such as cutting, grinding, cleaning, edge polishing and the like of the silicon wafer, the technical research and development are mainly carried out aiming at the precision control deviation adjustment performance guarantee of each link of the silicon wafer production, and the technical development of the technical research and the development comprises the structural design and material selection of various positioning components and grinding components in the production process, the establishment of a parameter detection mechanism in the process execution and the like, and is the basic technical field of semiconductor device manufacturing, and the technical development of the technical development directly influences the processing precision and the yield level of silicon wafer products. In the side polishing process of semiconductor silicon wafer production, the phenomenon that one side of a V-shaped groove is not polished in place occurs, and according to analysis, a transplanting arm positioning block on which a silicon wafer is positioned in the prior art is easy to abrade, so that the silicon wafer positioning accuracy is affected, and meanwhile, the Notch grinding part and the position of the V-shaped groove of the silicon wafer are offset, so that the grinding cloth is not matched with the position of the V-shaped groove of the silicon wafer, the polishing of the V-shaped groove is abnormal finally, the product yield is reduced, and the production cost is increased. Chinese patent publication No. CN115533733B discloses an accurate control method of the chemical mechanical polishing thickness of a silicon wafer for an integrated circuit, which determines the maximum value of the incoming material thickness difference of the same group of polished monocrystalline silicon wafers according to the incoming material thickness difference extreme value of the monocrystalline silicon wafers required by an internal control standard, continuously adjusts polishing pressure in the polishing process through a pressure calculation equation, continuously adjusts polishing temperature in the polishing process through a temperature calculation equation, and when the incoming material thickness difference extreme value of the same group of polished monocrystalline silicon wafers is smaller than the incoming material thickness extreme value of the monocrystalline silicon wafers required by the internal control standard, selects a constant minimum value of the pressure and a constant minimum value of the temperature which meet the conditions that the mechanical grinding polishing removal speed and the chemical corrosion polishing removal speed are close to each other to polish until the thickness target value of the polished monocrystalline silicon wafers required by customers is reached. The silicon wafer edge polishing process is realized by only relying on a conventional positioning block, the positioning block is not suitable for wear-resistant materials and is not designed in a specific structure, the abrasion problem is easy to occur, the positioning accuracy is directly influenced, meanwhile, the accurate detection and calibration are not carried out on the positions of a grinding part and a V-shaped groove, the action positions of the grinding cloth and the V-shaped groove are easy to be unmatched, the V-shaped groove is caused to be polished abnormally, the special inspection and replacement mechanism of the positioning block is not needed, the abrasion problem cannot be found and treated in time, the standardized abnormal polishing cause judgment mode is not needed, the process management and control is carried out only by experience, the positioning deviation problem continuously exists, the product yield is reduced, the reworking operation is increased in the production process, the material consumption and the production cost are synchronously increased, and the edge polishing process production continuity is also influenced. Disclosure of Invention The invention mainly aims to provide a silicon wafer V-shaped groove polishing positioning deviation management and control system which can effectively solve the problems related to the background technology. In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: a silicon wafer V-shaped groove polishing positioning deviation management