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CN-122015634-A - Capacitive flatness measuring device for ultralow-resistance silicon wafer and control method thereof

CN122015634ACN 122015634 ACN122015634 ACN 122015634ACN-122015634-A

Abstract

The invention relates to a capacitance flatness measuring device for an ultralow resistance silicon wafer and a control method thereof, belonging to the technical field of semiconductor silicon wafer detection, comprising an objective table, wherein a transplanting table is arranged on the objective table, a frame which is fixedly connected with the objective table is arranged at the periphery of the transplanting table, the transplanting bench is provided with an ultralow-resistance silicon wafer, a plurality of capacitive sensors which are arranged in a two-dimensional matrix form and parallel to the bench are arranged above the bench and on the upper part of the stand, and lifting cylinders are arranged on the capacitive sensors. The capacitance measurement principle is utilized, the influence of the high reflectivity of the ultralow-resistance silicon wafer is completely avoided, and the problem that an optical method fails on the material is solved. And the nonlinear error of the system is eliminated through vertical scanning fitting, and the measurement accuracy of the flatness of the ultralow-resistance silicon wafer is improved.

Inventors

  • ZHANG DI

Assignees

  • 杭州中欣晶圆半导体股份有限公司

Dates

Publication Date
20260512
Application Date
20260130

Claims (7)

  1. 1. A capacitive flatness measuring device for an ultralow-resistance silicon wafer is characterized by comprising an objective table (1), wherein a transplanting table (6) is arranged on the objective table (1), a frame (2) fixedly connected with the objective table (1) is arranged on the periphery of the transplanting table (6), the ultralow-resistance silicon wafer (4) is arranged on the transplanting table (6), a plurality of capacitive sensors (3) which are arranged in a two-dimensional matrix form and are parallel to the objective table (1) are arranged above the objective table (1) and on the upper portion of the frame (2), and lifting cylinders are arranged on the capacitive sensors (3).
  2. 2. The device for measuring the flatness of a silicon wafer with ultra low resistance according to claim 1, wherein the multiplexing switch module (7) electrically connected to each capacitive sensor unit in the array of capacitive sensors (3) is provided on the side of the frame (2).
  3. 3. The capacitive flatness measurement apparatus for ultra-low resistance silicon chips as defined in claim 1, wherein a tray (5) is provided between the ultra-low resistance silicon chips (4) and the transplanting table (6).
  4. 4. A control method of the capacitive flatness measurement apparatus according to claim 2, characterized by comprising the following operation steps: Firstly, placing an ultralow-resistance silicon wafer (4) to be tested on a transplanting table (6), and moving a capacitive sensor array to an initial measurement position Z 0 by the transplanting table (6); The second step, for each gated capacitive sensor (3), measuring and recording a capacitance value Cij between the capacitive sensor and the ultra-low resistance silicon chip (4), wherein the capacitance value Cij is a value at an initial measurement position Z 0 , and i and j are coordinates of the capacitive sensor (3) in an array; The third step, vertical scanning and data recording, the lifting cylinder drives the capacitance sensor (3) to step by a vertical distance delta Z, the second step is repeated, the number of times that the complete set of capacitance values Cij and k under the new height Z k = Z 0 +k.delta Z are changed is collected, the frequency of delta Z applied is determined, at the moment, the process is repeatedly carried out in a preset vertical scanning range at the new height Z k ; fitting a series of capacitance values measured at different heights Z k of the coordinates of each capacitive sensor (3) in the array to obtain a capacitance-distance characteristic curve of the unit; and fifthly, carrying out information calculation and flatness calculation to obtain the flatness of the total thickness change, the bending degree and the warping degree of the silicon wafer.
  5. 5. The method of claim 4, wherein the control and data processing unit in the stage (1) initializes the system, and the control and data processing unit sequentially and rapidly gates each capacitive sensor unit in the array of capacitive sensors (3) through a multiplexing switch module (7).
  6. 6. The method of claim 4, wherein the capacitance value Cij measured at the initial height in the second step is inversely calculated as the corresponding accurate distance dij according to the C=ε 0 ε r A/d of the parallel plate capacitance model, wherein C is the capacitance value, A is the effective area of the sensor unit, d is the plate distance, and ε 0 and εr are the dielectric constants of the vacuum and the medium, respectively, and the C-d curve obtained by fitting each capacitance sensor (3) is used to reversely calculate the capacitance value Cij measured at the initial height in the second step as the corresponding accurate distance dij, wherein the distance dij reflects the height information of the surface of the silicon wafer at the point.
  7. 7. The method for controlling a capacitive flatness measurement apparatus according to claim 6, wherein the height data dij calculated by all the capacitive sensors (3) are combined into a two-dimensional height map, and the total thickness variation, the degree of curvature and the degree of flatness of the silicon wafer are obtained by calculating a standard algorithm for fitting a maximum and a minimum height difference and a reference plane based on the height map.

Description

Capacitive flatness measuring device for ultralow-resistance silicon wafer and control method thereof Technical Field The invention relates to the technical field of semiconductor silicon wafer detection, in particular to a capacitive flatness measuring device for an ultralow-resistance silicon wafer and a control method thereof. Background In semiconductor manufacturing processes, the flatness of a silicon wafer is one of the key parameters affecting the accuracy of integrated circuit pattern delivery and device performance. The high conductivity of ultra low resistance silicon wafers (such as heavily doped silicon wafers for power devices or radio frequency devices) presents challenges for conventional non-contact measurements. Currently, optical interferometry is the dominant technique for measuring the flatness of silicon wafers. However, the optical method has the remarkable problems that the surface reflectivity of the silicon wafer is extremely high (close to metal), most of incident light is reflected, the signal to noise ratio is poor, interference fringes are blurred, effective phase information is difficult to extract, and the measurement accuracy and repeatability are seriously reduced. Capacitive sensors have the advantages of non-contact, high resolution and insensitivity to surface optical properties. However, when the traditional single-point or array type capacitance sensor is used for measuring a large-area silicon wafer, the problems of low scanning efficiency, complex calibration among multiple sensors, remarkable edge effect and the like exist, and the requirements of high-speed and high-precision measurement in industrial production are difficult to meet. Disclosure of Invention The invention mainly solves the defects existing in the prior art, and provides a capacitance type flatness measuring device for an ultralow resistance silicon wafer and a control method thereof. And the nonlinear error of the system is eliminated through vertical scanning fitting, and the measurement accuracy of the flatness of the ultralow-resistance silicon wafer is improved. The technical problems of the invention are mainly solved by the following technical proposal: The utility model provides a capacitive flatness measurement device for ultralow resistance silicon chip, includes the objective table, the objective table on be equipped with and transplant the platform, transplant a periphery be equipped with and be connected fixed frame with the objective table, transplant and be equipped with the ultralow resistance silicon chip on the platform, objective table top and frame upper portion be equipped with a plurality of capacitive sensor with two-dimensional matrix form arrange and with the objective table parallel, capacitive sensor on be equipped with the lift cylinder. Preferably, the side of the frame is provided with a multiplexing switch module electrically connected with each capacitive sensing unit in the capacitive sensor array. Preferably, a tray is arranged between the ultralow-resistance silicon chip and the transplanting table. The tray is an insulating material such as ceramic, teflon. Preventing the leakage of the measuring electric field and ensuring that the sensor only senses the surface height of the silicon wafer. The control method of the capacitive flatness measuring device includes the following operation steps: the first step is to place the ultra-low resistance silicon wafer to be tested on a transplanting stage, and the transplanting stage moves the capacitive sensor array to an initial measurement position Z 0. And secondly, for each gated capacitive sensor, measuring and recording a capacitance value Cij between the gated capacitive sensor and the ultra-low resistance silicon chip by a capacitance measuring circuit, wherein the capacitance value Cij is a value at an initial measuring position Z 0, and i and j are coordinates of the capacitive sensor in the array. And repeating the second step, collecting the whole set of capacitance values Cij and k at the new height Zk=Z 0 +k.DELTA.Z, wherein the whole set of capacitance values Cij and k are the changing times, and determining the frequency of the applied DELTA.Z, wherein the frequency is the new height Zk, and the process is repeated in a preset vertical scanning range. And fourthly, fitting a series of capacitance values measured at different heights Z k for the coordinates of each capacitive sensor in the array to obtain a capacitance-distance characteristic curve of the unit. And fifthly, carrying out information calculation and flatness calculation to obtain the flatness of the total thickness change, the bending degree and the warping degree of the silicon wafer. Preferably, the control and data processing unit within the stage initializes the system by sequentially and rapidly gating each capacitive sensing unit in the capacitive sensor array through the multiplexed switch module. Preferably, according to a parallel plat