CN-122017302-A - YTO-based rapid scanning system and method

Abstract

The invention discloses a YTO-based rapid scanning system and a YTO-based rapid scanning method, and belongs to the technical field of microwave signal source and frequency synthesis. Aiming at the difficult problem that the existing YTO simulation sweep frequency scheme is easy to lose lock in the start-stop stage due to hysteresis effect so as to limit the scanning speed, the invention provides a method for combining expanded scanning and accurate gating. The method calculates a wider extended sweep band (F1 to F2) from the hysteresis characteristics of YTO outside the target sweep band (Fstart to Ftop) set by the user. The system control YTO executes high-speed analog scanning in the extended frequency band, meanwhile, the FPGA precisely controls the pulse modulator in the radio frequency channel, signal output is started only when the scanning frequency is in a target frequency band (Fstart to Fstart), and output is stopped at extended start-stop transition sections (F1 to Fstart and Fstart to F2). The invention effectively avoids the influence of hysteresis effect on the stability of the phase-locked loop, increases the analog scanning speed from the traditional magnitude of hundreds of MHz/ms to the magnitude of GHz/ms, and obviously improves the testing efficiency.

Inventors

• ZHENG XIAN
• FAN XIAOTENG
• SONG ZHIQIANG

Assignees

• 中电科思仪科技股份有限公司

Dates

Publication Date

20260512

Application Date

20251224

Claims (6)

1. 1. A YTO-based fast scan system comprising: The YTO is a YIG tuned oscillator and is used for generating a radio frequency signal; the frequency divider is connected to the output end of the YTO and used for dividing the frequency of the radio frequency signal; A phase discriminator, the first input end of which is connected to the reference clock, the second input end of which is connected to the output end of the frequency divider, for outputting a phase error signal; The input end of the integrator is connected to the output end of the phase detector, the output end of the integrator is connected to the tuning end of the YTO, and the integrator, the phase detector, the YTO and the frequency divider form a phase-locked loop together; The input end of the radio frequency channel is connected to the output end of the YTO; The pulse modulator is arranged in the radio frequency channel in series and is used for switching on or switching off the output of the radio frequency signal according to a control signal; The control computer is used for receiving the scanning parameters set by the user; The field programmable gate array is respectively connected with the control computer, the frequency divider, the preset end of the YTO and the control end of the pulse modulator; Wherein the field programmable gate array is configured for: Receiving scanning parameters from the control computer, wherein the scanning parameters comprise a starting frequency Fstart, a terminating frequency Fstart and a scanning time T; Calculating an extended scanning frequency range according to the hysteresis characteristic of the YTO, wherein the actual initial frequency F1 of the extended scanning frequency range is lower than Fstart, and the actual termination frequency F2 is higher than Ftop; In the process of executing the analog frequency scanning from F1 to F2, generating a time sequence signal for controlling the change of the frequency dividing ratio of the frequency divider, and synchronously sending corresponding preset data to the preset end of the YTO; And generating a pulse control signal, wherein the pulse control signal is configured to control the pulse modulator to be turned off when the scanning frequency is lower than Fstart and when the scanning frequency is higher than Fstart, and control the pulse modulator to be turned on when the scanning frequency is in a range from Fstart to Fstart.
2. 2. The YTO-based rapid scan system of claim 1, wherein the field programmable gate array is further coupled to the reference clock with the reference clock as a reference clock source for its internal timing generation.
3. 3. A quick scan method based on YTO, which is characterized in that a quick scan system based on YTO as claimed in claim 1 is adopted, comprising the following steps: s1, setting scanning parameters; Receiving a scanning start frequency Fstart, a scanning end frequency Fstart and a scanning time T which are set by a user; s2, determining an extended scanning range; calculating and determining an extended sweep frequency range based on hysteresis characteristics of the YTO, the extended sweep frequency range having an actual start frequency F1 below Fstart and an actual end frequency F2 above Fstop; S3, performing extended scanning and controlling signal output; controlling the phase-locked loop system to perform an analog frequency sweep from an actual start frequency F1 to an actual end frequency F2; in the scanning process, the working state of the pulse modulator is controlled by the FPGA, so that: a. When the scanning frequency is in the [ F1, fstart ] interval, the pulse modulator is controlled to be turned off, and no signal is output; b. when the scanning frequency reaches Fstart, controlling the pulse modulator to be conducted, and starting to output a scanning signal; c. When the scanning frequency reaches Fston, the pulse modulator is controlled to be turned off, and the scanning signal is stopped to be output; d. keeping the pulse modulator off when the scanning frequency is in the (Ftop, F2) interval; And S4, when the scanning frequency reaches F2, the scanning process is completed.
4. 4. The quick scan method based on YTO of claim 3, wherein in step S2, the determining method of the actual start frequency F1 and the actual end frequency F2 includes obtaining hysteresis response curves of the YTO in the start and end phases through pre-test or modeling, and calculating values of F1 and F2 capable of ensuring stable phase locking of the scan signal in the Fstart to Fstop interval according to the response curves and a preset phase-locked loop stability margin.
5. 5. The YTO-based rapid scan method of claim 3, wherein in step S3, the field programmable gate array precisely controls the on and off timings of the pulse modulator according to the synchronization timing generated by the reference clock, so as to achieve precise synchronization of the scan frequency and the rf output signal.
6. 6. The YTO-based fast scan method of claim 3, wherein in step S3, said performing analog frequency scan specifically comprises: and in the scanning process, the field programmable gate array controls the frequency division ratio of the frequency divider to be accumulated according to the steps and synchronously sends corresponding preset voltage data to the YTO so as to realize continuous change of frequency.

Description

YTO-based rapid scanning system and method Technical Field The invention belongs to the technical field of microwave signal source and frequency synthesis, and particularly relates to a YTO-based rapid scanning system and method. Background The analog sweep frequency has wide application in various fields, and in vector network analysis instrument, the frequency sweep of the frequency needs to be completed in the frequency band to be measured to obtain the frequency characteristic of the equipment to be measured, and in the phase-locked loop tracking performance test, an analog sweep frequency signal is also needed to simulate the Doppler effect of the actual signal. In order to realize ultra-low phase noise performance in the current high-end microwave instrument, a phase locking mode of YTO (YIG-Tuned Oscillator, YIG tuned oscillator) is generally adopted, and the ultra-low noise is brought by YTO, and meanwhile, the scanning speed of analog scanning is restricted. Because of the hysteresis effect of YTO, the traditional scheme adopts hysteresis compensation and disturbance adding modes to improve the scanning speed, but the maximum scanning speed is only hundreds of megahertz per millisecond, and the requirements of high-end instruments cannot be met. The characteristic of hysteresis effect is that YTO preset frequency rises slowly when starting scanning, and the loop is easy to lose lock when starting scanning, and YTO preset frequency is difficult to reduce rapidly after scanning is finished due to hysteresis effect, and loop losing lock is also caused. Therefore, after the scanning speed is increased, the initial scanning frequency section and the end scanning frequency section are easy to lose lock, so that the scanning speed is difficult to increase. The characteristic of this patent with analog scanning, with analog scanning and pulse modulation combination's mode, the signal when shielding scanning starts and terminates to synchronous accurate control signal switch makes the purpose that reaches quick scanning, and satisfies the index of scanning accuracy, and final scanning speed can reach GHz/ms. For a conventional analog scanning scheme, as shown in FIG. 1: The reference clock Fclock is divided into 2 paths, one path is a phase discrimination reference signal, and the other path is a clock signal of the FPGA. The YTO signal coupling output is subjected to phase discrimination with a reference signal through a frequency divider, the phase discrimination output signal is subjected to integration and then is controlled to reach a pulse modulator, the pulse modulation is used for realizing a pulse modulation function in the whole machine, and the signal is output after passing through the pulse modulator. Before scanning, the computer sends the number by setting the starting frequency, the ending frequency and the scanning time by the user. When the scan is started: 1. The user sets a start frequency F start, a stop frequency F stop and a scanning time T; 2. Controlling the frequency division ratio of the initial frequency F start (the frequency division ratio N start is F start/Fclock) through the FPGA; the FPGA configures YTO presetting, namely compensating data is given according to hysteresis effect of YTO; 4. according to the scanning time T, configuring the scanning time of the section as T 1; 5. Calculating a frequency division ratio step F step=(Fstop-Fstart)/(T1*Fclock of the frequency divider according to the frequency-divided clock frequency F clock); 6. calculating scanning time steps according to the total time T; 7. After scanning is started, timing control starts to count, meanwhile, the frequency divider starts to accumulate according to a step F step according to a frequency division clock, YTO synchronously presets the number according to the calculated presets, after the time reaches T 1, the timer stops working, the frequency divider simultaneously stops accumulating, at the moment, the frequency division ratio of the frequency divider is N stop, at the moment, scanning is stopped, and the scanning signal stays on the stop frequency; The mode has lower scanning speed, namely, the preset frequency changes slowly when the initial scanning is simulated due to the hysteresis effect of YTO, and the preset frequency cannot be quickly reduced when the scanning is stopped, so that the loop is out of lock, and therefore, the scanning speed can only be reduced and the final scanning speed is only hundreds of MHz/ms for smoothly locking the loop. With the continuous improvement of test efficiency requirements, a technical scheme capable of breaking through the limitation of the hysteresis effect of YTO and realizing higher-speed simulated frequency sweep is needed. Disclosure of Invention The invention aims to overcome the defect that the scanning speed is limited due to hysteresis effect in the existing YTO-based analog frequency sweep technology, and provides a system and a method capabl