CN-122017343-A - Analog domain asynchronous frequency detection circuit

CN122017343ACN 122017343 ACN122017343 ACN 122017343ACN-122017343-A

Abstract

The invention belongs to the field of digital-analog hybrid integrated circuits, and particularly relates to an analog domain asynchronous frequency detection circuit. The analog domain asynchronous frequency detection circuit detects zero crossing events of an input signal through the zero crossing comparator, and measures time intervals of adjacent zero crossing events by utilizing the time-to-digital converter, so that continuous detection of the frequency of the input signal is realized. The scheme does not need analog-to-digital converter sampling quantization and digital signal processing, and the detection time sequence is completely driven by the characteristics of the input signal, so that the scheme has the advantages of simple structure, high response speed and high detection instantaneity. And by adopting a double-TDC structure which works alternately, the detection empty window of a single TDC in a reset stage is avoided, and a continuous and seamless frequency updating process is realized. The invention realizes the real-time frequency identification of the broadband signal in the analog domain in a low-delay and low-power consumption mode, and has good integration and expansibility.

Inventors

LI JING
ZHANG CHONGYI
LI DONGXU
ZHANG TIANCI
ZHANG ZHONG
WU KEJUN
NING NING
YU QI

Assignees

电子科技大学

Dates

Publication Date: 20260512
Application Date: 20260313

Claims (5)

1. An analog domain asynchronous frequency detection circuit is characterized by comprising a zero-crossing comparator and a time-to-digital converter; The zero-crossing comparator is used for comparing an input signal with a common mode level in real time, detecting a zero-crossing turnover event of the input signal, outputting a detection result into two paths of complementary square wave signals phi P and phi N so as to divide a positive half period and a negative half period of the input signal, generating reset and latch control signals at the boundary of the half periods, and triggering the starting or resetting of the time-to-digital converter; and the time-to-digital converter is used for measuring the time interval of the zero crossing event signals output by the zero crossing comparator by taking the time difference between adjacent zero crossing events as a measuring object, quantizing the time interval signals into digital time code words and outputting corresponding time interval data when the half period is ended.
2. The analog domain asynchronous frequency detection circuit of claim 1, wherein the specific workflow is: The zero crossing detection and signal division are that an input signal is firstly compared with a common mode level through a zero crossing comparator to generate two paths of complementary square wave signals phi P and phi N , wherein phi P represents that the input signal is in a state of being higher than the common mode level, phi N represents a state of being lower than the common mode level, a rising edge zero crossing event is generated when the input signal crosses the common mode level from the forward direction, a falling edge zero crossing event is generated when the signal crosses the common mode level in the reverse direction, the zero crossing event is used for dividing positive half cycles and negative half cycles of the signal, and a reset and latch control signal is output when the event occurs and is used for triggering the starting or resetting operation of the time-to-digital converter; the TDC takes zero crossing events as references, takes two adjacent zero crossing events as a start signal and a stop signal, and realizes the time interval measurement of the half period by quantifying the time length between the two events; The method comprises the steps of outputting results, resetting a circuit, latching a time-to-digital converter TDC which finishes measurement when each half period is finished, quantizing the time interval of the next half period by the TDC at the same time, realizing seamless switching and continuous detection, and obtaining the instantaneous frequency of an input signal in real time by measuring the interval time of two adjacent zero crossing events to realize a completely asynchronous frequency detection process in an analog domain.
3. The analog domain asynchronous frequency detection circuit of claim 1, wherein the time-to-digital converter is operated alternately for two paths TDC1 and TDC2, corresponding to two adjacent half-cycles respectively.
4. The analog domain asynchronous frequency detection circuit of claim 3, wherein the specific workflow is: The zero crossing detection and signal division are that an input signal is firstly compared with a common mode level through a zero crossing comparator to generate two paths of complementary square wave signals phi P and phi N , wherein phi P represents that the input signal is in a state of being higher than the common mode level, phi N represents a state of being lower than the common mode level, a rising edge zero crossing event is generated when the input signal crosses the common mode level from the forward direction, a falling edge zero crossing event is generated when the signal crosses the common mode level in the reverse direction, the zero crossing event is used for dividing positive half cycles and negative half cycles of the signal, and a reset and latch control signal is output when the event occurs and is used for triggering the starting or resetting operation of the time-to-digital converter; The time interval measurement comprises two paths of time-to-digital converters TDC1 and TDC2 which work alternately and correspond to two adjacent half periods respectively, wherein when an input signal is in a first half period, the TDC1 takes a rising edge zero crossing event of the current half period as a starting signal and takes a falling edge zero crossing event as a stopping signal to finish the time interval measurement of the half period; The method comprises the steps of outputting results, resetting a circuit, latching a time-to-digital converter TDC for completing measurement when each half period is finished, automatically starting measurement when the next half period is started by the other TDC, realizing seamless switching and continuous detection, and obtaining the instantaneous frequency of an input signal in real time through measuring the interval time of two adjacent zero crossing events to realize a completely asynchronous frequency detection process in an analog domain.
5. The analog domain asynchronous frequency detection circuit of claim 1, wherein the time-to-digital converter is a multi-phase clock TDC, a plurality of paths of phase difference clocks generated by a phase-locked loop are used as time references, clock periods are accumulated by a counter to realize ultra-large range measurement, and the consistency of quantization step sizes is ensured by utilizing the closed loop feedback characteristic of the phase-locked loop.

Description

Analog domain asynchronous frequency detection circuit Technical Field The invention belongs to the field of digital-analog hybrid integrated circuits, and particularly relates to an analog domain asynchronous frequency detection circuit which is suitable for front-end signal processing scenes with extremely high requirements on response speed, power consumption and system delay, such as a radar, a communication and electronic reconnaissance system. Background In modern radar, communication and electronic reconnaissance systems, a front-end signal processing module often needs to quickly and accurately acquire frequency information of an input signal so as to realize filtering selection, frequency band identification or adaptive tuning. The performance of frequency detection directly affects the response speed and signal recognition accuracy of the system, and therefore a detection mechanism having high real-time and low power consumption characteristics in a wide frequency range is required. In the prior art, frequency detection generally relies on a digital sampled spectrum analysis method, and typically is implemented by sampling an input signal by a high-speed analog-to-digital converter (ADC), and then acquiring frequency components of the signal by using a Fast Fourier Transform (FFT) or other spectrum estimation algorithm. The method can process continuously variable broadband signals, is suitable for input signals with unstable duty ratio or wide frequency spectrum, and is convenient to directly integrate with a subsequent digital signal processing module. However, this approach still has certain limitations. The high-speed signal needs an analog-digital converter with high sampling rate, or aliasing or frequency distortion can be generated, meanwhile, fourier transformation processing needs to accumulate a certain number of sampling points to ensure frequency resolution, so that unavoidable delay exists in frequency detection, the real-time detection requirement of the high-speed dynamic signal is difficult to meet, the high-sampling rate and large-scale Fourier transformation operation can obviously increase the system power consumption, and the low-power consumption application scene is not facilitated. In addition, the scheme completely depends on sampling and operation of a digital domain, does not have the instant response characteristic of an analog domain, and cannot directly output frequency information at the front end, so that the scheme is not suitable for occasions with extremely high requirements on response speed, power consumption and system delay. In summary, the existing frequency detection scheme based on the high-speed analog-to-digital converter and the digital signal processing module has high detection precision, but has obvious defects in power consumption, delay and instantaneity, and is difficult to meet the front-end real-time frequency detection requirement under the conditions of high speed, wide frequency and low power consumption. Disclosure of Invention Aiming at the problems or the shortcomings, the invention provides an analog domain asynchronous frequency detection circuit which directly completes frequency identification and measurement of an input signal in an analog domain without sampling quantization and digital signal processing by a high-speed analog-to-digital converter. The detection time sequence is driven by the dynamic characteristics of the input signal and takes the signal zero crossing event as a timing trigger source, the time-digital converter is used for respectively measuring the zero crossing event intervals in adjacent half periods to realize continuous and seamless frequency detection, the time interval between the adjacent zero crossing events of the input signal is quantized, the frequency of the input signal is calculated according to the measured time length, and therefore the asynchronous frequency detection is realized in an analog domain. An analog domain asynchronous frequency detection circuit includes a zero-crossing comparator and a time-to-digital converter. The zero-crossing comparator is used for comparing an input signal with a common mode level in real time, detecting a zero-crossing turnover event of the input signal, outputting a detection result into two paths of complementary square wave signals phi P and phi N so as to divide a positive half period and a negative half period of the input signal, generating reset and latch control signals at the boundary of the half periods, and triggering the starting or resetting of the time-to-digital converter. And the time-to-digital converter is used for measuring the time interval of the zero crossing event signals output by the zero crossing comparator by taking the time difference between adjacent zero crossing events as a measuring object, quantizing the time interval signals into digital time code words and outputting corresponding time interval data when the half period is ended