CN-122017509-A - Method and system for positioning failure point of crimping power device

CN122017509ACN 122017509 ACN122017509 ACN 122017509ACN-122017509-A

Abstract

The invention provides a method and a system for positioning a failure point of a crimping power device, and relates to the technical field of semiconductor device testing. According to the invention, firstly, a failure subunit in the crimping power device is positioned through a dynamic and static test machine or a universal meter, then, a failure chip in the failure subunit is positioned through a leakage value measurement, then, the positioning of a failure area in the chip is realized through three modes of diffusion resistance measurement, hot spot positioning and ultrasonic positioning, and then, the accurate positioning of a failure point is realized by combining three microscopic positioning methods of planar delamination positioning, SEM & EDS and FIB. In addition, a specific method for identifying failure points caused by process defects by using the extended resistance measurement is provided. The invention provides a specific and flexible failure point positioning method and a device selection scheme based on the special packaging structure and failure mode of the crimping power device, and has the advantages of strong operability and high feasibility.

Inventors

WANG JINWEN
HUA QINGYUAN
HE XIN
XU HONGWU
HU YINGHONG

Assignees

国网电力科学研究院有限公司
南京南瑞半导体有限公司
国网冀北电力有限公司电力科学研究院

Dates

Publication Date: 20260512
Application Date: 20260130

Claims (10)

1. The method for positioning the failure point of the crimping power device is characterized by comprising the following steps of: Performing electrical parameter test on the crimping power device, and comparing the obtained electrical parameter test value with a corresponding electrical parameter standard value to determine a failure subunit in the crimping power device; measuring the leakage value of each chip of the failure subunit one by one, and determining the chip with the leakage value larger than the set threshold value as the failure chip; Determining a failure area on the failure chip through ultrasonic scanning detection positioning or hot spot positioning; Carrying out section analysis on the failure area through a scanning electron microscope-energy spectrometer, and positioning failure points on a micro-nano scale; etching the surface structure at the failure point, identifying a cellular level defect at the failure point, and positioning the initial position of the structure of the failure point on the nanometer scale.
2. The method for positioning the failure point of the crimping power device according to claim 1, wherein the electrical parameter testing of the crimping power device comprises the steps of setting testing conditions according to the type of the crimping power device, carrying out high-low temperature dynamic and static retesting on subunits of the crimping power device one by one through a dynamic and static testing machine to obtain an electrical parameter testing value, and comparing the electrical parameter testing value with a corresponding electrical parameter standard value to determine the position of the failure subunit in the crimping power device.
3. The method for locating a failure point of a power device of claim 1, wherein the electrical parameter testing of the power device of claim 1 further comprises testing a CE end of the power device of a breakdown burn-out power device by a multimeter to directly locate a failure subunit.
4. The method for positioning the failure point of the crimping power device according to claim 1, wherein the ultrasonic scanning detection positioning comprises the steps of observing whether defects exist at each interface of a chip by using an interface ultrasonic reflection technology, and marking the positions with the defects as failure areas.
5. The method for positioning the failure point of the crimping power device according to claim 1, wherein the hot spot positioning comprises the steps of shorting the GE end of the failed chip by adopting a thermal emission microscope, continuously pressurizing the CE end, monitoring the temperature distribution and the change of the surface of the failed chip in real time, recording the hot spot position of the surface of the failed chip and marking the hot spot position as a failure area.
6. The method for positioning the failure point of the crimping power device according to claim 1, wherein the cross-section analysis of the failure area by using a scanning electron microscope-energy spectrometer comprises the steps of cutting, grinding and polishing the failure area to obtain a test sample, detecting the test sample by using the scanning electron microscope-energy spectrometer, observing the physical structure of the failure area by combining a secondary electron mode and a back scattering mode of the scanning electron microscope, and characterizing the material composition of the failure area by using the energy spectrometer so as to position the failure point on a micro-nano scale.
7. The method of locating a failure point of a crimped power device according to claim 1, further comprising the steps of: After the failure area on the failure chip is determined, removing the structure at the failure area layer by layer according to the sequence from outside to inside, recording the structural change in the failure area layer by layer until the initial position of the failure point is positioned, and then carrying out section analysis on the failure area through a scanning electron microscope-energy spectrometer to position the failure point on the micro-nano scale.
8. The method of locating a failure point of a crimped power device according to claim 1, further comprising the steps of: After determining the position of the failed chip in the failed subunit, measuring the expansion resistance of the failed chip, after confirming the crystallization of the substrate material of the failed chip, measuring the expansion resistance of the failed chip layer by layer, comparing the measurement value of the expansion resistance with a standard value, obtaining the doping distribution of the failed chip, and further identifying the process defect position of the failed chip and marking the process defect position as a failure point.
9. A crimped power device failure point positioning system, comprising: The failure subunit positioning module is used for performing electrical parameter test on the crimping power device, comparing the obtained electrical parameter test value with a corresponding electrical parameter standard value, and determining a failure subunit in the crimping power device; the failure chip positioning module is used for measuring the leakage value of each chip of the failure subunit one by one and determining the chip with the leakage value larger than the set threshold value as the failure chip; the failure area positioning module is used for determining a failure area on the failure chip through ultrasonic scanning detection positioning or hot spot positioning; the micro-nano scale failure point positioning module is used for carrying out section analysis on the failure area through a scanning electron microscope-energy spectrometer and positioning failure points on the micro-nano scale; and the nanoscale failure point positioning module is used for etching the surface structure at the failure point, identifying the cellular level defect at the failure point and positioning the structure starting position of the failure point on the nanoscale.
10. The crimped power device failure point positioning system according to claim 9, further comprising the following modules: The failure point delamination positioning module is used for removing the structure at the failure area layer by layer according to the sequence from outside to inside after determining the failure area on the failure chip, and recording the structural change in the failure area layer by layer until the initial position of the failure point is positioned; And the process defect positioning module is used for measuring the extension resistance of the failed chip, measuring the extension resistance of the failed chip layer by layer after confirming the crystallization of the substrate material of the failed chip, comparing the extension resistance measured value with a standard value to obtain the doping distribution of the failed chip, and further identifying the process defect position of the failed chip and marking the position as a failure point.

Description

Method and system for positioning failure point of crimping power device Technical Field The invention relates to the technical field of semiconductor device testing, in particular to a method and a system for positioning a failure point of a crimping power device. Background At present, the power electronic technology is forward developed in the directions of high voltage, high power and high reliability, and meanwhile, under the promotion of application requirements in the fields of smart grids, new energy power generation, rail transit, industrial driving and the like, the traditional welding power device can not meet the requirements gradually. The welding power device has the problems of the service life of bonding wire connection, uneven current distribution of parallel chips and the like, and is different from the traditional welding power device, one side of an emitter of a chip in the crimping power device is mainly connected by structures such as a gasket, a disc spring, a molybdenum sheet and the like (without bonding wires), a plurality of chips are connected in parallel to form a subunit, and then the subunit is used for forming a unit module. The failure mode of the crimping power device is correspondingly changed compared with the prior art due to the change of the packaging structure and the chip design, and the failure mode comprises the change of an interface contact mechanism, the enhancement of the coupling effect of multiple physical fields, the difference of a material process system and the like. The existing welding power device failure point positioning method cannot be directly applied to failure mechanism research of the crimping power device. In addition, based on special application scenes, the crimping power device has the problems of high device failure cost, less failure experience accumulation and the like, and the reliability of the device is improved by positioning failure points to carry out analysis improvement. Disclosure of Invention The first aim of the invention is to provide a crimping power device failure point positioning method with high feasibility aiming at multiple failure modes, and the second aim is to provide a crimping power device failure point positioning system. The invention provides a method for positioning a failure point of a crimping power device, which comprises the following steps: Performing electrical parameter test on the crimping power device, and comparing the obtained electrical parameter test value with a corresponding electrical parameter standard value to determine a failure subunit in the crimping power device; measuring the leakage value of each chip of the failure subunit one by one, and determining the chip with the leakage value larger than the set threshold value as the failure chip; Determining a failure area on a failure chip through ultrasonic scanning detection positioning or hot spot positioning; Carrying out section analysis on the failure area through a scanning electron microscope-energy spectrometer, and positioning failure points on a micro-nano scale; Etching the surface structure at the failure point, identifying a cell-level defect at the failure point, and positioning the initial position of the structure of the failure point on the nanometer scale. The method comprises the steps of setting testing conditions according to the type of the crimping power device, carrying out high-low temperature dynamic and static retesting on subunits of the crimping power device one by one through a dynamic and static testing machine to obtain an electrical parameter testing value, comparing the electrical parameter testing value with a corresponding electrical parameter standard value, and determining the position of a failure subunit in the crimping power device. Preferably, the electrical parameter test of the crimping power device further comprises the step of directly positioning a failure subunit for the crimping power device which is broken down and burned out by testing the CE end of the crimping power device through a universal meter. Specifically, ultrasonic scanning detection positioning comprises the steps of observing whether defects exist at each interface of a chip by using an interface ultrasonic reflection technology, and marking the positions with the defects as failure areas. Specifically, hot spot positioning comprises shorting the GE end of the failed chip by using a thermal emission microscope, continuously pressurizing the CE end, monitoring the temperature distribution and the change of the surface of the failed chip in real time, recording the hot spot position of the surface of the failed chip, and marking the hot spot position as a failure area. The method comprises the steps of cutting, grinding and polishing the failure area to obtain a test sample, detecting the test sample by using the scanning electron microscope-energy spectrometer, observing the physical structure of the failure area by combining a se