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CN-122017535-A - Chip life prediction method and device, electronic equipment and medium

CN122017535ACN 122017535 ACN122017535 ACN 122017535ACN-122017535-A

Abstract

The application discloses a chip life prediction method, a chip life prediction device, electronic equipment and a medium, and relates to the technical field of terminals. The electronic equipment acquires electrical parameters of an electrical signal at the output end of the chip to be tested through a feedback detection circuit in the chip to be tested, determines resistance parameters of the chip to be tested according to the electrical parameters, and predicts the residual service life of the chip to be tested according to the resistance parameters.

Inventors

  • DAI PENGXIANG

Assignees

  • 维沃移动通信有限公司

Dates

Publication Date
20260512
Application Date
20260318

Claims (10)

  1. 1. A method for predicting chip life, comprising: acquiring electrical parameters of an electrical signal at an output end of a chip to be detected through a feedback detection circuit in the chip to be detected; Determining the resistance parameter of the chip to be tested according to the electrical parameter; And predicting the residual service life of the chip to be tested according to the resistance parameter.
  2. 2. The method of claim 1, wherein predicting the remaining usable time length of the chip under test based on the resistance parameter comprises: and predicting the parameter variation trend according to the resistance parameter by using a duration prediction model, and outputting the residual use duration.
  3. 3. The method according to claim 2, wherein the predicting the parameter variation trend by the duration prediction model according to the resistance parameter includes: Calculating the change duration required by changing the parameter value of the resistance parameter into the failure resistance parameter value through the duration prediction model; and determining the change duration as the residual use duration.
  4. 4. The method of claim 2, wherein prior to the predicting the trend of the parameter change based on the resistance parameter by the duration prediction model, the method further comprises: Acquiring N training sample sets, wherein the training sample sets comprise sample use time, sample resistance parameters of a sample chip, sample temperature of the sample chip and sample environment temperature of an environment where the sample chip is located; model training is carried out on a preset model based on the N training sample sets, and the duration prediction model is obtained; Wherein N is a positive integer.
  5. 5. The method according to claim 2, wherein the method further comprises: under the condition that model precision corresponding to the duration prediction model is smaller than or equal to a precision threshold, T historical data sets are obtained, wherein the historical data sets comprise the historical use duration, the historical resistance parameter of the chip to be detected, the historical temperature of the chip to be detected and the historical environment temperature of the environment where the chip to be detected is located; Model updating is carried out on the duration prediction model based on the T historical data sets; wherein T is a positive integer.
  6. 6. The method of claim 1, wherein after said predicting a remaining useful life of said chip under test based on said resistance parameter, said method further comprises: Outputting prompt information under the condition that the residual using time length is less than or equal to a time length threshold; The prompt message is used for prompting the residual using time.
  7. 7. The method of claim 1, wherein the obtaining the electrical parameter of the electrical signal at the output of the chip under test comprises: acquiring initial electrical parameters of the electrical signal; and carrying out parameter calibration on the initial electrical parameters according to the temperature of the chip to be detected and the environmental temperature of the environment where the chip to be detected is positioned, so as to obtain the electrical parameters.
  8. 8. A chip life prediction apparatus, comprising: The acquisition module acquires the electrical parameters of the electrical signals at the output end of the chip to be detected through a feedback detection circuit in the chip to be detected; The processing module is used for determining the resistance parameter of the chip to be tested according to the electrical parameter acquired by the acquisition module and predicting the residual use time length of the chip to be tested according to the resistance parameter.
  9. 9. An electronic device comprising a processor and a memory storing a program or instructions executable on the processor, which when executed by the processor, implement the steps of the method of any one of claims 1 to 7.
  10. 10. A readable storage medium, characterized in that it stores thereon a program or instructions which, when executed by a processor, implement the steps of the method according to any of claims 1 to 7.

Description

Chip life prediction method and device, electronic equipment and medium Technical Field The application belongs to the technical field of terminals, and particularly relates to a chip life prediction method, a device, electronic equipment and a medium. Background At present, an intelligent power amplifier (Smart PA) chip is widely applied to various electronic devices because the chip can detect the state of a load in real time and optimize the working performance of the load according to a current-voltage (IV) feedback signal of an output end. During the process of using the Smart PA chip, the accuracy of detecting the state of the load by the Smart PA chip may decrease with the decrease of the remaining usage time of the Smart PA chip, thereby affecting the optimization of the working performance of the Smart PA chip on the load. However, in the process of using the Smart PA chip, the electronic device cannot know the remaining service time of the Smart PA chip, and therefore, the user cannot be prompted to replace the Smart PA chip in time, which may cause poor working performance of the load, and thus, the service performance of the electronic device is affected. Disclosure of Invention The embodiment of the application aims to provide a chip life prediction method, a device, electronic equipment and a medium, which can solve the problem of poor service performance of the electronic equipment. In a first aspect, an embodiment of the present application provides a method for predicting a lifetime of a chip, where the method includes an electronic device obtaining an electrical parameter of an electrical signal at an output end of the chip to be tested through a feedback detection circuit in the chip to be tested, determining a resistance parameter of the chip to be tested according to the electrical parameter, and predicting a remaining usage period of the chip to be tested according to the resistance parameter. In a second aspect, an embodiment of the present application provides a chip lifetime prediction apparatus, which includes an acquisition module and a processing module. The acquisition module is used for acquiring the electrical parameters of the electrical signals at the output end of the chip to be tested through the feedback detection circuit in the chip to be tested. The processing module is used for determining the resistance parameter of the chip to be tested according to the electrical parameter acquired by the acquisition module and predicting the residual service life of the chip to be tested according to the resistance parameter. In a third aspect, embodiments of the present application provide an electronic device comprising a processor and a memory storing a program or instructions executable on the processor, which when executed by the processor, implement the steps of the method as in the first aspect. In a fourth aspect, embodiments of the present application provide a readable storage medium having stored thereon a program or instructions which when executed by a processor perform the steps of the method as in the first aspect. In a fifth aspect, embodiments of the present application provide a chip comprising a processor and a communication interface coupled to the processor for running a program or instructions to implement a method as in the first aspect. In a sixth aspect, embodiments of the present application provide a computer program product stored in a storage medium, the program product being executable by at least one processor to implement a method as in the first aspect. In the embodiment of the application, the electronic equipment can acquire the electrical parameter of the electrical signal of the output end of the chip to be tested, and determine the resistance parameter of the chip to be tested according to the electrical parameter, and the resistance parameter is related to the residual use time length of the chip to be tested, so that the electronic equipment can determine the accurate residual use time length of the chip to be tested based on the resistance parameter, and can prompt a user to replace the chip to be tested in time so as to avoid influencing the use performance of the electronic equipment due to the damage of the chip to be tested. In this way, the performance of the electronic device can be optimized without increasing the cost of the electronic device. Drawings Fig. 1 is a schematic diagram of the internal structure of a Smart PA chip in the related art; FIG. 2 is a schematic flow chart of a method for predicting the lifetime of a chip according to an embodiment of the present application; FIG. 3 is a second flowchart of a method for predicting a lifetime of a chip according to an embodiment of the present application; FIG. 4 is a third flow chart of a method for predicting the lifetime of a chip according to an embodiment of the present application; FIG. 5 is a flowchart illustrating a method for predicting a lifetime of a chip according to