CN-122017540-A - Routing delay compensation method based on TDR technology

CN122017540ACN 122017540 ACN122017540 ACN 122017540ACN-122017540-A

Abstract

The invention relates to the technical field of wiring delay compensation, and particularly discloses a wiring delay compensation method based on a TDR technology, comprising the following steps of S1, injecting step signals into signal channels and synchronously collecting reflected waveforms to obtain a time domain voltage curve; the method comprises the steps of S2, identifying first and second characteristic transition points from a time domain voltage curve, taking half of the time value of the second transition point as the actual transmission delay of a channel, S3, comparing the delay of each channel, calculating the compensation delay quantity required by each channel based on the maximum value, S4, injecting corresponding digital delay in the excitation signal generation process to enable all signals to synchronously reach a target device pin after transmission, precisely measuring the transmission delay of each signal channel by using a TDR technology, and effectively eliminating the problem of signal non-synchronization caused by the difference of wiring lengths through digital delay compensation, and remarkably improving the test time sequence precision and reliability.

Inventors

QU XIAOZHONG
ZHANG YUE
YANG AIMIN
Ji Runzai
Zheng Chuquan

Assignees

悦芯科技股份有限公司

Dates

Publication Date: 20260512
Application Date: 20251017

Claims (8)

1. The wiring delay compensation method based on the TDR technology is characterized by comprising the following steps of: step S1, generating a step signal with preset voltage amplitude, acquiring all signal channels, injecting the step signal into each signal channel through a test interface, and synchronously acquiring the reflection waveform of each signal channel to obtain a time domain voltage curve containing reflection characteristics of a plurality of impedance discontinuous points; Step S2, identifying a first characteristic transition point in the time domain voltage curve, obtaining the moment when the first characteristic transition point generates reflection after the signal is transmitted to a public node and marking the moment as a first time value, identifying a second characteristic transition point in the time domain voltage curve, obtaining the moment when the second characteristic transition point corresponds to the signal transmitted to an electric terminal point and the voltage reaches a stable state and marking the moment as a second time value t 2 , and obtaining (1/2) t 2 of a signal channel as the actual transmission delay of the signal channel; Step S3, comparing the actual transmission delays of the signal channels, and selecting the actual transmission delay with the largest value as a reference delay; And S4, injecting digital delay according to the compensation delay amount in the generation process of the excitation signals of the signal channels, so that the excitation signals emitted by the signal channels reach the pins of the target device after physical transmission.
2. The method for compensating for a trace delay based on a TDR technology according to claim 1, wherein the rise time of the step signal is less than 1 nanosecond, the voltage amplitude is transited from an initial 0 volt to a preset logic level value, the logic level value is set according to the operating voltage range of the device to be tested, and the setting range is [3.3,5] volt.
3. The method of claim 1, wherein identifying the first characteristic transition point and the second characteristic transition point comprises: The method comprises the steps of monitoring the voltage change rate of a reflection waveform in real time, judging that voltage transition exists at the current moment when the voltage change rate exceeds a preset voltage change threshold value, marking the corresponding point of the current moment on the reflection waveform as a voltage transition point, marking the first identified voltage transition point in the reflection waveform as a first characteristic transition point, and marking the last voltage transition point corresponding to the voltage which is finally stabilized at a preset voltage value in the reflection waveform as a second characteristic transition point.
4. The method for compensating for a wire delay based on the TDR technique as set forth in claim 1, wherein the step signal generation further includes: connecting a standard short-circuit device to the public node, recording a reflection waveform acquired during short-circuit calibration as a first reference reflection waveform, and determining an inherent delay value of a test path based on a characteristic point of a falling edge of the first reference reflection waveform; Connecting a standard open circuit device to the public node, recording a reflection waveform acquired during open circuit calibration as a second reference reflection waveform, and verifying whether the inherent delay value is accurate or not through the second reference reflection waveform; if the intrinsic delay value is verified to be accurate, the intrinsic delay value is stored, and the intrinsic delay value is deducted in advance from a second time value in the process of acquiring the actual transmission delay of the signal channel.
5. The method for compensating routing delay based on the TDR technology according to claim 1, wherein the injection of the digital delay is based on a high-precision digital delay chip, the adjustment precision of the high-precision digital delay chip is greater than or equal to 0.04 nanosecond, the delay time of the high-precision digital delay chip is programmed and controlled through an SPI or I2C digital interface, and the minimum stepping value is 0.01 nanosecond.
6. The method of claim 1, wherein each signal path includes a transmission line, a connector, and an impedance matching element.
7. The method for compensating routing delay based on TDR technology according to claim 1, wherein the common node is made of copper material, is surface-plated, is positioned at the geometric center of the test load board, and is connected with each signal channel by adopting a star topology.
8. The method for compensating for trace delay based on TDR technology according to claim 1, wherein the obtaining of the compensation delay amount further comprises introducing a temperature compensation factor, specifically comprising: The temperature compensation factor dynamically corrects the compensation delay amount based on the environmental temperature data monitored in real time, and the correction formula is T comp =T original ×[1+α×(T current -T ref ), wherein T comp represents the compensation delay amount after compensation, T original represents the compensation delay amount before compensation, alpha is the temperature coefficient of a material, T current represents the real-time temperature of a test load board, and T ref is a preset reference temperature.

Description

Routing delay compensation method based on TDR technology Technical Field The invention relates to the technical field of wiring delay compensation, in particular to a wiring delay compensation method based on a TDR technology. Background In integrated circuit testing, due to factors such as inconsistent wiring length, cable difference and delay introduced by connectors of each signal channel on a test load board, signals sent by a plurality of pin feet can generate an asynchronous phenomenon when reaching a tested device, and the time sequence precision of the test signals and the accuracy of test results are seriously affected. The traditional method generally adopts an equal-length wiring strategy to ensure that the physical lengths of all channels are consistent as much as possible, thereby realizing signal synchronization. However, the method has obvious limitations in practical application, on one hand, the design of equal-length wiring is complex, the wiring difficulty is high, and the method is difficult to realize in a high-speed and high-density test board, on the other hand, the method lacks flexibility, cannot cope with delay change caused by factors such as cable aging, temperature change or replacement of connecting parts, and cannot perform post compensation on delay difference of the manufactured board. Disclosure of Invention The invention aims to provide a wiring delay compensation method based on a TDR technology, which solves the following technical problems. The aim of the invention can be achieved by the following technical scheme: a wiring delay compensation method based on TDR technology comprises the following steps: step S1, generating a step signal with preset voltage amplitude, acquiring all signal channels, injecting the step signal into each signal channel through a test interface, and synchronously acquiring the reflection waveform of each signal channel to obtain a time domain voltage curve containing reflection characteristics of a plurality of impedance discontinuous points; Step S2, identifying a first characteristic transition point in the time domain voltage curve, obtaining the moment when the first characteristic transition point generates reflection after the signal is transmitted to a public node and marking the moment as a first time value, identifying a second characteristic transition point in the time domain voltage curve, obtaining the moment when the second characteristic transition point corresponds to the signal transmitted to an electric terminal point and the voltage reaches a stable state and marking the moment as a second time value t 2, and obtaining (1/2) t 2 of a signal channel as the actual transmission delay of the signal channel; Step S3, comparing the actual transmission delays of the signal channels, and selecting the actual transmission delay with the largest value as a reference delay; And S4, injecting digital delay according to the compensation delay amount in the generation process of the excitation signals of the signal channels, so that the excitation signals emitted by the signal channels reach the pins of the target device after physical transmission. As a further proposal of the invention, the rise time of the step signal is less than 1 nanosecond, the voltage amplitude is transited from the initial 0 volt to a preset logic level value, the logic level value is set according to the working voltage range of the device to be tested, and the setting range is [3.3,5] volt. As a further aspect of the present invention, the identifying the first characteristic transition point and the second characteristic transition point includes: The method comprises the steps of monitoring the voltage change rate of a reflection waveform in real time, judging that voltage transition exists at the current moment when the voltage change rate exceeds a preset voltage change threshold value, marking the corresponding point of the current moment on the reflection waveform as a voltage transition point, marking the first identified voltage transition point in the reflection waveform as a first characteristic transition point, and marking the last voltage transition point corresponding to the voltage which is finally stabilized at a preset voltage value in the reflection waveform as a second characteristic transition point. The step signal generation method further comprises the following steps: connecting a standard short-circuit device to the public node, recording a reflection waveform acquired during short-circuit calibration as a first reference reflection waveform, and determining an inherent delay value of a test path based on a characteristic point of a falling edge of the first reference reflection waveform; Connecting a standard open circuit device to the public node, recording a reflection waveform acquired during open circuit calibration as a second reference reflection waveform, and verifying whether the inherent delay value is accurate or not throug