CN-122018619-A - Full-integrated low-dropout linear voltage regulator

CN122018619ACN 122018619 ACN122018619 ACN 122018619ACN-122018619-A

Abstract

The invention discloses a low-dropout linear voltage regulator, which relates to the technical field of electronic circuits, wherein the bias current of a main error amplifier and a buffer is dynamically regulated according to the load condition, meanwhile, a non-main pole point in the low-dropout linear voltage regulator is pushed to high frequency through the buffer and drives a main power tube, an auxiliary error amplifier and a secondary power tube are added on the basis, when the load current is smaller, the output current is provided only through the main error amplifier, the main power tube and an auxiliary channel, and when the load current is larger than a threshold current, the low-dropout linear voltage regulator can be converted into a three-stage structure, the secondary power tube can rapidly provide most of current, feedforward zero compensation based on the auxiliary channel can be combined with conventional Miller compensation for application, the size of compensation capacitance can be greatly reduced, and the bandwidth of a system is improved. The low-dropout linear voltage regulator has larger bandwidth and stronger transient charge and discharge capability, and combines low power consumption, high stability and excellent transient response performance in a full load range.

Inventors

XUE ZHONGMING
HE CHUFAN
YANG XU
XUE YU
GENG LI
Guo Zhuoqi
TANG BINGJUN

Assignees

西安交通大学

Dates

Publication Date: 20260512
Application Date: 20260311

Claims (9)

1. The fully integrated low dropout linear voltage regulator is characterized by comprising a main error amplifier, a bias circuit, a buffer, a main power tube, an auxiliary error amplifier, a secondary power tube, a resistor feedback network and an auxiliary passage; The positive phase input end of the main error amplifier is connected with the output end of the resistor feedback network, the negative phase input end of the main error amplifier is connected with an external reference voltage, the output end of the main error amplifier is connected with the input end of the buffer, the output end of the buffer is connected with the grid electrode of the main power tube, the source electrode of the main power tube is connected with an external power supply voltage, the main error amplifier is used for providing loop gain to clamp feedback partial pressure to the external reference voltage, the buffer is used for pushing the pole of the grid electrode of the main power tube and the pole of the output end of the main error amplifier to a target frequency range and driving the main power tube, and the main power tube is used for providing output current in a full load range through the drain electrode according to the loop gain; The bias circuit is used for sampling the current of the main power tube, realizing the self-adaptive bias of the buffer through a first bias voltage output end and realizing the self-adaptive bias of the main error amplifier through a second bias voltage output end; The input end of the auxiliary error amplifier is connected with the first bias voltage output end of the bias circuit, and the output end of the auxiliary error amplifier is connected with the grid electrode of the secondary power tube; the auxiliary error amplifier is used for starting and driving the secondary power tube when the first bias voltage is larger than a target threshold value, and the secondary power tube is used for providing output current through the drain electrode; The input end of the resistor feedback network is connected with the drain electrode of the main power tube, and the resistor feedback network is used for dividing the output voltage of the low-dropout linear voltage stabilizer and feeding back the divided output voltage to the non-inverting input end of the error amplifier; The input end of the auxiliary passage is connected with the voltage of the internal node of the main error amplifier, the output end of the auxiliary passage is connected with the grid electrode of the main power tube, and the auxiliary passage is used for forming a feed-forward passage to generate zero point so as to carry out loop stability compensation.
2. The fully integrated low dropout linear regulator of claim 1, wherein the main error amplifier comprises a symmetrical operational amplifier, a cross-coupling structure and a bias MOS tube, wherein the symmetrical operational amplifier is used for providing gain, the cross-coupling structure is used for distributing more current to an output stage of the symmetrical operational amplifier to increase slew rate in a transient condition, and the bias MOS tube is used for switching in bias voltage; The symmetrical operational amplifier comprises a first MOS tube, a second MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube and a fourteenth MOS tube; the external power supply is connected with the source electrode of the first MOS tube and the source electrode of the second MOS tube, and provides fixed tail current flowing into the branches of the first MOS tube and the second MOS tube; The grid electrode of the first MOS tube is used as a negative phase input end to be connected with external reference voltage, the drain electrode of the first MOS tube is connected with the grid electrode and the drain electrode of the ninth MOS tube, the grid electrode of the second MOS tube is used as a positive phase input end to be connected with the output end of the resistor feedback network, the drain electrode of the second MOS tube is connected with the grid electrode and the drain electrode of the tenth MOS tube, and the cross coupling structure and the bias MOS tube are connected between the positive phase input end and the negative phase input end; the first MOS tube and the second MOS tube distribute the current of the tail current source according to the difference value of the grid voltage; the grid electrode of the ninth MOS tube is connected with the grid electrode of the eleventh MOS tube, and the source electrode of the ninth MOS tube is grounded; The tenth MOS tube forms a current mirror structure to convert the branch current of the second MOS tube into voltage; the drain electrode of the eleventh MOS tube is connected with the grid electrode and the drain electrode of the thirteenth MOS tube, and the source electrode of the eleventh MOS tube is grounded; The drain electrode of the twelfth MOS tube is connected with the drain electrode of the fourteenth MOS tube and the input end of the buffer, and the source electrode of the twelfth MOS tube is grounded; the grid electrode of the thirteenth MOS tube is connected with the grid electrode of the fourteenth MOS tube, the source electrode of the thirteenth MOS tube is connected with an external power supply, the thirteenth MOS tube forms a current mirror structure to convert the current of the eleventh MOS tube branch into voltage, the source electrode of the fourteenth MOS tube is connected with a working power supply, and the fourteenth MOS tube mirrors the current of the thirteenth MOS tube branch.
3. The fully integrated low dropout linear regulator according to claim 2, wherein the cross-coupling structure includes a third MOS transistor, a fourth MOS transistor, a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor, and an eighth MOS transistor; The grid electrode of the third MOS tube is connected with an external reference voltage, the drain electrode of the third MOS tube is connected with the grid electrode and the drain electrode of the seventh MOS tube and the grid electrode of the sixth MOS tube, and the source electrode of the third MOS tube is connected with the source electrode of the fourth MOS tube; the grid electrode of the fourth MOS tube is connected with the output end of the resistor feedback network, and the drain electrode of the fourth MOS tube is connected with the grid electrode and the drain electrode of the eighth MOS tube and the grid electrode of the fifth MOS tube; The source electrode of the seventh MOS tube is grounded, the seventh MOS tube forms a current mirror structure to convert the branch current of the third MOS tube into voltage; the drain electrode of the fifth MOS tube is connected to the connecting line of the drain electrodes of the first MOS tube and the ninth MOS tube, and the source electrode of the fifth MOS tube is grounded; The drain electrode of the sixth MOS tube is connected to the connecting line of the drain electrodes of the second MOS tube and the tenth MOS tube, and the source electrode of the sixth MOS tube is grounded; the bias MOS tube comprises a twenty-four MOS tube and a twenty-five MOS tube; The drain electrode of the twenty-fourth MOS tube is connected with the source electrode of the first MOS tube and the source electrode of the second MOS tube, the grid electrode of the twenty-fourth MOS tube is connected with the second bias voltage output end of the bias circuit, the source electrode of the second fourteenth MOS tube is connected with an external power supply, the drain electrode of the twenty-fifth MOS tube is connected with the source electrode of the third MOS tube and the source electrode of the fourth MOS tube, the grid electrode of the twenty-fifth MOS tube is connected with the second bias voltage output end of the bias circuit, and the source electrode of the twenty-fifth MOS tube is connected with the external power supply.
4. The fully integrated low dropout linear regulator of claim 3, wherein the bias circuit includes an eighteenth MOS transistor, a nineteenth MOS transistor, a twentieth MOS transistor, and a twenty third MOS transistor; The grid electrode of the eighteenth MOS tube is connected with the output end of the main error amplifier, the drain electrode of the eighteenth MOS tube is connected with the grid electrode and the drain electrode of the nineteenth MOS tube, the source electrode of the eighteenth MOS tube is connected with an external power supply, and the body end of the eighteenth MOS tube is connected with the drain electrode of the sixteenth MOS tube; The source electrode of the nineteenth MOS tube is grounded, and the nineteenth MOS tube forms a current mirror structure to convert the sampling current of the eighteenth MOS tube into a first bias voltage; The grid electrode of the twenty-eighth MOS tube is connected with the grid electrode of the nineteenth MOS tube, the drain electrode of the twenty-eighth MOS tube is connected with the grid electrode and the drain electrode of the twenty-third MOS tube, and the source electrode of the twenty-eighth MOS tube is grounded; The grid electrode of the twenty-third MOS tube is connected with the grid electrode of the twenty-fourth MOS tube and the grid electrode of the twenty-fifth MOS tube, the twenty-fourth MOS tube mirrors the current of the twenty-third MOS tube branch, the twenty-fifth MOS tube mirrors the current of the twenty-third MOS tube branch, the source electrode of the twenty-third MOS tube is connected with an external power supply voltage, and the twenty-third MOS tube provides a second bias voltage for a tail current source of the main error amplifier through the grid electrode.
5. The fully integrated low dropout linear regulator of claim 1, wherein the buffer comprises a fifteenth MOS transistor, a sixteenth MOS transistor, a seventeenth MOS transistor, a twenty first MOS transistor, a twenty second MOS transistor, and a first resistor; The grid electrode of the fifteenth MOS tube is connected with the output end of the main error amplifier, the drain electrode of the fifteenth MOS tube is connected with the drain electrode of the twenty-first MOS tube, the source electrode of the fifteenth MOS tube is connected with the drain electrode of the sixteenth MOS tube, and the body end of the fifteenth MOS tube is connected with the drain electrode of the sixteenth MOS tube; The grid electrode of the sixteenth MOS tube is connected to a connecting line of the source electrode of the fifteenth MOS tube and the drain electrode of the sixteenth MOS tube, and the source electrode of the sixteenth MOS tube is connected to an external power supply; The grid electrode and the drain electrode of the seventeenth MOS tube are respectively connected with the grid electrode of the main power tube and the drain electrode of the twenty-second MOS tube, the source electrode of the seventeenth MOS tube is connected to a connecting line of the source electrode of the fifteenth MOS tube and the drain electrode of the sixteenth MOS tube, and the body end of the seventeenth MOS tube is connected with the drain electrode of the sixteenth MOS tube; The grid electrode of the twenty-first MOS tube is connected with the first bias voltage output end, and the source electrode of the twenty-first MOS tube is grounded; the twenty-second MOS tube is connected with the first bias voltage output end, and the source electrode of the twenty-second MOS tube is grounded; The first end of the first resistor is connected with an external power supply, and the second end of the first resistor is connected with the drain electrode of the sixteenth MOS tube.
6. The fully integrated low dropout linear regulator of claim 1, wherein said auxiliary error amplifier includes a twenty-eighth MOS transistor, a twenty-ninth MOS transistor, and a thirty-eighth MOS transistor; the grid electrode of the twenty-eighth MOS tube is connected with the first bias voltage output end, the drain electrode of the twenty-eighth MOS tube is connected with the grid electrode of the secondary power tube, and the source electrode of the twenty-eighth MOS tube is grounded; the current inflow end of the bias current source is connected with the grid electrode and the drain electrode of the twenty-ninth MOS tube, and the current outflow end of the bias current source is grounded; the grid electrode and the drain electrode of the twenty-ninth MOS tube are connected with the grid electrode of the thirty-ninth MOS tube, and the source electrode of the twenty-ninth MOS tube is connected with an external power supply; The drain electrode of the thirty-eighth MOS tube is connected with the grid electrode of the secondary power tube, the source electrode of the thirty-eighth MOS tube is connected with an external power supply, and the current of the thirty-eighth MOS tube mirror image and the current of the twenty-eighth MOS tube mirror image are compared to adjust the on-off degree of the secondary power tube.
7. The fully integrated low dropout linear regulator of claim 1, wherein said resistive feedback network includes a first feedback resistor and a second feedback resistor; The first end of the first feedback resistor is connected with the non-inverting input end of the main error amplifier, and the second end of the first feedback resistor is grounded; the first end of the second feedback resistor is connected with the output end of the low-dropout error amplifier, and the second end of the second feedback resistor is connected with the first end of the first feedback resistor.
8. The fully integrated low dropout linear regulator of claim 2, wherein said auxiliary path includes a twenty-sixth MOS transistor and a twenty-seventh MOS transistor; the grid electrode of the twenty-sixth MOS tube is connected with the grid electrode of the thirteenth MOS tube, the drain electrode of the twenty-sixth MOS tube is connected with the drain electrode of the twenty-seventh MOS tube, and the source electrode of the twenty-sixth MOS tube is connected with an external power supply; The twenty-seventh MOS tube is connected with the grid of the tenth MOS tube, the source electrode of the twenty-sixth MOS tube is grounded, and the twenty-sixth MOS tube and the twenty-seventh MOS tube are used for forming a feedforward auxiliary passage to generate a zero point, so that the loop stability is improved.
9. The fully integrated low dropout linear regulator of claim 1, further comprising a compensation network comprising a first capacitor and a second capacitor, wherein a first end of the first capacitor is connected to an output of the low dropout linear regulator and a second end of the first capacitor is connected to an output of the main error amplifier; The first end of the second capacitor is connected with the output end of the low-dropout linear voltage regulator, the second end of the second capacitor is connected with the output end of the resistor feedback network, and the first capacitor and the second capacitor are used for carrying out loop stability compensation on the low-dropout linear voltage regulator.

Description

Full-integrated low-dropout linear voltage regulator Technical Field The invention relates to the technical field of electronic circuits, in particular to a fully-integrated low-dropout linear voltage regulator. Background Currently, with the rapid development of data center interconnection, 5G, and high-speed optical fiber communication systems, optical communication modules are evolving toward higher rates, lower power consumption, and smaller package sizes. In an optical receiving link, a transimpedance amplifier (TRANSIMPEDANCE AMPLIFIER, TIA) is used as a first-stage key module for converting a weak current signal output by a photoelectric detector (such as a photodiode) into a voltage signal, and the performance of the transimpedance amplifier directly determines the sensitivity, the dynamic range and the bit error rate of the whole receiving link. TIA is required to provide high-gain, low-noise amplification over an extremely wide frequency band, which places extremely stringent demands on the purity, stability, and response speed of its power supply. In order to meet the demands of miniaturization and high integration of the system, the Low dropout linear regulator (Low-dropout regulator, LDO) does not need to have an off-chip large capacitor which is expensive and occupies a larger area of a printed circuit board (Printed Circuit Board, PCB), thereby being beneficial to reducing the cost of the system, reducing the volume and improving the reliability. However, this also means that the LDO loses the key role of off-chip capacitance to provide a low frequency pole in the frequency domain, buffering the load current step change in the time domain. Under the constraint of extremely low quiescent current, the loop bandwidth of the traditional fully integrated LDO is limited, so that the response speed of the LDO to load jump is slow, the output voltage can be greatly overshot/undershot, the normal operation of a subsequent load circuit is seriously influenced, and even the logic error or performance deterioration of a system is caused. Therefore, how to realize the collaborative optimization of high stability, high transient response speed and low static power consumption on the premise of not depending on off-chip capacitance becomes a key technical problem to be solved in the field. In order to solve the driving problem of the LDO under the low power consumption design, a great deal of research is carried out by the former. The current more effective scheme consists of an error amplifier, a power tube, a feedback network, a compensation network and a transient enhancement path. The error amplifier and the feedback network stabilize the output voltage near an ideal value, the power tube provides adjustable load current, the compensation network improves the stability of the system, and the transient enhancement path rapidly injects or extracts current to the grid electrode or the output end of the power tube by detecting the change of the output voltage. The existing scheme effectively improves the bandwidth and the slew rate by increasing the bias current, but greatly increases the static power consumption, and the design of the transient enhancement path can improve the slew rate and get rid of the limitation of the loop bandwidth, but also brings certain difficulty to the circuit design while increasing the power consumption. Therefore, when the existing fully integrated LDO is in conflict of "low power consumption" and "fast response", it is difficult to better combine the low power consumption and the fast transient response of the fully integrated LDO. Disclosure of Invention Accordingly, it is desirable to provide a fully integrated low dropout linear regulator in response to the above-mentioned problems. The invention adopts the following technical scheme: The invention provides a fully integrated low dropout linear voltage regulator, which comprises a main error amplifier, a bias circuit, a buffer, a main power tube, an auxiliary error amplifier, a secondary power tube, a resistor feedback network and an auxiliary passage, wherein the main error amplifier is connected with the bias circuit; The positive phase input end of the main error amplifier is connected with the output end of the resistor feedback network, the negative phase input end of the main error amplifier is connected with an external reference voltage, the output end of the main error amplifier is connected with the input end of the buffer, the output end of the buffer is connected with the grid electrode of the main power tube, the source electrode of the main power tube is connected with an external power supply voltage, the main error amplifier is used for providing loop gain to clamp feedback partial pressure to the external reference voltage, the buffer is used for pushing the pole of the grid electrode of the main power tube and the pole of the output end of the main error amplifier to a target frequency range and driving