CN-122018638-A - Clock signal generation circuit, method, chip and electronic equipment

CN122018638ACN 122018638 ACN122018638 ACN 122018638ACN-122018638-A

Abstract

The embodiment of the application provides a clock signal generating circuit, a clock signal generating method, a clock signal generating chip and an electronic device, wherein the clock signal generating circuit comprises a first counting module, a second counting module, a clock output module and a counting adjustment module, the first counting module is used for counting a first input clock, the second counting module is used for counting a second input clock, the clock output module is used for outputting a target clock signal according to the first enabling signal or the second enabling signal, and the counting adjustment module is used for at least adjusting the counting value of the second counting module. According to the application, under the condition that the frequency of the first input clock is smaller than that of the second input clock, higher adjustment precision can be realized by adjusting the count value of the second counting module, so that the acquisition of a target clock signal with higher precision is facilitated.

Inventors

WANG SHIHAO
WANG WEI
XU SHAOQING

Assignees

芯海科技（深圳）股份有限公司
合肥市芯海电子科技有限公司

Dates

Publication Date: 20260512
Application Date: 20241112

Claims (13)

1. A clock signal generation circuit, comprising: the first counting module is used for counting a first input clock and outputting a first enabling signal when the count reaches a first preset value; the second counting module is used for counting a second input clock and outputting a second enabling signal when the count reaches a second preset value; the clock output module is used for outputting a target clock signal according to the first enabling signal or the second enabling signal; The counting adjustment module is used for adjusting at least the counting value of the second counting module; Wherein the frequency of the first input clock is less than the frequency of the second input clock.
2. The clock signal generation circuit of claim 1, wherein the frequency of the second input clock and the frequency of the first input clock are equal to a first ratio, and the first ratio is equal to a default count value of the second count module.
3. The clock signal generation circuit of claim 1, wherein the second counting module starts counting the second input clock in response to the first enable signal, and the clock output module outputs the target clock signal in response to the second enable signal.
4. The clock signal generation circuit of claim 1, wherein the count adjustment module comprises a first count adjustment unit and a second count adjustment unit; the first count adjustment unit is configured to write a first count adjustment value, and the second count adjustment unit is configured to write a second count adjustment value; the first counting adjustment value and the second counting adjustment value are determined according to the environmental temperature of the crystal oscillator in a preset period and a preset crystal oscillator temperature curve.
5. The clock signal generation circuit of claim 4, wherein the first counting module comprises a first counter and the second counting module comprises a second counter; The trigger end of the first counter is used for accessing the first input clock, and the loading value input end of the first counter is connected with the first count adjusting unit; The trigger end of the second counter is used for accessing the second input clock, and the loading value input end of the second counter is connected with the second count adjusting unit.
6. The clock signal generation circuit of claim 5, wherein an output of the first counter is coupled to a load enable of the second counter, and an output of the second counter is coupled to an input of the clock output module.
7. The clock signal generation circuit of claim 4, wherein the clock signal generation circuit has a first mode of operation and a second mode of operation; When the clock signal generating circuit is in the first working mode, the first counting adjustment unit is configured to write a first counting adjustment value determined by the crystal oscillator in a first preset working period, and the second counting adjustment unit is configured to write a second counting adjustment value determined by the crystal oscillator in the first preset working period; when the clock signal generating circuit is in the second working mode, the first count adjusting unit is configured to write a first count adjusting value determined by the crystal oscillator in a second preset working period; The second preset working period is N times of the first preset working period, and N is an integer larger than 1.
8. A clock signal generation method, comprising: measuring the ambient temperature of at least one crystal oscillator in a preset period; determining at least a second counting adjustment value according to the ambient temperature of the at least one crystal oscillator and a preset crystal oscillator temperature curve; in the counting process of the first counting module and the second counting module, the counting value of the second counting module is adjusted according to the second counting adjustment value; The first counting module is used for counting a first input clock, the second counting module is used for counting a second input clock, and the frequency of the first input clock is smaller than that of the second input clock.
9. The clock signal generation method of claim 8, wherein the frequency of the second input clock and the frequency of the first input clock are equal to a first ratio, and the first ratio is equal to a default count value of the second count module.
10. The method of generating clock signals according to claim 8, wherein the step of determining at least a second count adjustment value based on the ambient temperature of the at least one crystal oscillator and a preset crystal oscillator temperature profile comprises: Determining a first counting adjustment value and a second counting adjustment value according to the ambient temperature of the at least one crystal oscillator and a preset crystal oscillator temperature curve; the step of adjusting the count value of the second counting module according to the second count adjustment value in the counting process of the first counting module and the second counting module comprises the following steps: And in the counting process of the first counting module and the second counting module, the counting value of the first counting module is adjusted according to the first counting adjustment value, and the counting value of the second counting module is adjusted according to the second counting adjustment value.
11. The method of claim 10, wherein the step of determining the first count adjustment value and the second count adjustment value according to the ambient temperature of the at least one crystal oscillator and a preset crystal oscillator temperature profile comprises: Determining a clock deviation value according to the ambient temperature of the at least one crystal oscillator and a preset crystal oscillator temperature curve; determining the first count adjustment value and a compensation margin according to the clock offset value and the period of the first input clock; And determining the second count adjustment value according to the compensation margin and the period of the second input clock.
12. A chip comprising the clock signal generation circuit according to any one of claims 1 to 7.
13. An electronic device comprising the chip of claim 12.

Description

Clock signal generation circuit, method, chip and electronic equipment Technical Field The present application relates to the field of integrated circuits, and in particular, to a clock signal generating circuit, a clock signal generating method, a clock signal generating chip, and an electronic device. Background The real-time clock RTC (Real Time Clock) is a technology widely used in electronic systems, and can provide accurate real-time or time reference (such as accurate timing of year/month/day/time/minute/second, etc.) for the electronic system through a quartz clock so as to realize functions of system time, alarm clock function, timer, etc. In some application systems without network connection, because no network time service exists, the time reference of the electronic system is completely ensured by the precision of the real-time clock, so that the precision of the real-time clock needs to be ensured in design for some application systems with high-precision clock requirements. However, one of the characteristics of the quartz clock is that clock accuracy varies with temperature, and in general, frequency variation of a normal temperature (about 25 ℃) clock is minimal, and the frequency of the clock gradually decreases with temperature change (normal temperature to high temperature or normal temperature to low temperature), which results in a problem of decreasing real-time clock accuracy. Disclosure of Invention In view of the above problems, embodiments of the present application provide a clock signal generating circuit, a clock signal generating method, a clock signal generating chip, and an electronic device, so as to solve the above technical problems. In a first aspect, an embodiment of the present application provides a clock signal generating circuit, including: the first counting module is used for counting a first input clock, resetting a count value when the count reaches a first preset value and outputting a first enabling signal; The second counting module is used for counting a second input clock, resetting the count value when the count reaches a second preset value and outputting a second enabling signal; The clock output module is used for outputting a target clock signal according to the first enabling signal or the second enabling signal; The counting adjustment module is used for adjusting the counting value of the second counting module at least; Wherein the frequency of the first input clock is less than the frequency of the second input clock. In a second aspect, an embodiment of the present application further provides a clock signal generating method, including: measuring the ambient temperature of at least one crystal oscillator in a preset period; Determining at least a second counting adjustment value according to the ambient temperature of at least one crystal oscillator and a preset crystal oscillator temperature curve; in the counting process of the first counting module and the second counting module, the counting value of the second counting module is adjusted according to the second counting adjustment value; The first counting module is used for counting the first input clock, the second counting module is used for counting the second input clock, and the frequency of the first input clock is smaller than that of the second input clock. In a second aspect, an embodiment of the present application further provides a chip, including the clock signal generating circuit described above. In a third aspect, an embodiment of the present application further provides an electronic device, including the above chip or clock signal generating circuit. The application uses the first counting module to count the first input clock and uses the second counting module to count the second input clock, the first counting module can reset the count value and output the first enabling signal when the count reaches the first preset value, the second counting module can reset the count value and output the second enabling signal when the count reaches the second preset value, therefore, the clock output module can output the target clock signal according to the first enabling signal or the second enabling signal, meanwhile, the count value of the second counting module can be adjusted at least by the count adjusting module, the count value of the second counting module is equivalent to the period number of the second input clock in one period of changing the target clock signal, and the count value of the second counting module can realize higher adjusting precision when the frequency of the first input clock is smaller than the frequency of the second input clock (namely the period of the second input clock is smaller), thereby being beneficial to obtaining the target clock signal with higher precision. These and other aspects of the application will be more readily apparent from the following description of the embodiments. Drawings In order to more clearly illustrate the technical