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CN-122018776-A - Memory device and method for operating a memory device

CN122018776ACN 122018776 ACN122018776 ACN 122018776ACN-122018776-A

Abstract

Memory devices and methods for operating memory devices are disclosed. A storage device according to some example embodiments may include a non-volatile memory device including a plurality of memory units configured to store user data and metadata, and a storage controller including a plurality of cores, the storage controller configured to issue metadata to one of the plurality of memory units based on whether each of a plurality of paths corresponding to the plurality of cores is in a busy state.

Inventors

  • Jiang Nanxu

Assignees

  • 三星电子株式会社

Dates

Publication Date
20260512
Application Date
20250624
Priority Date
20241112

Claims (20)

  1. 1. A storage device, comprising: a nonvolatile memory device including a plurality of memory cells configured to store user data and metadata, and A memory controller including a plurality of cores, the memory controller configured to issue metadata to one of the plurality of memory units based on whether each of a plurality of paths corresponding to the plurality of cores is in a busy state.
  2. 2. The storage device of claim 1, wherein: The busy state of each of the plurality of paths is determined based on a number of pending requests in a task queue of a core corresponding to each of the plurality of paths.
  3. 3. The storage device of claim 1, wherein: In response to a first path of the plurality of paths being in a busy state and a second path of the plurality of paths being in a normal state, the memory controller is configured to monitor whether each of a plurality of channels connected to a core corresponding to the second path is in a busy state.
  4. 4. The storage device of claim 3, wherein: The busy state of each of the plurality of channels is determined based on a number of memory units in the busy state among the plurality of memory units connected to each of the plurality of channels.
  5. 5. The storage device of claim 3, wherein: in response to a first channel among the plurality of channels connected to the core corresponding to the second path being in a busy state and a second channel among the plurality of channels being in a normal state, the memory controller is configured to monitor whether each of a plurality of first memory units connected to the second channel among the plurality of memory units is in a busy state.
  6. 6. The storage device of claim 5, wherein: In response to a third memory unit of the plurality of first memory units being in a busy state and a second memory unit of the plurality of first memory units being in a normal state, the memory controller is configured to issue metadata to the second memory unit.
  7. 7. The storage device of claim 6, wherein: In response to the metadata being sent to the second memory unit, the storage controller is configured to update the metadata location table.
  8. 8. The storage device of claim 5, wherein: The memory controller is configured to issue metadata based on a number of metadata issues for each of the plurality of first memory units connected to the second channel among the plurality of memory units.
  9. 9. The storage device of claim 8, wherein: In response to the number of metadata issues for a third memory unit of the plurality of first memory units being greater than the number of metadata issues for a second memory unit of the plurality of first memory units, the storage controller is configured to issue metadata to the second memory unit and update the metadata issue table.
  10. 10. The storage device of any one of claims 1 to 9, wherein: the plurality of memory units includes a plurality of first memory blocks configured to store user data and a plurality of second memory blocks configured to store metadata and different from the plurality of first memory blocks.
  11. 11. The storage device of claim 10, wherein: The plurality of second memory blocks are single level cell blocks.
  12. 12. A storage device, comprising: a nonvolatile memory device including a plurality of memory cells configured to store user data and metadata, and A storage controller configured to issue metadata to a plurality of first memory units among the plurality of memory units based on whether each of the plurality of memory units is in a busy state.
  13. 13. The storage device of claim 12, wherein: The plurality of first memory cells are connected to a first channel in a normal state among a plurality of channels connected to a nonvolatile memory device.
  14. 14. The storage device of claim 12, wherein: The plurality of first memory cells includes a third memory cell and a second memory cell in a normal state, and The storage controller is configured to issue metadata to one of the third memory unit and the second memory unit based on the number of metadata issues for the third memory unit and the second memory unit.
  15. 15. The storage device of claim 14, wherein: in response to the number of metadata issues for the third memory unit being greater than the number of metadata issues for the second memory unit, the storage controller is configured to issue metadata to the second memory unit and update the metadata issue table and the metadata location table.
  16. 16. The storage device of claim 13, wherein: The number of first memory units in a busy state among the plurality of first memory units connected to the first channel is less than or equal to a threshold value.
  17. 17. The storage device of claim 13, wherein: the memory controller includes a plurality of cores, and the first channel is connected to a first core corresponding to a first path in a normal state among the plurality of cores.
  18. 18. The storage device of claim 17, wherein: The number of pending requests in the task queue of the first core is less than a threshold.
  19. 19. A method of operating a storage device, comprising: constructing metadata based on the user data; determining a location where metadata is to be stored based on whether each of a plurality of paths corresponding to a plurality of cores included in a memory controller is in a busy state, whether each of a plurality of channels connected to each of the plurality of cores is in a busy state, and whether each of a plurality of memory units of a nonvolatile memory device is in a busy state; emitting metadata to the location, and The location of the metadata is updated.
  20. 20. The method of operating a storage device of claim 19, further comprising: Based on the number of metadata issues for each of the plurality of memory units, a location where metadata is to be stored is determined.

Description

Memory device and method for operating a memory device The present application claims priority and rights of korean patent application No. 10-2024-0160244 filed on the korean intellectual property office on day 11 and 12 of 2024, the entire contents of which are incorporated herein by reference. Technical Field Some example embodiments of the inventive concepts relate to a storage device and a method for operating a storage device. Background The nonvolatile memory device is a memory device that holds stored data even if power is turned off. Nonvolatile memory devices include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), flash memory devices, phase change RAM (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), and Ferroelectric RAM (FRAM). Among them, the flash memory device stores a set of address mapping information in a memory block for performing operations such as reading or writing of data. When storing data, metadata representing address mapping information of the data may be stored in the flash memory. Meanwhile, the number of NAND dies included in a high-capacity SSD (solid state drive) has been increasing recently, which causes problems such as increased buffering and longer channel occupation time when storing metadata. Currently, however, metadata is stored sequentially without scheduling, which may degrade and/or reduce performance of the SSD. Disclosure of Invention Some example embodiments of the inventive concepts provide a storage device and a method for operating the storage device with improved performance by setting a storage order of metadata. According to some example embodiments of the inventive concepts, a storage device may include a non-volatile memory device including a plurality of memory units configured to store user data and metadata, and a storage controller including a plurality of cores, the storage controller configured to issue metadata to one of the plurality of memory units based on whether each of a plurality of paths corresponding to each of the plurality of cores is in a busy state. A storage device according to some example embodiments may include a non-volatile memory device including a plurality of memory units configured to store user data and metadata, and a storage controller configured to issue metadata to a plurality of first memory units among the plurality of memory units based on whether each of the plurality of memory units is in a busy state. A method of operating a storage device according to some example embodiments may include constructing metadata based on user data, determining a location where the metadata is to be stored based on whether each of a plurality of paths corresponding to each of a plurality of cores included in a storage controller is in a busy state, whether each of a plurality of channels connected to each of the plurality of cores is in a busy state, and whether each of a plurality of memory units of a nonvolatile memory device is in a busy state, issuing the metadata to the location, and updating the location of the metadata. According to some example embodiments, a storage system may include a host and a storage device. The storage device may include a non-volatile memory device including a plurality of memory units configured to store user data and metadata received from a host, and a storage controller including a plurality of cores. The memory controller may be configured to issue metadata to one of the plurality of memory units based on whether each of a plurality of paths corresponding to each of the plurality of cores is in a busy state. Drawings FIG. 1 is a block diagram illustrating a storage system according to some example embodiments. FIG. 2 is a block diagram that schematically illustrates software layers of a storage system, in accordance with some demonstrative embodiments. Fig. 3 is a block diagram illustrating a storage device according to some example embodiments. Fig. 4 is a block diagram illustrating a storage device according to some example embodiments. FIG. 5 is a block diagram illustrating a memory controller according to some example embodiments. Fig. 6 is a block diagram illustrating a non-volatile memory device according to some example embodiments. Fig. 7 is a circuit diagram exemplarily showing one memory block among a plurality of memory blocks included in a memory cell array according to some example embodiments. Fig. 8 is a diagram for explaining an operation of a storage device according to some example embodiments. Fig. 9 is a diagram for explaining an operation of a storage device according to some example embodiments. Fig. 10 is a diagram for explaining an operation of a storage device according to some example embodiments. Fig. 11 is a diagram for explaining an operation of a storage device according to some example embodiments. Fig. 12 is a diagram for explaining an operation of a storage device according