CN-122018893-A - Instrument landing waveform design method and system based on operator component

CN122018893ACN 122018893 ACN122018893 ACN 122018893ACN-122018893-A

Abstract

The invention provides an instrument landing waveform design method and system based on an operator component. The method comprises the following step S1 of carrying out operator splitting on the ILS waveform function. Each operator bears a single signal processing function and has independent input and output interfaces and configurable parameters to form a minimum functional unit. S2, realizing the functions of the operator components. Aiming at the functions of each operator, an input/output interface and a parameter type are designed according to a core signal processing algorithm of an operator component. And S3, carrying out generalized encapsulation on the operator assembly. The standardized encapsulation of the operator components is completed by defining a unified interface standard, establishing an operator registration mechanism, and realizing the adaptation of the general data stream and the scheduling in the running process. And S4, assembling the operator assembly. And assembling the packaged operators according to an ILS signal processing flow to generate a complete ILS waveform signal chain. The waveform component can be rapidly transplanted and deployed in different software defined radio systems, the development and verification period is short, the portability is high, and the reusability is high.

Inventors

SUN YAOJIE
LIU YAN
WU MIN
YI CHANGYU
WANG TAO

Assignees

中国航空无线电电子研究所

Dates

Publication Date: 20260512
Application Date: 20251227

Claims (8)

1. An instrument landing waveform design method based on an operator component is characterized by comprising the following steps: The method comprises the steps of S1, carrying out functional decomposition on generation logic of a standard ILS waveform, wherein the generation logic comprises a course signal generation unit, a downslide signal generation unit, a course resolving unit and a downslide resolving unit; S2, realizing operator assembly, namely realizing a core signal processing algorithm aiming at each operator split in S1, and designing a standardized assembly form; S3, operator assembly standardized packaging and registration, namely, completing standardized packaging of the operator assembly by defining a unified interface standard, establishing an operator registration mechanism, and realizing universal data stream adaptation and runtime scheduling; and S4, dynamically assembling and generating the waveform signal chain, and assembling the packaged operators according to an ILS signal processing flow to generate a complete ILS waveform signal chain.
2. The instrument landing waveform design method based on the operator component according to claim 1, wherein the operator component comprises, but is not limited to, a signal source component, an addition component, a multiplication component, a subtraction component, a division component, a source component, a sink component, a band-pass filter component, a low-pass filter component, an AM demodulation component, an envelope detection component and an oscilloscope component, the signal source component is used for generating sine wave/modulation waveforms with specified frequency and amplitude, the addition component is used for adding multiple signals, the multiplication component is used for performing amplitude modulation or mixing operation, the subtraction component is used for subtracting multiple signals, the division component is used for dividing the multiple signals, the source component is used for receiving external radio frequency signals, the sink component is used for outputting signals to a transmitting end, the band-pass filter component is used for selecting specific sub-audio frequency bands or RF bands, the low-pass filter component is used for suppressing and smoothing envelope, the AM demodulation component is used for recovering envelope or modulating signals from AM signals, the envelope detection component is used for extracting the amplitude envelope and smoothing the amplitude envelope, and the oscilloscope component is used for displaying high-frequency domain/difference curve.
3. The method for designing an instrument landing waveform based on an operator module according to claim 2, wherein the operator module of the ILS course signal generation unit comprises a signal source module, an addition module, a multiplication module and a signal sink module.
4. The method for designing an instrument landing waveform based on an operator module according to claim 2, wherein the operator module of the ILS glide signal generation unit comprises a signal source module, an addition module, a multiplication module and a signal sink module.
5. The instrument landing waveform design method based on the operator module according to claim 2, wherein the operator module of the ILS course signal calculation unit comprises a source module, a band-pass filter module, an AM demodulation module, an envelope detection module, an addition module, a subtraction module, a division module and an oscilloscope module.
6. The method for designing the instrument landing waveform based on the operator module according to claim 2, wherein the operator module of the ILS downslide signal calculation unit comprises a source module, a low-pass filtering module, an AM demodulation module, an envelope detection module, an addition module, a subtraction module, a division module and an oscilloscope module.
7. The method for designing an instrument landing waveform based on the operator component according to claim 1, wherein in the step S3, the method specifically comprises the following steps: S31, operator component definition and registration mechanism A) Each operator component defines a unified meta-information description file, and describes the name, version, function description, input/output port type and parameter table of the component; b) Each operator component declares four standardized interfaces of input/output/feedback/label, and interface attributes comprise data type, flow direction, sampling rate requirement, buffer size suggestion and label support or not; c) When the framework is started, scanning an operator component library directory, reading a meta-information file, registering component meta-information into an operator registry, and establishing a port capacity mapping table; d) After registration is completed, the system outputs a component registry and a port capability table for use in an assembly stage; S32, interface standardization definition A) The input stream interface is a frame-component, the frame transmits an input buffer pointer to an operator, an input sample address and length, a data format identifier, the number of available samples and a stream label are provided, and the operator obtains data through the interface to operate; b) The output stream interface is a frame-component, after the operator operation is finished, the result is written into an output buffer area and a stream label is attached, and an output sample address, a maximum writable length, an output format identifier and a label attaching function are provided; c) The data feedback interface is a component, a frame, and an operator feeds back an operation state to the frame in the operation process, wherein the number of consumed samples/number of produced samples, operator processing time delay and buffer area occupancy rate are fed back, and the frame dynamically adjusts the sampling rate, the stepping length or the start-stop strategy according to feedback information to realize self-adaptive scheduling; d) The stream tag interface is a bidirectional interface, supports input and output streams and carries metadata tag data, and comprises tag key values such as a time stamp, signal power, a validity mark and the like, and the tags are transmitted along with the data stream and are used for signal synchronization, time alignment and debugging monitoring; s33, establishing a data flow channel A) In the operator assembly diagram, each pair of upstream and downstream ports establishes a data flow channel, and the channel is responsible for distributing an annular buffer area and a label buffer area by a frame so as to realize continuous transmission and asynchronous decoupling of samples among operators; b) The input/output port of each operator is mapped to the annular buffer area to support a zero copy transmission mechanism, namely, the upstream operator writes in the buffer, the frame marks samples are available, the downstream operator directly reads, and no additional data copying is needed; c) The data flow adapter provides a universal data access interface for format conversion and synchronization and unifies data formats among different operators; d) The frame scheduler automatically triggers operator execution according to the dependency relationship among operators, the number of available samples of input buffer and the residual space of output buffer, and the scheduling strategy can adopt static topology scheduling and dynamic data driving scheduling; e) The data stream transmission process comprises the steps of finishing the execution of an upstream operator, writing data into an output buffer, updating a channel state by a frame and triggering a downstream operator, reading input data by the downstream operator and executing calculation, feeding back the number of consumed samples by the operator, and recovering a buffer space by the frame; S34, operator assembly model establishment A) The connection rule is defined as that the input port type and the output port type must be matched, operators with the same sampling rate can be directly connected, if the sampling rate is not matched, an intermediate operator can be automatically inserted; b) Describing a data flow connection relation among operators by using a graph structure, wherein nodes represent operators, edges represent data channels, and a framework analyzes an assembly graph to automatically generate a runtime topology; c) The parameter set of each operator is loaded from the configuration file, and the parameters support dynamic modification during running so as to support real-time debugging and system self-adaption.
8. An operator component-based instrument landing waveform generation system, which is used for implementing the operator component-based instrument landing waveform design method according to any one of claims 1-7, and comprises the following steps: The operator component library is used for storing a plurality of encapsulated ILS signal processing operator components which accord with the unified interface standard; The operator warehouse and the registration center are used for managing meta information of the operator components and supporting registration, inquiry and version management of operators; the signal chain assembly and configuration module is used for providing a visual or scripted tool for a user to select and connect operators and configuration parameters to form a waveform generation task; And the operation scheduling engine is responsible for instantiating operators in the signal chain, managing the transfer of data streams among the operators and controlling the execution time sequence of the operators.

Description

Instrument landing waveform design method and system based on operator component Technical Field The invention belongs to the technical field of aviation instruments, and particularly relates to an instrument landing waveform design method and system based on an operator component. Background The Instrument landing system (Instrument LANDING SYSTEM, ILS) is one of the most mature and reliable precision approach landing systems in modern aviation navigation. The ILS provides three-dimensional navigation information for the aircraft through a heading beacon (Localizer) and a glide beacon (GLIDE PATH), including azimuth (heading), pitch (glide) and distance information, so that the aircraft can realize safe and precise approach under the condition of low visibility. The traditional ILS waveform design mostly adopts special hardware and a single-body type signal processing architecture, and has the defects of tight coupling of algorithm and hardware logic, lack of flexibility and expansibility, non-uniform packaging mode of each functional module, lack of reusable standard operator components, difficulty in rapid migration of the waveform design to different software radio platforms, high development and maintenance cost and lack of systematic operator modeling and automatic assembly mechanisms. With the development of software radio and operator waveform architecture, signal processing can be implemented by general-purpose hardware and standardized components. The operator design method provided by the invention can split ILS waveforms into functional operator components which can be independently developed, verified and multiplexed, and the operator components are assembled and operated through unified interface standards, so that waveform componentization, configurability and cross-platform deployment are realized. Disclosure of Invention Aiming at the problems that instrument landing waveform design and development components are not uniform in encapsulation, difficult to multiplex and transplant and the like, the invention provides an instrument landing waveform design method based on an operator component. According to the first aspect of the invention, the invention provides an instrument landing waveform design method based on an operator component, which comprises the following steps: S1, waveform function operator splitting; The generation logic of the standard ILS waveform is functionally decomposed and comprises a course signal generation unit, a downslide signal generation unit, a course resolving unit and a downslide resolving unit; Splitting the whole waveform generation flow into a plurality of operators bearing a single signal processing function according to a function minimization principle, wherein each operator is provided with a definitely defined input data interface, an output data interface and configurable functional parameters, a minimum function operator component library is formed, and operator components are combined through topological relations to form any complex waveform. S2, operator modularization realization; Aiming at each operator split in S1, a core signal processing algorithm is realized, and a standardized component form is designed; Algorithm kernel based on Digital Signal Processing (DSP) technology or Software Defined Radio (SDR) platform, implementing operators and core algorithms such as direct digital frequency synthesis (DDS), digital modulation, digital up-conversion, etc. And the input/output interface is used for defining a unified data interface which is irrelevant to physical media, such as a complex baseband (I/Q) data stream interface, a message queue or a shared memory and the like, so that seamless butt joint of data streams among operators is ensured. Parameter configuration interface defining dynamically configurable parameter sets such as frequency, amplitude, phase, modulation depth, switch state, etc. for each operator and providing uniform configuration access methods (e.g. API, profile injection). S3, operator component standardized packaging and registration: In order to realize the 'plug and play' and unified management of operators, the following standardized packaging is carried out: defining unified component interface standards, namely defining life cycle interfaces such as initialization (int), execution (process), configuration, destruction (deinit) and the like which are required to be realized by all operator components; establishing an operator registration and management mechanism, namely constructing an operator component library, wherein each packaged operator component registers a unique identifier, a function description, an interface definition and a parameter list of the operator component library to the warehouse; The method comprises the steps of designing a lightweight runtime engine, transmitting standardized data streams among operators, and scheduling each operator to execute in sequence or in parallel according to a predef