CN-122018973-A - Intelligent flight control program adaptation method and system for heterogeneous processing architecture

CN122018973ACN 122018973 ACN122018973 ACN 122018973ACN-122018973-A

Abstract

The application relates to a flight control program intelligent adaptation method and a flight control program intelligent adaptation system for a heterogeneous processing architecture, which solve the technical problems of low efficiency, strategy solidification, difficult knowledge multiplexing and the like when a flight control program is manually transplanted to a domestic or novel chip in the prior art. Whereby the debug environment is automatically deployed, the driver code is generated, and the parallel development branches are initialized. And an event-driven and dependency sensing mechanism is adopted, verification tasks are dynamically scheduled and code integration is coordinated, and finally, a flight control program image is automatically constructed through intelligent adjustment of hardware abstraction layer configuration and interface codes, so that efficient and reliable intelligent adaptation of heterogeneous chip flight control programs is realized. The application has the following technical effects that the automatic intelligent adaptation of the flight control program to the heterogeneous chip is realized, the transplanting efficiency and the code quality are greatly improved, and the reusable adaptation knowledge asset is formed.

Inventors

WU JI
Diao Huayuan
LIANG JIABAO
DING CHAO

Assignees

深圳市乐迪电子有限公司

Dates

Publication Date: 20260512
Application Date: 20260312

Claims (9)

1. A method for intelligent adaptation of a flight control program for a heterogeneous processing architecture, the method being performed by an adaptation decision engine, the operations comprising: Acquiring a hardware description file of a target processing architecture, combining a preset external constraint condition set and a historical adaptation knowledge base, and generating a customized adaptation strategy through a strategy optimization algorithm, wherein the strategy at least comprises environment configuration, a target peripheral configuration list obtained based on analysis of the hardware description file, a test verification path and version control branch structure planning optimized for parallel development; According to the environment configuration part in the strategy, an automatic tool chain is called to deploy a special debugging service component for a target processing architecture according to the need, and an online simulation and debugging channel with resource monitoring capability is established; Analyzing a hardware description file, extracting register mapping, interrupt and clock parameters of each peripheral, matching a universal template from a driving template knowledge base based on the parameters, and synthesizing bottom driving frame codes of each peripheral; Responding to a development completion event triggered by submitting codes on any development branch, and dynamically scheduling automatic verification of ready peripheral drivers according to a test verification path and in combination with the real-time state of simulation resources; after the peripheral driver passes the verification, generating a corresponding hardware abstraction layer configuration change instruction according to the hardware description file for each verified peripheral driver; After the completion of the debugging of the hardware abstraction layer of all necessary peripheral equipment is monitored, analyzing the source codes of the hardware abstraction layer of the target flight control program, automatically identifying the dependency relationship among the peripheral equipment, and dynamically coordinating the code merging sequence of each development branch to the trunk according to the relationship; And executing construction and test through an integrated pipeline, and triggering construction and output of a final flight control program image after meeting integration conditions defined by a strategy.
2. The method for intelligent adaptation of a flight control program to a heterogeneous processing architecture of claim 1, wherein generating a customized adaptation policy by a policy optimization algorithm comprises: Analyzing the hardware description file, and extracting hardware characteristics of the target processing architecture, wherein the hardware characteristics comprise a peripheral resource list, performance parameters, interrupt vector distribution and storage mapping characteristics; based on the extracted hardware features, carrying out matching analysis on the external constraint condition set and the extracted hardware features, and determining the urgency, the resource input upper limit and the key performance index requirements of the adaptation task, thereby generating quantized constraint conditions; Based on the hardware characteristics and the quantization constraint conditions, searching past adaptation cases with similar hardware characteristics and constraint conditions from a historical adaptation knowledge base, and extracting a successful adaptation mode and a typical problem avoidance scheme of the past adaptation cases as historical experience data; Taking hardware characteristics, quantization constraint conditions and historical experience data as input, carrying out multi-objective optimization solution through a strategy optimization algorithm, and finally generating a customized adaptation strategy comprising environment configuration, a target peripheral configuration list, a test verification path and version control branch structure planning aiming at parallel development optimization.
3. The intelligent adaptation method of a flight control program for a heterogeneous processing architecture according to claim 2, wherein the steps of performing multi-objective optimization solution by a policy optimization algorithm with hardware characteristics, quantization constraint conditions and historical experience data as inputs, and finally generating a customized adaptation policy including environment configuration, a target peripheral configuration list, a test verification path and version control branch structure planning for parallel development optimization include: Determining at least three parallel optimization targets based on a quantization constraint condition, wherein the at least three parallel optimization targets comprise an adaptation period target, a driving stability target and a supply chain risk target, wherein the adaptation period target is determined according to an emergency requirement in the quantization constraint condition, the driving stability target is determined according to a peripheral resource list in a hardware characteristic, and the supply chain risk target is determined according to a preset component supply risk level mapping relation and a component model corresponding to each peripheral in the hardware characteristic; analyzing the historical experience data, carrying out feature vectorization on the successfully-adapted cases recorded in the historical experience data based on the performances of each case in the aspects of an adaptation period, driving stability and supply chain risk, and constructing a historical case feature vector library; Based on a historical case feature vector library, searching a plurality of historical cases with highest similarity to current hardware features, current quantization constraint conditions and supply chain risk targets, extracting policy decision paths corresponding to the plurality of historical cases, and encoding the policy decision paths into initial particle swarms of a multi-target particle swarm optimization algorithm; Running a multi-target particle swarm optimization algorithm, performing iterative search in a solution space which takes an adaptation period target, a driving stability target and a supply chain risk target as optimization targets at the same time, dynamically updating the position and the speed of each particle according to the fitness of each particle, and outputting a group of Pareto front candidate strategy sets after reaching a preset convergence condition, wherein each candidate strategy comprises a group of environment configuration, a target peripheral configuration list, a test verification path and a combination of version control branch structure planning; and screening and evaluating the Pareto front candidate strategy set according to the resource investment upper limit and the key performance index requirement in the quantization constraint conditions and combining with the optimization target of the parallel development efficiency, and selecting one candidate strategy which meets all constraint conditions and is comprehensively evaluated to be optimal as a final customized adaptation strategy.
4. The intelligent adaptation method of a flight control program for a heterogeneous processing architecture according to claim 1, wherein the step of calling an automation tool chain to deploy a dedicated debugging service component for a target processing architecture as required according to an environment configuration part in a policy, and the step of establishing an online simulation and debugging channel with resource monitoring capability comprises the steps of: analyzing an environment configuration part in the customized adaptation strategy, determining the type and version of a required debugging service component, and selecting a corresponding debugging server software package and an integrated development environment client plug-in from an automatic tool chain; Installing and configuring the selected debugging server software package on a local development host to load a debugging protocol support matched with a target processing architecture, and starting a background service process of a debugging server; In the integrated development environment, installing the selected client plug-in, configuring communication connection parameters with a local debugging server through the plug-in, and loading a simulation configuration file aiming at a target processing architecture; a connection request is initiated to a locally operated debugging server through a client plug-in an integrated development environment, and a stable communication link between the locally operated debugging server and a target processing architecture flight control board is established, so that an online simulation and debugging channel is formed; After the online simulation and debugging channel is established, a resource monitoring agent is deployed, the connection state, the data throughput and the simulator load information of the channel are collected and fed back in real time, and the initialization of the resource monitoring capability of the debugging channel is completed.
5. The intelligent adaptation method of a flight control program for a heterogeneous processing architecture according to claim 4, wherein deploying a resource monitoring agent, collecting and feeding back connection state, data throughput and simulator load information of a channel in real time, and initializing resource monitoring capability of the debug channel comprises: respectively injecting lightweight monitoring probe code modules for collecting the running indexes into a background service process of a debugging server software package and a client plug-in; Configuring monitoring indexes to be acquired for a monitoring probe, wherein the monitoring indexes at least comprise connection states of on-line simulation and debugging channels, data throughput and simulator load information, and starting an index acquisition function of the monitoring probe; And starting an independent monitoring service process, establishing a data transmission link among the monitoring probe, the monitoring service process and the integrated development environment user interface, and verifying that the monitoring service process can normally receive and display monitoring indexes by sending a test data packet and successfully displaying the test data packet back to the user interface, thereby completing the initialization of the resource monitoring capability of the debugging channel.
6. The intelligent adaptation method of a flight control program for a heterogeneous processing architecture according to claim 1, wherein parsing the hardware description file to extract register mapping, interrupt and clock parameters of each peripheral device, matching universal templates from a driving template knowledge base based on the parameters, and synthesizing bottom driving frame codes of each peripheral device comprises: analyzing the hardware description file, and extracting hardware parameters of each peripheral in the target processing architecture, wherein the hardware parameters at least comprise register mapping addresses, interrupt vector parameters and clock configuration parameters; For each peripheral, based on the extracted hardware parameters, intelligent matching is carried out in a driving template knowledge base, a driving template compatible with the peripheral type and a target processing architecture is positioned, and according to the mapping relation between the hardware parameters and a template interface, parameter filling and configuration item generation are automatically completed; and carrying out grammar checking, dependency analysis and code integration on each peripheral driving template subjected to parameterization through a driving code generation tool to generate each peripheral bottom driving frame code which is accurately matched with the target processing architecture hardware and accords with the version control branch structure planning.
7. The intelligent adaptation method of a flight control program for a heterogeneous processing architecture according to claim 1, wherein the parsing the source code of the hardware abstraction layer of the target flight control program, and the automatically identifying the dependency relationship between the peripherals comprises: Synchronously analyzing a head configuration file and an interface realization source code of a hardware abstraction layer, extracting all configuration macro definitions related to peripheral equipment, and synchronously identifying a peripheral equipment initialization function, a data transmission function and an interrupt processing function related to the macro definitions in the source code; Establishing a unified symbol mapping relation between the peripheral identifier in the extracted configuration macro definition and the corresponding function identified in the source code to form a peripheral function symbol table; Based on the peripheral function symbol table, identifying initialization sequence dependence, runtime data dependence and interrupt processing dependence existing between peripheral devices by analyzing a call chain, a shared global data structure and a nested call relation of interrupt service routines among functions; Integrating the identified multidimensional dependency into a directed dependency graph, wherein nodes represent peripherals, edges represent dependency types and directions, performing loop detection and consistency verification on the dependency graph, and outputting the directed dependency graph with no errors as an automatic identification result.
8. The intelligent adaptation method of a flight control program for a heterogeneous processing architecture according to claim 7, wherein identifying initialization order dependencies, runtime data dependencies, and interrupt handling dependencies existing between peripherals by analyzing call chains among functions, shared global data structures, nested call relationships of interrupt service routines based on a peripheral function symbol table comprises: Based on the initialization functions corresponding to the peripheral devices in the peripheral device function symbol table, analyzing the direct or indirect call relation between the initialization functions to form an initialization function call chain, and extracting the initialization sequence dependence between the peripheral devices from the call chain; Based on the data transfer functions corresponding to the peripheral devices in the peripheral device function symbol table, identifying global data structures read and written by the functions, constructing a complete data flow diagram from a data producer to a data consumer, and extracting runtime data dependence among the peripheral devices from the data flow diagram; based on the interrupt processing function corresponding to each peripheral in the peripheral function symbol table, the nested calling and preemption relation between interrupt service routines is analyzed, an interrupt processing nested relation diagram is formed by combining with the interrupt vector table mapping, and interrupt processing dependence between the peripherals is extracted from the nested relation diagram.
9. A flight control program intelligent adapting system facing to a heterogeneous processing architecture, comprising a memory, a processor and a program stored in the memory and capable of running on the processor, wherein the program can be loaded and executed by the processor to realize a flight control program intelligent adapting method facing to a heterogeneous processing architecture as claimed in any one of claims 1 to 8.

Description

Intelligent flight control program adaptation method and system for heterogeneous processing architecture Technical Field The invention relates to the technical field of embedded system software development, in particular to a flight control program intelligent adaptation method and a flight control program intelligent adaptation system for a heterogeneous processing architecture. Background The unmanned aerial vehicle flight control system is a core control unit of the unmanned aerial vehicle. The main current open source flight control system (such as ArduPilot and PX 4) mainly supports foreign chips, and has insufficient chip support for autonomous research and development in China, so that autonomous development of unmanned aerial vehicle industry in China is restricted. In order to transplant the open source flight control to a domestic chip, a manual adaptation method is generally adopted in the prior art. According to the method, a debugging environment is required to be built manually, a bottom layer driver is rewritten for an operating system, configuration and interface codes of a hardware abstraction layer are modified, the whole flow depends on experience of a developer, and code management and integration test are required to be completed through cooperation of multiple persons. However, the method has the obvious disadvantages of low efficiency, high dependence on manpower and long development period, solidifying an adaptation strategy, incapability of carrying out dynamic optimization according to multi-dimensional constraints such as resources, risks and the like, stiff process, difficult effective multiplexing of different chip adaptation experiences, discrete verification and integration process, dependence on manual coordination, easy error and complex management. Therefore, an automatic and intelligent adaptation method is needed to improve the development efficiency and reliability of the domestic chip flight control. Disclosure of Invention In order to realize the automatic intelligent adaptation of the flight control program to the heterogeneous chip, greatly improve the transplanting efficiency and the code quality and form reusable adaptation knowledge assets, the application provides a flight control program intelligent adaptation method and a flight control program intelligent adaptation system for a heterogeneous processing architecture. In a first aspect, the present application provides a flight control program intelligent adaptation method for heterogeneous processing architecture, which adopts the following technical scheme: a flight control program intelligent adapting method facing to a heterogeneous processing architecture is executed by an adapting decision engine, and the executed operations comprise: Acquiring a hardware description file of a target processing architecture, combining a preset external constraint condition set and a historical adaptation knowledge base, and generating a customized adaptation strategy through a strategy optimization algorithm, wherein the strategy at least comprises environment configuration, a target peripheral configuration list obtained based on analysis of the hardware description file, a test verification path and version control branch structure planning optimized for parallel development; According to the environment configuration part in the strategy, an automatic tool chain is called to deploy a special debugging service component for a target processing architecture according to the need, and an online simulation and debugging channel with resource monitoring capability is established; Analyzing a hardware description file, extracting register mapping, interrupt and clock parameters of each peripheral, matching a universal template from a driving template knowledge base based on the parameters, and synthesizing bottom driving frame codes of each peripheral; Responding to a development completion event triggered by submitting codes on any development branch, and dynamically scheduling automatic verification of ready peripheral drivers according to a test verification path and in combination with the real-time state of simulation resources; after the peripheral driver passes the verification, generating a corresponding hardware abstraction layer configuration change instruction according to the hardware description file for each verified peripheral driver; After the completion of the debugging of the hardware abstraction layer of all necessary peripheral equipment is monitored, analyzing the source codes of the hardware abstraction layer of the target flight control program, automatically identifying the dependency relationship among the peripheral equipment, and dynamically coordinating the code merging sequence of each development branch to the trunk according to the relationship; And executing construction and test through an integrated pipeline, and triggering construction and output of a final flight control program image aft