CN-122018980-A - Register allocation method, device, electronic equipment and readable storage medium

CN122018980ACN 122018980 ACN122018980 ACN 122018980ACN-122018980-A

Abstract

The embodiment of the invention provides a register allocation method, a device, electronic equipment and a readable storage medium, which are used for determining the type attribute of a target operand according to any instruction to be processed under the condition that the target operand of the instruction to be processed is not allocated with a register, determining an instruction allocation rule matched with the target operand based on the relative dominant relationship between the numerical value of the target operand and a constant value in each allocated register and a first basic block where the target operand is located under the condition that the type attribute of the target operand is constant, and determining the target register corresponding to the target operand based on the instruction allocation rule. Therefore, the instruction allocation rule matched with the target operand can be dynamically selected according to the type attribute of the target operand, the constant register allocation process is optimized, unnecessary register allocation is avoided, the value loading operation and the occupied number of registers are reduced, the instruction execution efficiency is improved, and the register utilization rate and the code execution performance are improved.

Inventors

HUANG QIQI
CHEN GUOQI
ZHAO XIAOLIN
LI MEIDAN

Assignees

龙芯中科(西安)科技有限公司

Dates

Publication Date: 20260512
Application Date: 20251216

Claims (13)

1. A method of register allocation, the method comprising: for any instruction to be processed, determining the type attribute of a target operand of the instruction to be processed under the condition that the target operand is not allocated with a register; Determining an instruction allocation rule matched with the target operand based on a comparison result of the numerical value of the target operand and a constant value in each allocated register and a relevant dominant relationship of a first basic block where the target operand is located when the type attribute of the target operand is constant; And determining a target register corresponding to the target operand based on the instruction allocation rule.
2. The method according to claim 1, wherein the method further comprises: And determining a target register corresponding to the target operand based on the first register set under the condition that the type attribute of the target operand is a variable.
3. The method of claim 2, wherein, in the case where the type attribute of the target operand is a variable, after determining a target register corresponding to the target operand based on the first register set, the method further comprises: And updating the reference index value corresponding to the target register in the reference index array to the target operand.
4. The method of claim 1, wherein determining the instruction allocation rule matching the target operand based on the comparison of the value of the target operand with the constant value in each allocated register and the associated dominance of the first basic block in which the target operand resides comprises: determining an allocated register based on an allocable register set corresponding to the to-be-processed instruction; Aiming at any allocated register, acquiring a constant index value corresponding to the allocated register according to a numerical index array; Acquiring a reference index value corresponding to the allocated register according to the reference index array; If the numerical value of the target operand is the same as the constant index value corresponding to the allocated register and the second basic block where the reference index value corresponding to the allocated register is located dominates the first basic block, determining an instruction allocation rule matched with the target operand as a first allocation rule; The determining, based on the instruction allocation rule, a target register corresponding to the target operand includes: the allocated register is determined to be the target register based on the first allocation rule.
5. The method of claim 4, wherein determining the instruction allocation rule matching the target operand based on the comparison of the value of the target operand to the constant value in each allocated register and the associated dominance of the first basic block in which the target operand resides, further comprises: For any allocated register, if the numerical value of the target operand is different from the constant index value in the allocated register, and/or a second basic block where the reference index value corresponding to the allocated register is located cannot dominate the first basic block, determining that an instruction allocation rule matched with the target operand is a second allocation rule; The determining, based on the instruction allocation rule, a target register corresponding to the target operand includes: and determining a target register corresponding to the target operand based on the first register set according to the second allocation rule.
6. The method of claim 5, wherein after the determining the destination register corresponding to the destination operand based on the first register set according to the second allocation rule, the method further comprises: Updating a constant index value of the target register in the numerical index array to a numerical value corresponding to the target operand; and updating the reference index value of the target register in the reference index array to the target operand.
7. The method according to claim 1, wherein the method further comprises: acquiring an idle register set and an allocatable register set corresponding to the target operand; The first set of registers is determined based on the intersection of the set of idle registers and the set of allocable registers.
8. The method of claim 1, wherein the dynamically selected instruction allocation rules include at least one of a constant multiplexing rule, a constant folding rule, a constant cross-basic block multiplexing expansion rule, and a constant priority override rule.
9. The method of claim 8, further comprising, prior to the determining the target register corresponding to the target operand based on the instruction allocation rule, performing conflict detection on candidate registers, the conflict detection to detect at least one of a register read-after-write conflict, a risk of imminent register overflow, and a value override conflict across basic blocks.
10. The method of claim 9, wherein, in the event that there are a plurality of candidate registers, prioritizing the candidate registers is based on at least one of a current frequency of use of the registers, an expected number of multiplexes of constant values in the registers, and an access cost for a class of registers.
11. A register allocation apparatus, the apparatus comprising: a first determining module, configured to determine, for any instruction to be processed, a type attribute of a target operand of the instruction to be processed, where the target operand is not allocated with a register; The second determining module is used for determining an instruction allocation rule matched with the target operand based on a comparison result of the numerical value of the target operand and a constant value in each allocated register and a relevant dominant relationship of a first basic block where the target operand is located when the type attribute of the target operand is constant; and the third determining module is used for determining a target register corresponding to the target operand based on the instruction allocation rule.
12. An electronic device, comprising: A processor, a memory and a computer program stored on the memory and executable on the processor, the processor implementing the register allocation method according to any one of claims 1-10 when executing the program.
13. A readable storage medium, characterized in that instructions in said storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the register allocation method of any one of claims 1-10.

Description

Register allocation method, device, electronic equipment and readable storage medium Technical Field The present invention relates to the field of compiling technologies, and in particular, to a method and apparatus for allocating registers, an electronic device, and a readable storage medium. Background In the compiler register allocation process, aiming at constant operands, the prior art is difficult to accurately judge whether constants crossing basic blocks can safely multiplex the existing registers on the premise of ensuring correct program semantics, so that the problems of constant value repeated loading, increased register occupation quantity and reduced instruction execution efficiency are caused. Disclosure of Invention To overcome the problems in the related art, the present invention provides a register allocation method, apparatus, electronic device, and readable storage medium. In a first aspect, the present invention provides a register allocation method, the method comprising: for any instruction to be processed, determining the type attribute of a target operand of the instruction to be processed under the condition that the target operand is not allocated with a register; Determining an instruction allocation rule matched with the target operand based on a comparison result of the numerical value of the target operand and a constant value in each allocated register and a relevant dominant relationship of a first basic block where the target operand is located when the type attribute of the target operand is constant; And determining a target register corresponding to the target operand based on the instruction allocation rule. In a second aspect, the present invention provides a register allocation apparatus, the apparatus comprising: a first determining module, configured to determine, for any instruction to be processed, a type attribute of a target operand of the instruction to be processed, where the target operand is not allocated with a register; The second determining module is used for determining an instruction allocation rule matched with the target operand based on a comparison result of the numerical value of the target operand and a constant value in each allocated register and a relevant dominant relationship of a first basic block where the target operand is located when the type attribute of the target operand is constant; and the third determining module is used for determining a target register corresponding to the target operand based on the instruction allocation rule. In a third aspect, the invention provides an electronic device comprising a processor, a memory and a computer program stored on the memory and executable on the processor, the processor implementing the register allocation method of any one of the first aspects when executing the program. In a fourth aspect, the present invention provides a readable storage medium, which when executed by a processor of an electronic device, enables the electronic device to perform the steps of the register allocation method as in any of the embodiments of the first aspect described above. In the embodiment of the invention, aiming at any instruction to be processed, the type attribute of a target operand is determined under the condition that a register is not allocated to the target operand of the instruction to be processed, the instruction allocation rule matched with the target operand is determined based on the comparison result of the numerical value of the target operand and the constant value in each allocated register and the relevant dominance relation of a first basic block where the target operand is located under the condition that the type attribute of the target operand is constant, and the target register corresponding to the target operand is determined based on the instruction allocation rule. In this way, by combining the comparison result of the numerical value of the target operand and the constant value in each allocated register and the relevant dominant relationship of the first basic block where the target operand is located, the instruction allocation rule matched with the target operand is dynamically selected, the constant register allocation process is optimized, unnecessary register allocation is avoided, unnecessary value loading operation and the occupied number of registers are reduced, the instruction execution efficiency is improved, and meanwhile, the register utilization rate and the code execution performance are improved. Drawings In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained according to these drawings without inventive effort for a person sk