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CN-122019158-A - Physical register resource recycling method, processor, storage medium and program product

CN122019158ACN 122019158 ACN122019158 ACN 122019158ACN-122019158-A

Abstract

The embodiment of the disclosure discloses a physical register resource recycling method, a processor, a storage medium and a program product. The method comprises the steps of receiving an instruction and a logic register number of the instruction in a renaming stage, obtaining an original physical register number bound with the logic register number, generating returned physical register token information when the original physical register number reaches a recycling standard, and marking the original physical register number as an idle state and updating the original physical register number to an idle physical register pool based on the pre-generated returned physical register token information when the instruction finishes the submission in an instruction submitting stage. According to the method, the returned token information can be generated in advance, secondary calculation redundancy is eliminated, the physical register is quickly recovered, and the instruction throughput of the processor is improved.

Inventors

  • YU YAXUAN

Assignees

  • 海光信息技术股份有限公司

Dates

Publication Date
20260512
Application Date
20260123

Claims (13)

  1. 1. A method for recovering physical register resources, comprising: in a renaming stage, receiving an instruction and a logic register number of the instruction; Acquiring an original physical register number bound with the logical register number; generating returned physical register token information when the original physical register number reaches a recycling standard; And in the instruction submitting stage, when the instruction finishes submitting, marking the original physical register number as an idle state based on pre-generated returned physical register token information, and updating the original physical register number into an idle physical register pool.
  2. 2. The method of claim 1, wherein generating return physical register token information when the original physical register number meets a reclamation criterion comprises: Detecting a reference state of the original physical register number; And when the original physical register number is not referred to by any uncommitted instruction, judging that the original physical register number reaches a recycling standard, and generating returned physical register token information.
  3. 3. The method of claim 1, wherein the types of instructions include a in-module pipelined execution type and a cross-module non-pipelined execution type; The execution type of the pipeline in the module refers to that the execution task of the instruction is completed in the internal pipeline of the single target functional module; The cross-module non-pipeline execution type refers to splitting an execution task of an instruction to a target functional module to be completed in cooperation with a dedicated execution module, and the target functional module does not bear the complete pipeline flow of the instruction.
  4. 4. The physical register resource reclamation method as recited in claim 3, it is characterized in that the method comprises the steps of, When the type of the instruction is a module pipeline execution type, acquiring the execution state information of the target functional module on the instruction; and when the execution state information of the target functional module to the instruction is completed, determining that the instruction completes submission.
  5. 5. The physical register resource reclamation method as recited in claim 3, it is characterized in that the method comprises the steps of, When the type of the instruction is a cross-module non-pipeline execution type, acquiring the execution state information of the exclusive execution module on the instruction; And when the execution state information of the exclusive execution module to the instruction is completed, determining that the instruction completes submission.
  6. 6. The method of claim 1, further comprising, in a renaming stage: selecting a new physical register number from the free physical register pool; And replacing the original physical register number with the new physical register number, binding the new physical register number with the logical register number, and performing out-of-order execution on the instruction based on the updated mapping relation between the logical register number and the physical register number.
  7. 7. The method of claim 1, further comprising, in a renaming stage: generating instruction commit information based on renaming operations on the instructions and storing the instruction commit information in a storage module, wherein the instruction commit information comprises the original physical register number and the returned physical register token information; during the instruction commit phase, further comprising: Reading the original physical register number and the returned physical register token information from the storage module; generating a release flag based on a status of the instruction completing the commit; and releasing resources of a physical register to which the original physical register number belongs based on the original physical register number, the returned physical register token information and the release mark.
  8. 8. A processor, wherein the processor comprises a renaming module, an instruction submission queue, an instruction submission control module and a physical register token management module; the renaming module is used for receiving the instruction and the logic register number of the instruction; Acquiring an original physical register number bound with the logical register number; When the original physical register number reaches a recycling standard, generating returned physical register token information and storing the returned physical register token information into the instruction submission queue; The instruction submitting control module is used for pre-reading the physical register token information in the instruction submitting queue, and when the instruction is submitted, the pre-read physical register token information is sent to the physical register token management module; The physical register token management module is used for marking the original physical register number as an idle state based on the received returned physical register token information and updating the original physical register number to an idle physical register pool.
  9. 9. The processor of claim 8, wherein the processor further comprises a target function module; when the type of the instruction is a module pipeline execution type: The target function module is used for scheduling and executing the instruction, generating corresponding execution state information and storing the corresponding execution state information into the instruction submitting queue; the instruction submitting control module is further used for pre-reading the execution state information of the target functional module on the instruction from the instruction submitting queue; when the execution state information of the target functional module to the instruction is completed, determining that the instruction completes submission; the execution type of the pipeline in the module refers to that the execution task of the instruction is completed in the internal pipeline of the single target functional module.
  10. 10. The processor of claim 8, further comprising a target function module and a proprietary execution module; When the type of instruction is a cross-module non-pipelined execution type: The target function module is used for executing renaming operation on the instruction through the renaming module; the exclusive execution module is used for executing an exclusive function on the instruction, generating corresponding execution state information and storing the corresponding execution state information into the instruction submission queue; the instruction submitting control module is further used for pre-reading the execution state information of the exclusive execution module on the instruction from the instruction submitting queue; when the execution state information of the exclusive execution module to the instruction is completed, determining that the instruction completes submission; The cross-module non-pipeline execution type refers to splitting an execution task of an instruction to a target functional module to be completed in cooperation with a dedicated execution module, and the target functional module does not bear an instruction complete pipeline flow.
  11. 11. The processor of claim 8, further comprising a memory module and a physical register release module; The renaming module is further used for generating instruction submitting information based on renaming operation on the instruction and storing the instruction submitting information into the storage module, wherein the instruction submitting information comprises the original physical register number and the returned physical register token information; the physical register releasing module is used for reading the original physical register number and the returned physical register token information from the storage module in the instruction submitting stage; generating a release flag based on a status of the instruction completing the commit; and releasing resources of a physical register to which the original physical register number belongs based on the original physical register number, the returned physical register token information and the release mark.
  12. 12. A computer readable storage medium storing computer instructions for causing a computer to perform the physical register resource reclamation method of any of claims 1-7.
  13. 13. A computer program product comprising computer instructions which, when executed by a processor, implement the steps of the physical register resource reclamation method as recited in any of claims 1 to 7.

Description

Physical register resource recycling method, processor, storage medium and program product Technical Field The present disclosure relates to the technical field of processor microarchitecture, and in particular, to a physical register resource recycling method, a processor, a storage medium, and a program product. Background The number of physical registers in the processor is limited, instruction transmission needs to rely on idle physical register resources, and when the resources are exhausted, the transmission can be continued after the old physical register is recycled, namely a token (token) is returned. In the prior art, a return dependent instruction of a physical register token is submitted, after execution of a pipeline instruction (such as a floating point/fixed point operation instruction) is completed, token information can be synchronized through an instruction state, recovery is completed when a commit signal is valid, but for a non-pipeline instruction such as a Load instruction, the execution of the Load instruction is required to be performed by a cross-access unit and an operation unit, the operation unit does not have a completion state, and commit queue information and calculation token information are required to be read after the instruction is submitted and returned. The token information of the non-pipelined instruction needs to be calculated twice after being submitted, so that the recovery speed of a physical register is low, the idle resource is supplemented with delay, the instruction emission is easy to block, and the instruction throughput of a processor is reduced. Disclosure of Invention In view of this, the embodiments of the present disclosure provide a physical register resource recycling method, a processor, a storage medium, and a program product, which can avoid the redundant step of secondary token calculation in the prior art by locking the original physical register number to be recycled in advance and generating the returned token information in advance, realize the rapid recycling of the physical register and the replenishment of the idle resources, effectively reduce the instruction emission blocking, and improve the instruction throughput and the overall operation performance of the processor. In a first aspect, an embodiment of the present disclosure provides a physical register resource recycling method, which adopts the following technical scheme: in a renaming stage, receiving an instruction and a logic register number of the instruction; Acquiring an original physical register number bound with the logical register number; generating returned physical register token information when the original physical register number reaches a recycling standard; And in the instruction submitting stage, when the instruction finishes submitting, marking the original physical register number as an idle state based on pre-generated returned physical register token information, and updating the original physical register number into an idle physical register pool. Optionally, the generating the returned physical register token information when the original physical register number reaches the reclamation standard includes: Detecting a reference state of the original physical register number; And when the original physical register number is not referred to by any uncommitted instruction, judging that the original physical register number reaches a recycling standard, and generating returned physical register token information. Optionally, the types of instructions include a module pipelined execution type and a cross-module non-pipelined execution type; The execution type of the pipeline in the module refers to that the execution task of the instruction is completed in the internal pipeline of the single target functional module; The cross-module non-pipeline execution type refers to splitting an execution task of an instruction to a target functional module to be completed in cooperation with a dedicated execution module, and the target functional module does not bear the complete pipeline flow of the instruction. Optionally, when the type of the instruction is a module pipeline execution type, acquiring execution state information of the target functional module on the instruction; and when the execution state information of the target functional module to the instruction is completed, determining that the instruction completes submission. Optionally, when the type of the instruction is a cross-module non-pipeline execution type, acquiring execution state information of the dedicated execution module on the instruction; And when the execution state information of the exclusive execution module to the instruction is completed, determining that the instruction completes submission. Optionally, in the renaming stage, the method further comprises: selecting a new physical register number from the free physical register pool; And replacing the original physical register number