CN-122019245-A - Setting method and chip of optimal error correction code set for data verification

CN122019245ACN 122019245 ACN122019245 ACN 122019245ACN-122019245-A

Abstract

The application discloses a setting method and a chip of an optimal error correction code set for data verification, wherein the setting method comprises the steps of calculating the bit width required by error correction codes according to the bit width of data to be verified; and selecting an optimal error correction code set from the error correction code library, so that each bit of the data to be checked corresponds to a corresponding error correction code in the optimal error correction code set. The chip is used for executing the setting method of the optimal error correction code set for data verification so as to store the selected optimal error correction code set into a memory inside or outside the chip.

Inventors

WANG CHAO
LI ZHANGHUI

Assignees

珠海一微科技股份有限公司

Dates

Publication Date: 20260512
Application Date: 20241031

Claims (10)

1. A setting method of an optimal error correction code set for data verification, characterized in that the setting method comprises: calculating the bit width required by the error correction code according to the bit width of the data to be checked; Combining an error correction code library according to the bit width required by the error correction code, wherein the error correction code library comprises error correction codes; And selecting an optimal error correction code set from an error correction code library, so that each bit of the data to be checked corresponds to a corresponding error correction code in the optimal error correction code set.
2. The setting method according to claim 1, wherein the method of combining the error correction code library according to the bit width required for the error correction code comprises: Step A1, setting the number of binary 1 in the error correction code to be j under the condition of ensuring that the number of binary 1 in the error correction code is odd, and then executing step A2; step A2, judging whether j is smaller than or equal to the bit width required by the error correction code, if yes, executing step A3, otherwise, determining that the error correction code library is combined and obtaining all error correction codes in the error correction code library; Step A3, controlling j binary 1 to be respectively configured at different bit positions of an error correction code to form an error correction code, and adding the current formed error correction code into an error correction library until all bit positions of the error correction code are configured by the j binary 1 in different bit sequences, so as to obtain each error correction code configured by the j binary 1 in different bit sequences; and A4, controlling j to increment once, wherein j is self-decimal 2 after each increment, and then executing the step A2.
3. The setting method according to claim 2, wherein the method of selecting an optimal error correction code set from an error correction code library comprises: Counting the number of error correcting codes obtained in the step A3 every time the j binary 1s are obtained by executing the step A3 and are configured according to different bit sequences by executing the steps A2 to A4 to drive j to increment for a plurality of times until the number of the error correcting codes obtained in the accumulated way is larger than the sum of the bit width of the data to be checked and the bit width required by the error correcting codes, selecting the number of the error correcting codes counted when all bits of the error correcting codes are configured according to the j-2 binary 1s and are in different bit sequences as the selected number, and adding the selected number of the error correcting codes into an optimal error correcting code set; calculating the difference between the bit width of the data to be checked and the selected quantity to obtain candidate quantity; Then selecting the candidate number of error correction codes from all error correction codes configured by the j binary 1 in different bit sequences, and adding the candidate number of error correction codes into an optimal error correction code set to form all error correction codes in the optimal error correction code set; The number of the error correction codes required in the optimal error correction code set is equal to the sum of the bit width of the data to be checked and the bit width required by the error correction codes, and the bit width required by the error correction codes is smaller than the bit width of the data to be checked.
4. The setting method according to claim 3, wherein after 1 binary system 1 is sequentially configured to each bit of the error correction code in different bit sequences by executing step A3, the number of different error correction codes obtained by configuration is equal to the bit width required by the error correction code, the different error correction codes obtained by configuration are error correction codes corresponding to each bit of the reference check data, then the error correction codes corresponding to each bit of the reference check data are selected to be added into the optimal error correction code set, wherein the reference check data are used for assisting the corresponding error correction code to position errors of the error correction code, and the bit width of the reference check data is equal to the bit width required by the corresponding error correction code.
5. The setting method according to claim 3, wherein the method of selecting the candidate number of error correction codes from among the j binary 1's each error correction codes configured in different bit sequences includes: Step B1, traversing each bit of each error correction code in sequence in a residual error correction code set, and executing step B2 when traversing the current error correction code, wherein the current error correction code is one error correction code traversed in the residual error correction code set in the current round, and the residual error correction code set is formed by each error correction code configured by j binary 1 according to different bit sequences when the number of the accumulated error correction codes is larger than the sum of the bit width of the data to be checked and the bit width required by the error correction code for the first time in the process of executing steps A2 to A4; Step B2, if one bit of the current error correction code is traversed to generate binary 1, counting the currently traversed bit once and marking the currently traversed bit as the count value of the currently traversed bit, and then controlling the currently traversed bit to be updated among all bits of the current error correction code so as to count the count value of all traversed bits in the current error correction code in sequence; Step B3, in the process of traversing each bit of the current error correction code, obtaining a fraction value corresponding to the current error correction code by calculating the sum of absolute values of differences between the count value of the currently traversed bit and the count value of each bit of the next traversal, and determining to complete one round of traversal on the error correction code; Step B4, judging whether all the error correction codes in the residual error correction code set are traversed, if yes, executing step B5, otherwise, updating one error correction code traversed next time into the current error correction code in the residual error correction code set, and then executing step B2; And B5, sorting the score values corresponding to all the traversed error correction codes in the residual error correction code set according to the size relation of the score values, and then selecting the error correction code corresponding to the candidate number of score values with the highest sorting or the lowest sorting to add into the optimal error correction code set.
6. The setting method according to claim 5, wherein in the step B5, the score values corresponding to all the traversed error correction codes in the remaining error correction code set are sorted in order of the score values from small to large, then the error correction codes corresponding to the lowest candidate number of the score values are sequentially screened out from the remaining error correction code set, the candidate number of the error correction codes with the lowest score values are sequentially marked, and then the candidate number of the error correction codes with the lowest score values are added to the optimal error correction code set.
7. The setting method according to claim 5, wherein in the step B3, the method for obtaining the score value corresponding to the current error correction code by calculating the sum of absolute values of differences between the count value of the currently traversed bit and the count value of each bit of the subsequent traversal includes: After each bit of the current traversal is updated from one bit of the current error correction code to one bit higher or lower in the current error correction code, calculating the absolute value of the difference value between the count value of the bit of the current traversal and the count value of each bit of the subsequent traversal, and summing the absolute value of the difference value between the count value of the bit of the current traversal and the count value of each bit of the subsequent traversal to obtain a cyclic fraction value; And if the bits of the current traversal are updated with all bits of the current error correction code successively, adding all the cyclic fractional values obtained by calculation successively for the same current error correction code to obtain the fractional value corresponding to the current error correction code, or if the bits of the current traversal are updated with all the bits of the current error correction code successively, selecting the cyclic fractional value with the smallest value from the cyclic fractional values obtained by calculation successively as the fractional value corresponding to the current error correction code.
8. The setting method according to claim 5, wherein each time a score value corresponding to the current error correction code is calculated, a difference between a maximum count value and a minimum count value is calculated for count values of respective bits of the current error correction code, and the difference is set as a current bit count span; When the score value corresponding to the current error correction code is smaller than a preset minimum score value, updating the score value corresponding to the current error correction code to the preset minimum score value, updating the current bit counting span to a preset bit counting span, and adding the current error correction code into the optimal error correction code set; When the fraction value corresponding to the current error correction code is equal to a preset minimum fraction value and the current bit count span is smaller than the preset bit count span, updating the fraction value corresponding to the current error correction code to the preset minimum fraction value, updating the current bit count span to the preset bit count span, and adding the current error correction code into the optimal error correction code set.
9. The setting method according to claim 1, wherein the method for calculating the bit width required for the error correction code based on the bit width of the data to be checked comprises: Firstly, determining that a relation between a bit width required by an error correction code and a bit width of data to be checked is 2 (ecc_width-1) -ecc_width > data_width, wherein the data_width is the bit width of the data to be checked, and the ecc_width is the bit width required by the error correction code; Then, the data_width of the predetermined value is substituted into the relational expression, the obtained eccjwidth is greater than or equal to the reference bit width, and the reference bit width is set as the bit width required by the error correction code.
10. A chip for performing the method for setting the optimal error correction code set for data verification according to any one of claims 1 to 9, to store the selected optimal error correction code set in a memory inside or outside the chip.

Description

Setting method and chip of optimal error correction code set for data verification Technical Field The present application relates to the field of error correction code technologies, and in particular, to a method and a chip for setting an optimal error correction code set for data verification. Background During operation, a typical memory chip may cause one or several bits to be in error in transmission due to interference, which may further cause program breakdown, so that in some important transmission scenarios, ECC (Error Correction Code ) needs to be added to ensure data transmission stability. The ECC is an error detection and correction algorithm for a memory, which can correct single-bit errors but cannot correctly detect double-bit errors, and the corresponding coding algorithm generally adds even check bits and multi-bit supervisory bits for the ECC to detect double-bit errors at present, but generates corresponding redundant bits in the coding process, and adds extra storage area to store the corresponding redundant bits, supervisory bits and the like. The Chinese patent application number 202410607056.7 discloses a dynamic adjustment method based on error correction codes, which adjusts the current error correction strategy level according to the data importance level, the operation load and/or the data error mark information, and the error correction codes and the corresponding mark bits are required to be combined into an error correction code library and stored in a memory although the error correction codes corresponding to the adjusted current error correction strategy level are called for detection and correction, so that the size of the error correction code library is increased, the cost of the memory is increased, and the flexibility of ECC algorithm selection is reduced. Disclosure of Invention The application provides a setting method and a chip of an optimal error correction code set for data verification, and the specific technical scheme is as follows: The setting method of the optimal error correcting code set for data verification comprises the steps of calculating bit width required by an error correcting code according to bit width of data to be verified, combining an error correcting code library according to the bit width required by the error correcting code, wherein the error correcting code library comprises the error correcting code, and selecting the optimal error correcting code set from the error correcting code library so that each bit of the data to be verified corresponds to a corresponding error correcting code in the optimal error correcting code set. Compared with the prior art, the error correction code library is directly stored for indexing error correction codes and error data bits, the optimal error correction code library selected by the application ensures that the time sequence and the area of the memory are better, and check bits (or redundant bits, supervision bits and the like) of the error correction code are not required to be expanded when the error correction code is encoded by executing an ECC algorithm, and the data bits required to be checked in the data to be checked can be also searched from the optimized error correction code library, so that the error data in the data to be checked can be quickly positioned. Further, the method for combining the error correction code library according to the bit width required by the error correction code comprises the steps of A1, setting the number of binary 1 in the error correction code to be j under the condition that the number of binary 1 in the error correction code is ensured to be odd, then executing step A2, judging whether j is smaller than or equal to the bit width required by the error correction code, executing step A3 if yes, otherwise, determining that the error correction code library is combined and obtaining all error correction codes in the error correction code library, controlling j binary 1 to be respectively configured at different bits of the error correction code and form an error correction code, adding the currently formed error correction code into the error correction library, until all bits of the error correction code are configured by the j binary 1 in the order of different bits, obtaining each error correction code configured by the j binary 1 in the order of different bits, then executing step A4, controlling j to be increased, wherein j is increased once, and then executing step A2 to drive j+2 to be respectively configured at different bits of the error correction code. The method for selecting the optimal error correction code set in the error correction code library comprises the steps of executing steps A2 to A4 to drive j to increment for a plurality of times, calculating the difference between the bit widths of the data to be checked and the selected number to obtain candidate number, counting the number of error correction codes obtained in step A3 until the num