CN-122019255-A - Method for power-on synchronization of two models based on computer security platform

CN122019255ACN 122019255 ACN122019255 ACN 122019255ACN-122019255-A

Abstract

The invention discloses a method for power-on synchronization of two modules based on a computer security platform, which comprises the steps of judging the system module which runs first in the two system modules, taking the system module which runs first as the system module and taking the system module which runs later as the opposite system module, judging whether the opposite system module reaches a preset synchronous input trigger count through an opposite system module counting pulse monitoring program, if not, continuing to monitor the opposite system module counting pulse, if not, judging whether the system module reaches the preset synchronous input trigger count through the system module counting pulse monitoring program, if not, continuing to monitor the system module counting pulse, if so, realizing power-on synchronization after time delay according to a preset power-on synchronization interval, ensuring that all redundant calculation units can be transited to a stable synchronous initial state from a chaotic initial state, and starting to execute the same application program.

Inventors

LIU JIE
HAN WEIKUN
DU HAO
LI HAITAO
WANG KANGCHENG
LV HAN
WEI BAOSHENG
YANG LIJUN
ZHAO XIAO
LI XIA
WANG TIANLIANG
LI HAO
FU ZHIYUAN

Assignees

河南思维轨道交通技术研究院有限公司
济南思维鑫科信息技术有限公司

Dates

Publication Date: 20260512
Application Date: 20260116

Claims (6)

1. A method for power-on synchronization of two modes based on a computer security platform is characterized by comprising the following steps: s1, writing a relative system module counting pulse monitoring program (1) and a system module counting pulse monitoring program (2) in two system modules; s2) judging the first system module in the two system modules, taking the first system module as the system module, and taking the later system module as the opposite system module; S3), judging whether the relative system module reaches a preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME) or not by the relative system module count pulse monitoring program (1), if not, continuing to monitor the relative system module count pulse, and if so, switching to S4); And S4) judging whether the system module reaches a preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME) or not by the system module counting pulse monitoring program (2), if not, continuing to monitor the counting pulse of the system module, and if so, realizing POWER-ON synchronization according to the delay of a preset POWER-ON synchronization INTERVAL TIME (POWER_ON_ST_SYNC_INTERVAL).
2. The method for two-mode power-on synchronization based on a computer security platform of claim 1, wherein the synchronization output pin of one system module is electrically connected with the synchronization input pin of the other system module.
3. The method for two-mode power-on synchronization based on the computer security platform of claim 1, wherein the system module obtains the relative system module count pulse or the system module count pulse by reading the state of the self-synchronization input pin.
4. The method for two-mode power-on synchronization based on the computer security platform according to claim 1, wherein the relative system module count pulse monitoring program (1) comprises the following steps: P1) judging whether the dynamic counting pulse value (rcv_ pule) of the opposite system module is smaller than the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME); if not, transferring to the system module counting pulse monitoring program (2); If the number of the groups is smaller than the number of the groups, turning to P2), P2), synchronously outputting pin state overturn relative to the system module; p3), the system module reads the state of the synchronous output pin of the relative system module through the synchronous input pin of the system module; P4) judging whether the read pin state is consistent with the pin state read last time, If so, P7) is entered; If not, performing P5) to P7); P5), the system module increases the dynamic counting pulse value (rcv_pulse) of the relative system module by one; p6), updating the pin state read at this time into the pin state of the last time; p7) delaying according to a preset DELAY time (SYNC_OUT_TOGGLE_DELAY_TICK); p8), the system module judges whether the read pin state is consistent with the pin state read last time, If the pin states are consistent, the pin states are indicated to be updated successfully, or the pin states are not changed after the preset delay time, and then P11) is executed; If the pin states are inconsistent, indicating that the pin states are not updated successfully, or the pin states are changed after a preset delay time, executing P9) to P11); P9), the system module increases the dynamic counting pulse value (rcv_pulse) of the relative system module by one; p10), updating the pin state read at this time into the pin state of the last time; And P11) carrying OUT DELAY according to a preset DELAY time (SYNC_OUT_TOGGLE_DELAY_TICK) and then entering the step P1.
5. The method for two-mode power-on synchronization based on the computer security platform according to claim 1, wherein the system module counting pulse monitoring program (2) comprises the following steps: t1), initializing a counting pulse value cnt of the system module to be zero; T2) determining whether the count pulse value cnt of the system module is smaller than a preset synchronous input trigger count (SYNC_OUT/u) TOGGLE_TIME); If not, turning to T6); If less, then executing T3) to T5); T3) overturning the synchronous output pin state of the system module; T4), the counting pulse value cnt of the system module is increased by one; T5) carrying OUT DELAY and then turning to T2), wherein the DELAY time is twice as long as the preset DELAY time (SYNC_OUT_TOGGLE_DELAY_TICK); T6) setting the synchronous output pin state of the system module to high level.
6. The method for two-mode power-on synchronization based on a computer security platform of claim 1, further comprising initializing variables, wherein the initializing variables comprise CPU clock configuration and GPIO configuration by two system modules.

Description

Method for power-on synchronization of two models based on computer security platform Technical Field The invention belongs to the technical field of computer security platforms, and particularly relates to a method for power-on synchronization of two models based on a computer security platform. Background The two-mode power-on of the computer security platform refers to the process that when the computer security platform system is started, two system modules, generally called a mode and B mode, are powered on and enter into a working state at the same time. The double-system redundancy design is a core technology of a safe computer platform, is used for realizing high reliability and fault safety protection, is widely applied to the fields with extremely high safety requirements such as rail transit, industrial control, electric power systems and the like, and effectively prevents system failure caused by single-point faults. In the prior art, the power-on synchronization is realized, the consistency of the power-on of the two modes is completely ensured by the power supply of the two modes, and due to the hardware difference, even for chips in the same batch, the power-on reset time sequence and the starting time of the crystal oscillator have small differences, and in addition, the frequency deviation exists in the independent clock sources of all channels, so that the synchronization can be caused. When the two modes are powered on and started out of synchronization, the initial states of the two modes are completely different, the execution result of the first instruction is different, the comparator can immediately detect the difference, so that the system fault is triggered, the system is possibly forced to be down or locked in a safe state and cannot be started normally, the starting point of the out-of-synchronization means that the so-called redundant comparison is invalid from the beginning, the safety mechanism is invalid, and the system cannot achieve the designed safety target. Disclosure of Invention In order to solve the technical problems, the invention provides a method for power-on synchronization of two models based on a computer security platform. The specific scheme is as follows: A method for power-on synchronization of two modes based on a computer security platform comprises the following steps: S1, writing a relative system module counting pulse monitoring program and a system module counting pulse monitoring program in two system modules; s2) judging the first system module in the two system modules, taking the first system module as the system module, and taking the later system module as the opposite system module; s3), judging whether the relative system module reaches a preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME) or not by the relative system module counting pulse monitoring program, if not, continuing to monitor the relative system module counting pulse, and if so, turning to S4); And S4) judging whether the system module reaches a preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME) or not by the system module counting pulse monitoring program, if not, continuing to monitor the system module counting pulse, and if so, realizing POWER-ON synchronization according to a preset POWER-ON synchronization INTERVAL TIME (POWER_ON_ST_SYNC_INTERVAL) after delay. In the two system modules, the synchronous output pin of one system module is electrically connected with the synchronous input pin of the other system module. The system module acquires relative system module counting pulse or the system module counting pulse by reading the state of the self synchronous input pin. The relative system module count pulse monitoring program comprises the following steps: P1) judging whether the dynamic counting pulse value (rcv_ pule) of the opposite system module is smaller than the preset synchronous input trigger count (SYNC_OUT_TOGGLE_TIME); if not, transferring to the system module counting pulse monitoring program; If the number of the groups is smaller than the number of the groups, turning to P2), P2), synchronously outputting pin state overturn relative to the system module; p3), the system module reads the state of the synchronous output pin of the relative system module through the synchronous input pin of the system module; P4) judging whether the read pin state is consistent with the pin state read last time, If so, P7) is entered; If not, performing P5) to P7); P5), the system module increases the dynamic counting pulse value (rcv_pulse) of the relative system module by one; p6), updating the pin state read at this time into the pin state of the last time; p7) delaying according to a preset DELAY time (SYNC_OUT_TOGGLE_DELAY_TICK); p8), the system module judges whether the read pin state is consistent with the pin state read last time, If the pin states are consistent, the pin states are indicated to be updated successfully, or the pin states are not cha