CN-122019303-A - FPGA software intermediate data recording method based on embedded selection word

CN122019303ACN 122019303 ACN122019303 ACN 122019303ACN-122019303-A

Abstract

The invention belongs to the technical field of signal processing, and discloses an FPGA software intermediate data recording method based on embedded selection words. The method for recording the intermediate data is suitable for the design of signal processing FPGA software with high-speed serial input and output and DDR storage, and can realize the recording of the intermediate data in the FPGA software by embedding the selection word into the input data without adding an additional input interface. In the running process of the FPGA, a user can select output data of one module in the FPGA software as record data each time, the record data is stored in the DDR or output from the high-speed serial interface, and then the record data in the DDR can be read by a CPU for analysis, or the record data is stored by connecting the recorder with the high-speed serial interface for analysis.

Inventors

WU QINWEN
SUN JIAN
WEN ZHITAO
HAO MING
HAN WENJUN
LING YUAN
WU QINGNAN
WANG SHANSHAN

Assignees

中国电子科技集团公司第十四研究所

Dates

Publication Date: 20260512
Application Date: 20260127

Claims (8)

1. The FPGA software intermediate data recording method based on the embedded selection word is characterized by comprising the following steps of: step T1, if the FPGA is provided with more than or equal to two paths of high-speed serial output interfaces, embedding record selection words into high-speed serial input data; step T2, after the high-speed serial input interface module receives the high-speed serial input data, analyzing the high-speed serial input data to obtain a record selection word, wherein the record selection word comprises a function processing chain selection word, a module selection word and a record mode selection word; Step T3, the FPGA comprises a plurality of functional processing chains, each functional processing chain comprises a plurality of modules, each functional processing chain is provided with a record selection module, and the record selection module selects intermediate data generated by the plurality of modules in the functional processing chain as record data; setting a record selection module, wherein the record selection module selects record data output of all the functional processing chains; And step T4, setting a record output module behind the record selection module capable of outputting the record data of the function processing chain, wherein the record output module is used for receiving the record data output of the function processing chain and finishing the record data writing DDR or serial output function.
2. The method for recording intermediate data of FPGA software based on embedded selection words according to claim 1, wherein in step T3, the FPGA comprises 2 functional processing chains and 3 recording selection modules, and each functional processing chain comprises 3 modules.
3. The method for recording intermediate data in FPGA software based on embedded select words according to claim 2, wherein the first record selection module is used for selecting output data of a first data processing module in the first functional processing chain and output data of a second data processing module in the first functional processing chain, the second record selection module is used for selecting output data of the first data processing module in the second functional processing chain and output data of the second data processing module in the second functional processing chain, and the third record selection module is used for selecting record output data of the first functional processing chain and record output data of the second functional processing chain.
4. The method for recording intermediate data of FPGA software based on embedded select words according to claim 3, wherein the intermediate data recording comprises the steps of: Step S1, if the FPGA is provided with more than or equal to two paths of high-speed serial output interfaces, embedding record selection words into high-speed serial input data; s2, after the high-speed serial input interface module receives the high-speed serial input data, analyzing the high-speed serial input data to obtain a record selection word, wherein the record selection word comprises a function processing chain selection word, a module selection word and a record mode selection word; The function processing chain selection word is used for a function processing chain level record selection module, the module selection word is used for a record selection module in the function processing chain, and the record mode selection word is used for a record output module; transmitting the function processing chain selection word to a third record selection module, transmitting the module selection word to a first record selection module and a second record selection module, transmitting the record mode selection word to a record output module, and transmitting the output selection word to an output selection module; Step S3, when the FPGA executes the processing function, the first record selection module selects to transmit the output data of the first data processing module on the first function processing chain or the output data of the second data processing module on the first function processing chain to the third record selection module according to the module selection word; The second record selection module selects output data of the first data processing module on the second functional chain or output data of the second data processing module on the second functional chain to be transmitted to the third record selection module according to the module selection word; if the number of the module selection word is larger than the number of the data processing modules in the function processing chain, the record selection module does not output data; Step S4, after the third record selection module receives the output data of the first record selection module and the output data of the second record selection module, selecting one of the record selection module and the second record selection module according to the function processing chain selection word and transmitting the selected record output word to the record output module; And S5, after receiving the output data of the third record selection module, the record output module selects to convert the output data into record data write DDR output or record data serial output or two paths of record data simultaneous output according to the record mode selection word.
5. The FPGA software intermediate data recording method based on the embedded selection word is characterized by comprising the following steps of: step Q1, the FPGA has only one path of high-speed serial output interface, and then record selection words and output selection words are embedded in high-speed serial input data; Q2, after the high-speed serial input interface module receives the high-speed serial input data, analyzing the high-speed serial input data to obtain an output selection word and a record selection word, wherein the record selection word comprises a function processing chain selection word, a module selection word and a record mode selection word; the FPGA comprises a plurality of functional processing chains, each functional processing chain comprises a plurality of modules, each functional processing chain is provided with a record selection module, and the record selection module selects intermediate data generated by the plurality of modules in the functional processing chains as record data; setting a record selection module, wherein the record selection module selects record data output of all the functional processing chains; Q4, setting a record output module behind a record selection module capable of outputting record data of the function processing chain, wherein the record output module is used for receiving record data output of the function processing chain and finishing a record data writing DDR or serial output function; And Q5, setting an output selection module, receiving the FPGA processing result and the recorded data, and finishing the output of the data.
6. The method for recording intermediate data of FPGA software based on embedded select words according to claim 5, wherein in step Q3, the FPGA comprises 2 functional processing chains and 3 record selection modules, and each functional processing chain comprises 3 modules.
7. The method according to claim 6, wherein the first record selection module is used for selecting output data of a first data processing module in the first functional processing chain and output data of a second data processing module in the first functional processing chain, the second record selection module is used for selecting output data of the first data processing module in the second functional processing chain and output data of the second data processing module in the second functional processing chain, and the third record selection module is used for selecting record output data of the first functional processing chain and record output data of the second functional processing chain.
8. The embedded selection word-based FPGA software intermediate data recording method of claim 7, wherein the intermediate data recording comprises the steps of: Step K1, the FPGA has only one path of high-speed serial output interface, and then record selection words and output selection words are embedded in high-speed serial input data; step K2, after the high-speed serial input interface module receives the high-speed serial input data, analyzing the high-speed serial input data to obtain an output selection word and a record selection word, wherein the record selection word comprises a function processing chain selection word, a module selection word and a record mode selection word; The function processing chain selection word is used for a function processing chain level record selection module, the module selection word is used for a record selection module in the function processing chain, and the record mode selection word is used for a record output module; transmitting the function processing chain selection word to a third record selection module, transmitting the module selection word to a first record selection module and a second record selection module, transmitting the record mode selection word to a record output module, and transmitting the output selection word to an output selection module; step K3, when the FPGA executes the processing function, the first record selection module selects to transmit the output data of the first data processing module on the first function processing chain or the output data of the second data processing module on the first function processing chain to the third record selection module according to the module selection word; The second record selection module selects output data of the first data processing module on the second functional chain or output data of the second data processing module on the second functional chain to be transmitted to the third record selection module according to the module selection word; if the number of the module selection word is larger than the number of the data processing modules in the function processing chain, the record selection module does not output data; Step K4, after the third record selection module receives the output data of the first record selection module and the output data of the second record selection module, selecting one of the record selection module and the second record selection module according to the function processing chain selection word and transmitting the selected record output word to the record output module; step K5, after receiving the output data of the third record selection module, the record output module selects to convert the output data into record data write DDR output or record data serial output or two paths of output at the same time according to the record mode selection word; And step K6, the output selection module selects and transmits the FPGA processing result or the recorded serial data output to the high-speed serial output interface module according to the output selection word.

Description

FPGA software intermediate data recording method based on embedded selection word Technical Field The invention mainly relates to the technical field of signal processing, in particular to an FPGA software intermediate data recording method based on embedded selection words. Background In the development of signal processing FPGA software, the troubleshooting is always a difficult point, if the fault is that the FPGA software stops running, the fault can be positioned to a module level by only searching which module has no output, and the situation can be generally solved by adding ila acquisition cores or reserving state monitoring information of each module in the design and reporting. However, if the signal processing FPGA software does not stop running, but the output of the processed result data is incorrect, the situation is complex, and it is necessary to track down which module of the output data has deviation step by step. However, the data size of signal processing is very large, ila acquisition cores can only grasp a small section of data due to depth relation, so that the acquisition cores are insufficient for positioning whether the module output fails or not and what kind of failure occurs, the monitoring information is very little helpful to analysis of large data size, especially, the signal processing FPGA software of floating point calculation is used, even if a correct calculation result is also in error with a reference result, whether the calculation result is correct or not is difficult to directly judge from the numerical values of a plurality of data, and whether the failure occurs or not can be judged by analyzing the complete calculation result data. Therefore, in the signal processing FPGA software, the intermediate data, namely the output data of each module in the FPGA software, is recorded, so that the fault detection capability can be greatly improved. However, the intermediate data in the FPGA software is not saved to the DDR generally, but is not output outside the FPGA, the number of modules is large, and the output data of each module is large, which is difficult to record by conventional means. The method for recording the intermediate data of the FPGA software based on the embedded selection word is needed to be provided, and output data of one module inside the signal processing FPGA software can be recorded each time, so that the method can be widely applied to the design of the signal processing FPGA software, and an effective means is provided for storing the intermediate data for fault analysis so as to accurately position faults of the FPGA software. Disclosure of Invention The invention aims to provide an embedded selection word-based FPGA software intermediate data recording method, which can select output data of one module in signal processing FPGA software to record each time, can be widely applied to signal processing FPGA software design, and provides an effective means for storing intermediate data for fault analysis so as to accurately position FPGA software faults. In order to achieve the above purpose, the invention provides an FPGA software intermediate data recording method based on embedded selection words, which comprises the following steps: step T1, if the FPGA is provided with more than or equal to two paths of high-speed serial output interfaces, embedding record selection words into high-speed serial input data; step T2, after the high-speed serial input interface module receives the high-speed serial input data, analyzing the high-speed serial input data to obtain a record selection word, wherein the record selection word comprises a function processing chain selection word, a module selection word and a record mode selection word; Step T3, the FPGA comprises a plurality of functional processing chains, each functional processing chain comprises a plurality of modules, each functional processing chain is provided with a record selection module, and the record selection module selects intermediate data generated by the plurality of modules in the functional processing chain as record data; setting a record selection module, wherein the record selection module selects record data output of all the functional processing chains; And step T4, setting a record output module behind the record selection module capable of outputting the record data of the function processing chain, wherein the record output module is used for receiving the record data output of the function processing chain and finishing the record data writing DDR or serial output function. Further, in step T3, the FPGA includes 2 functional processing chains, and 3 record selecting modules, and each functional processing chain includes 3 modules. Further, the first record selection module is used for selecting output data of the first data processing module in the first functional processing chain and output data of the second data processing module in the first functional processing