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CN-122019407-A - Data access method, device, equipment, storage medium and chip

CN122019407ACN 122019407 ACN122019407 ACN 122019407ACN-122019407-A

Abstract

The invention provides a data access method, a device, equipment, a storage medium and a chip, which relate to the technical field of computers, and the method comprises the steps of receiving a data storage request of a thread; the method comprises the steps of carrying data to be stored and target storage addresses by a data storage request, determining a first address transformation rule corresponding to the target storage addresses based on first data access granularity of the target storage addresses, performing address transformation operation on the target storage addresses based on the first address transformation rule to generate first target physical addresses, wherein the first target physical addresses are used for designating physical positions of first target storage bodies in a shared memory, and storing the data to be stored into the first target storage bodies based on the first target physical addresses. By the mode, the problem of memory bank conflict can be avoided, the efficiency of multithreading parallel access is improved, and further the efficiency of chip data access is improved.

Inventors

  • Request for anonymity
  • Request for anonymity
  • Request for anonymity

Assignees

  • 上海壁仞科技股份有限公司

Dates

Publication Date
20260512
Application Date
20260202

Claims (10)

  1. 1. A method of data access, comprising: Receiving a data storage request of a thread, wherein the data storage request carries data to be stored and a target storage address; Determining a first address transformation rule corresponding to the target storage address based on a first data access granularity of the target storage address; Performing address transformation operation on the target storage address based on the first address transformation rule to generate a first target physical address, wherein the first target physical address is used for designating the physical position of a first target storage body in the shared memory; And storing the data to be stored to the first target storage body based on the first target physical address.
  2. 2. The data access method of claim 1, wherein the first address transformation rule comprises a first sequence of bits to be operated on, the first sequence of bits to be operated on being determined based on a plurality of first target bits in the target memory address, the address transformation operation being an exclusive-or operation; The performing address transformation operation on the target storage address based on the first address transformation rule to generate a first target physical address includes: determining a first bit sequence to be transformed of the target memory address, the first bit sequence to be transformed comprising a plurality of consecutive bits in the target memory address; And performing exclusive OR operation on the first bit sequence to be transformed and the first bit sequence to be operated to generate the first target physical address.
  3. 3. The method according to claim 2, wherein determining the first address translation rule corresponding to the target storage address based on the first data access granularity of the target storage address includes: If the first data access granularity of the target storage address is smaller than or equal to a preset threshold value, selecting a plurality of first target bits from the target storage address as the first bit sequence to be operated in the first address transformation rule; If the first data access granularity of the target storage address is greater than the preset threshold, selecting a plurality of first target bits and at least one first sub-bit sequence from the target storage address as the first bit sequence to be operated in the first address transformation rule; Wherein the first sequence of sub-bits includes a plurality of consecutive bits in the target memory address.
  4. 4. The data access method according to claim 1, wherein after storing the data to be stored in the target memory bank based on the target physical address, further comprising: Receiving a data reading request of the thread, wherein the data reading request carries a target reading address; Determining a second address transformation rule corresponding to the target read address based on a second data access granularity of the target read address; Performing address transformation operation on the target read address based on the second address transformation rule to generate a second target physical address, wherein the second target physical address is used for designating the physical position of a second target storage body in the shared memory; And reading target data from the second target storage body based on the second target physical address.
  5. 5. The data access method of claim 4, wherein the second address transformation rule comprises a second sequence of bits to be operated on, the second sequence of bits to be operated on being determined based on a plurality of second target bits in the target read address, the address transformation operation being an exclusive-or operation; the performing address transformation operation on the target read address based on the second address transformation rule to generate a second target physical address includes: Determining a second bit sequence to be converted of the target read address, wherein the second bit sequence to be converted comprises a plurality of continuous bits in the target read address; and performing exclusive OR operation on the second bit sequence to be converted and the second bit sequence to be operated to generate the second target physical address.
  6. 6. The method according to claim 5, wherein determining a second address translation rule corresponding to the target read address based on a second data access granularity of the target read address comprises: If the second data access granularity of the target read address is smaller than or equal to a preset threshold value, selecting a plurality of second target bits from the target read address as the second bit sequence to be operated in the second address transformation rule; If the second data access granularity of the target read address is greater than the preset threshold, selecting a plurality of second target bits and at least one second sub-bit sequence from the target read address as the second bit sequence to be operated in the second address transformation rule; wherein the second sequence of sub-bits comprises a plurality of consecutive bits in the target read address.
  7. 7. A data access device, comprising: the receiving module is used for receiving a data storage request of a thread, wherein the data storage request carries data to be stored and a target storage address; The rule determining module is used for determining a first address transformation rule corresponding to the target storage address based on the first data access granularity of the target storage address; The address conversion module is used for carrying out address conversion operation on the target storage address based on the first address conversion rule to generate a first target physical address, wherein the first target physical address is used for designating the physical position of a first target storage body in the shared memory; and the access module is used for storing the data to be stored into the first target storage body based on the first target physical address.
  8. 8. An electronic device comprising a memory, a processor and a computer program stored on the memory and running on the processor, characterized in that the processor implements the data access method according to any of claims 1 to 6 when executing the computer program.
  9. 9. A non-transitory computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when executed by a processor, implements the data access method according to any one of claims 1 to 6.
  10. 10. A chip comprising a shared memory controller and a shared memory, the shared memory controller comprising a shared memory access means for performing the data access method of any of claims 1 to 6.

Description

Data access method, device, equipment, storage medium and chip Technical Field The present invention relates to the field of computer technologies, and in particular, to a data access method, apparatus, device, storage medium, and chip. Background In a chip, shared memory is a critical high-speed on-chip memory whose memory space can be shared by all threads within the same thread bundle (Warp). To increase the bandwidth of the chip, the shared memory typically includes multiple independent banks (banks), and in an ideal case, a thread bundle includes multiple threads, which can access different banks in the shared memory simultaneously, and data access is performed on the different banks simultaneously, so as to implement parallel access of multiple threads in a single cycle. For example, the shared memory includes 32 independent banks and the thread bundle includes 32 threads, so that each thread can access a different bank in the same cycle, so that 32 threads can access data on the shared memory at the same time. However, when memory addresses or read addresses of multiple thread accesses are mapped to the same bank, since a bank is only accessed by one thread in one cycle, a bank conflict (Bank conflict) occurs in the shared memory, and these conflicting thread accesses must be serialized and executed asynchronously in multiple cycles. For example, if 3 threads initiate data storage requests at the same time, and the target storage addresses carried in the data storage requests are mapped to the same storage bank, a storage bank conflict may be caused, and at this time, the data storage requests initiated by the 3 threads need to be divided into 3 cycles for asynchronous execution. Thus, the existence of the bank conflict phenomenon severely reduces the effective bandwidth and program performance of the chip. For the memory bank conflict phenomenon, the traditional data access method mainly avoids the memory bank conflict by manually optimizing the data layout (for example, adjusting the data access sequence of the memory bank) by a programmer, but the method increases the programming complexity and the memory overhead of a chip and lacks versatility. Based on this, in some related technologies, a scheme of dynamically scheduling access requests is proposed, but such a data access method often has problems of complex hardware implementation and high memory overhead, resulting in low data access efficiency. In summary, the existing data access method is difficult to effectively cope with the memory bank conflict phenomenon, resulting in low data access efficiency. Disclosure of Invention The invention provides a data access method, a device, equipment, a storage medium and a chip, which are used for solving the defect that the existing data access method is difficult to effectively cope with the collision phenomenon of a storage body, so that the data access efficiency is low. The invention provides a data access method, which comprises the steps of receiving a data storage request of a thread, wherein the data storage request carries data to be stored and a target storage address, determining a first address conversion rule corresponding to the target storage address based on a first data access granularity of the target storage address, performing address conversion operation on the target storage address based on the first address conversion rule to generate a first target physical address, wherein the first target physical address is used for designating a physical position of a first target storage body in a shared memory, and storing the data to be stored into the first target storage body based on the first target physical address. The data access method includes the steps of determining a first bit sequence to be operated, determining the first bit sequence to be operated based on a plurality of first target bits in a target storage address, performing address conversion operation on the target storage address based on the first address conversion rule to generate a first target physical address, determining the first bit sequence to be operated of the target storage address, determining the first bit sequence to be operated to include a plurality of continuous bits in the target storage address, performing exclusive OR operation on the first bit sequence to be operated and the first bit sequence to be operated to generate the first target physical address. The data access method comprises the steps of determining a first address transformation rule corresponding to a target storage address based on a first data access granularity of the target storage address, selecting a plurality of first target bits from the target storage address to serve as a first bit sequence to be operated in the first address transformation rule if the first data access granularity of the target storage address is smaller than or equal to a preset threshold value, and selecting a plurality of first target bits and at l