CN-122019460-A - Debugging method, device and medium of digital signal processing chip

CN122019460ACN 122019460 ACN122019460 ACN 122019460ACN-122019460-A

Abstract

The present invention relates to the field of digital signal processing technology, and in particular, to a method, an apparatus, and a medium for debugging a digital signal processing chip. The method comprises the steps of obtaining mapping files and variables to be read of a chip to be debugged, selecting the number of channels of transmission channels according to available memory of the chip to be debugged, binding corresponding relations between the variables to be read and the transmission channels, configuring analysis multiplying power of the transmission channels based on the corresponding relations, obtaining physical addresses corresponding to the variables to be read based on the mapping files, combining the physical addresses and the analysis multiplying power of each transmission channel into data packets according to a preset communication protocol, sending the data packets to the chip to be debugged so that the chip to be debugged can conduct analysis operation based on the data packets, sending a reading instruction to the chip to be debugged, wherein the reading instruction comprises target variables, and obtaining real-time values of the variables corresponding to the variables to be read provided by the chip to be debugged. The invention can ensure the continuity of the service without suspending or restarting the service flow of the chip in operation.

Inventors

CHEN YONG
YANG GUIXIAN

Assignees

深圳硕日新能科技股份有限公司

Dates

Publication Date: 20260512
Application Date: 20251230

Claims (10)

1. The debugging method of the digital signal processing chip is characterized by comprising the following steps of: Obtaining a mapping file of a chip to be debugged, obtaining a variable to be read, and selecting the number of channels of a transmission channel according to the available memory of the chip to be debugged; binding the corresponding relation between the variable to be read and the transmission channels, and configuring the resolution ratio of each transmission channel based on the corresponding relation; Acquiring a physical address corresponding to the variable to be read based on the mapping file; Combining the physical address and the resolution ratio of each transmission channel into a data packet according to a preset communication protocol, and sending the data packet to the chip to be debugged so that the chip to be debugged can perform resolution operation based on the data packet; and sending a reading instruction to the chip to be debugged, wherein the reading instruction comprises a target variable, and acquiring a variable real-time value corresponding to each variable to be read provided by the chip to be debugged.
2. The method for debugging a digital signal processing chip according to claim 1, wherein said step of taking a real-time value of a variable corresponding to each of said physical addresses provided by said chip to be debugged comprises: And drawing a variable value change curve corresponding to each variable to be read according to the variable real-time values.
3. The method for debugging a digital signal processing chip of claim 2, wherein the step of obtaining a plurality of the variable real time values comprises: Sending the reading instruction to the chip to be debugged according to a preset acquisition period to acquire a plurality of variable real-time values or Setting acquisition trigger parameters for each variable to be read, and sending the acquisition trigger parameters to the chip to be debugged so that the chip to be debugged can acquire a plurality of variable real-time values of the corresponding physical address according to the acquisition trigger parameters to form a variable value array; Acquiring the variable value array; the acquisition triggering parameters comprise at least one of triggering sources, triggering types, triggering thresholds, triggering positions, total points and interval points.
4. A method of debugging a digital signal processing chip in accordance with claim 3, wherein the trigger position comprises any one of a head end, a center, and an end; the step of enabling the chip to be debugged to collect a plurality of variable real-time values of the corresponding physical address according to the collection triggering parameter includes: presetting a data buffer area in the chip to be debugged, so that the chip to be debugged can continuously collect based on the interval points and store the variable real-time value in the data buffer area; When the chip to be debugged detects that the latest variable real-time value meets the trigger type and the trigger position, the latest variable real-time value is used as a trigger point; and acquiring a certain number of variable real-time values from the data buffer based on the trigger point and the trigger position and/or continuously acquiring a certain number of variable real-time values.
5. The method for debugging a digital signal processing chip according to claim 1, wherein the step of acquiring the physical address corresponding to the variable to be read based on the mapping file comprises: Obtaining the variable type of the variable to be read; If the variable type is a conventional variable, the physical address is directly obtained from the mapping file according to the variable to be read; if the variable type is a group variable, acquiring a starting address and a total byte number corresponding to the variable to be read from the mapping file, acquiring a byte offset based on the total byte number, and acquiring the physical address based on the starting address and the byte offset; And if the variable type is a structural body variable, acquiring a base address corresponding to the variable to be read from the mapping file, acquiring a member offset, and acquiring the physical address based on the base address and the member offset.
6. The debugging method of a digital signal processing chip according to claim 1, wherein the step of binding the correspondence between the variable to be read and the transmission channel comprises: Acquiring a data type corresponding to the variable to be read, wherein the data type comprises a 16-bit integer type and/or a 32-bit floating point type; And if the data type is 16-bit integer, selecting one to be bound with the variable to be read from the transmission channel, and if the data type is 32-bit floating point type, selecting two to be bound with the variable to be read from the transmission channel.
7. The method for debugging a digital signal processing chip according to claim 6, wherein the step of enabling the chip to be debugged to perform parsing operation based on the data packet comprises: if the data type is 16-bit integer, acquiring and reading 2-byte data according to the physical address corresponding to each variable to be read, and splicing the 2-byte data to acquire the variable real-time value; And if the data type is 32-bit floating point type, acquiring 4-byte data according to the physical address corresponding to each variable to be read, converting the 4-byte data into a floating point value, compressing the floating point value according to the resolution ratio, acquiring the real variable value, and storing the real variable value in a fixed array.
8. The method for debugging a digital signal processing chip according to claim 7, wherein the step of obtaining the real-time variable value corresponding to each physical address provided by the chip to be debugged comprises: if the data type corresponding to the variable to be read is 16-bit integer, directly acquiring the variable real-time value through the corresponding transmission channel; If the data type corresponding to the variable to be read is 32-bit floating point type, acquiring the variable real-time value from the fixed array through one transmission channel corresponding to the variable to be read, acquiring the first 2 bytes of the 4-byte data through the other transmission channel, and restoring the variable real-time value to a reduction value based on the resolution ratio.
9. A computer readable storage medium, characterized in that a computer program is stored, which, when being executed by a processor, causes the processor to perform the steps of the method according to any of claims 1 to 8.
10. A computer device comprising a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the steps of the method of any of claims 1 to 8.

Description

Debugging method, device and medium of digital signal processing chip Technical Field The present invention relates to the field of digital signal processing technology, and in particular, to a method, an apparatus, and a medium for debugging a digital signal processing chip. Background A Digital Signal Processor (DSP) is a microprocessor designed for high-speed digital signal processing, and is widely used in the key fields of industrial control, automotive electronics, aerospace, audio processing, and the like. The DSP debugging technology is used as a key means for guaranteeing the functional correctness and troubleshooting operation faults, and is always a core requirement in the industry research and development and application process. Currently, DSP debugging approaches are mainly divided into several types, one of which is an on-chip debug interface, which is supported by almost all modern DSP chips. Through the debugger and JTAG/SWD hardware interface (with the simulator/debug probe), can connect to the internal debug access port of DSP chip to debug. However, the technology has the limitation that in practical application, on one hand, the debugging process needs to rely on a core mechanism for suspending the operation of a CPU, whether breakpoint checking variables are set or real-time memory data are read, normal task scheduling of a DSP chip is required to be interrupted briefly or continuously, the requirement of a DSP chip application scene on microsecond/millisecond real-time response (such as a motor real-time control and high-frequency signal filtering scene, the CPU suspension can cause control signal loss and data acquisition faults) is directly destroyed, on the other hand, interrupt debugging can mask potential problems of a system, partial occasional faults (such as real-time task scheduling conflict and instant data overflow) can be triggered only when the DSP chip is continuously operated, and the CPU suspension caused by a debugger breaks the time sequence condition of fault triggering, so that the problems are difficult to reproduce and troubleshoot. Disclosure of Invention The embodiment of the invention provides a debugging method, equipment and medium of a digital signal processing chip, which are used for solving the problem that a CPU (Central processing Unit) needs to be suspended when a DSP (digital signal processor) chip is debugged. The invention discloses a debugging method of a digital signal processing chip, which comprises the following steps: Obtaining a mapping file of a chip to be debugged, obtaining a variable to be read, and selecting the number of channels of a transmission channel according to the available memory of the chip to be debugged; binding the corresponding relation between the variable to be read and the transmission channels, and configuring the resolution ratio of each transmission channel based on the corresponding relation; Acquiring a physical address corresponding to the variable to be read based on the mapping file; Combining the physical address and the resolution ratio of each transmission channel into a data packet according to a preset communication protocol, and sending the data packet to the chip to be debugged so that the chip to be debugged can perform resolution operation based on the data packet; and sending a reading instruction to the chip to be debugged, wherein the reading instruction comprises a target variable, and acquiring a variable real-time value corresponding to each variable to be read provided by the chip to be debugged. Optionally, the step of taking the real-time variable value corresponding to each physical address provided by the chip to be debugged includes: And drawing a variable value change curve corresponding to each variable to be read according to the variable real-time values. Optionally, the step of obtaining a plurality of real-time variable values includes: Sending the reading instruction to the chip to be debugged according to a preset acquisition period to acquire a plurality of variable real-time values or Setting acquisition trigger parameters for each variable to be read, and sending the acquisition trigger parameters to the chip to be debugged so that the chip to be debugged can acquire a plurality of variable real-time values of the corresponding physical address according to the acquisition trigger parameters to form a variable value array; Acquiring the variable value array; the acquisition triggering parameters comprise at least one of triggering sources, triggering types, triggering thresholds, triggering positions, total points and interval points. Optionally, the trigger position includes any one of a head end, a center, and an end; the step of enabling the chip to be debugged to collect a plurality of variable real-time values of the corresponding physical address according to the collection triggering parameter includes: presetting a data buffer area in the chip to be debugged, so that the