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CN-122019465-A - FPGA hardware acceleration self-adaptive data distribution method, device and storage medium based on multidimensional state sensing

CN122019465ACN 122019465 ACN122019465 ACN 122019465ACN-122019465-A

Abstract

The invention relates to the technical field of aerospace electronics, in particular to a multi-dimensional state-sensing-based FPGA hardware acceleration self-adaptive data distribution method, equipment and storage medium, which comprises the following steps that S1, four-dimensional state parameters of each SATA channel are directly sampled through a hardware register; the method comprises the steps of S2, utilizing a lookup table to replace a hardware calculation engine of a multiplier to calculate the parameters in a fusion way to generate dynamic weight coefficients, S3, based on the weight coefficients, adaptively distributing input data streams to each SATA channel through a two-stage distribution mechanism, and S4, dynamically correcting evaluation parameters through closed loop feedback and starting a progressive degradation strategy when the channel is abnormal. The invention is realized in the FPGA hardware level, solves the problem that the traditional static strategy can not adapt to SSD real-time performance fluctuation, realizes the lossless and low-delay landing of 10G Ethernet full-speed data, and has the characteristics of high reliability and long service life.

Inventors

  • SU JIAWEI
  • YANG YANG
  • FENG SHUYI
  • YUAN JIE
  • LIU QIANG
  • GUAN NING
  • SHUANG XIAOCHUAN

Assignees

  • 上海航天电子通讯设备研究所

Dates

Publication Date
20260512
Application Date
20260203

Claims (10)

  1. 1. The FPGA hardware acceleration self-adaptive data distribution method based on multidimensional state sensing is characterized by comprising the following steps of: S1, configuring a sampling period of a multidimensional state sensing unit, directly sampling internal signals of N SATA controllers through a hardware register, and collecting four-dimensional state parameters of each SATA channel in real time, wherein N is more than or equal to 4, and the four-dimensional state parameters comprise a command queue state, an equipment internal state, a physical layer performance index and a temperature resource state; S2, a hardware acceleration state evaluation unit replaces a special hardware calculation engine of a multiplier through a lookup table, performs fusion calculation on the four-dimensional state parameters, and generates N dynamic weight coefficients representing real-time processing capacity of each SATA channel; S3, the two-stage data distribution execution unit executes periodic data stream coarse granularity distribution through a first-stage distribution module based on the dynamic weight coefficient, monitors the instantaneous FIFO water level through a second-stage distribution module to execute microsecond real-time fine granularity adjustment, and distributes the input data stream to the N SATA channels; And S4, continuously calculating the throughput deviation between the actual throughput and the expected throughput of each SATA channel by a closed loop feedback optimization unit, dynamically correcting the evaluation parameters of the state evaluation unit based on the throughput deviation by a gradient descent algorithm realized by hardware, and starting a progressive degradation strategy when channel abnormality is detected.
  2. 2. The method for accelerating adaptive data distribution of FPGA hardware based on multidimensional state sensing according to claim 1, wherein in step S1, four-dimensional state parameters of each SATA channel are collected in real time, comprising: Collecting unfinished write command counts reg_sata_pending_cmd_cnt [ i ] from a request queue module rqueue through a hardware register, obtaining command queue depth from an allocation list module alloc_list, and counting command completion delay distribution values reg_sata_cmd_latency_history [ i ] [3:0]; Extracting garbage collection status flag reg_sata_gc_active [ i ] by analyzing SATA protocol characteristics, analyzing SSD health parameters from device identification completion flag reg_sata_dev_identification_done [ i ], and calculating write amplification factor reg_write_amp_factor [ i ] [7:0] based on history write mode; collecting a link layer error count from a SATA central controller module sata_ctrl_central, calculating a physical layer real-time throughput value reg_sata_phy_throughput [ i ] [15:0], and calculating a retransmission rate reg_sata_retry_ratio [ i ] [7:0] based on a SATA protocol retransmission mechanism; The method comprises the steps of collecting SSD temperature data through an I2C bus controller module IIC_TOP, monitoring a water level value reg_fifo_water mark_level [ I ] [11:0] of a dedicated FIFO of each SATA channel, and calculating a cache pressure index reg_cache_pressure_index [ I ] [7:0] based on the FIFO occupancy rate and the processing delay, wherein I is the index of the SATA channel, and I is more than or equal to 0 and less than or equal to N.
  3. 3. The method for accelerating adaptive data distribution of FPGA hardware based on multidimensional state sensing according to claim 1, wherein in step S2, fusion calculation is performed on the four-dimensional state parameters to generate N dynamic weight coefficients representing real-time processing capacity of each SATA channel, including: the four-dimensional state parameters are set Obtaining normalized parameters by linear normalization mapping to unified dimension of 0-255 The normalization formula is as follows: Wherein j=1, 2,3,4 corresponds to the four dimensions, And Respectively the j-th dimension state parameter History minimum and history maximum of (a); normalizing the parameters As address index, searching four weight lookup tables LUT_j pre-stored in a FPGA on-chip memory BRAM in parallel, wherein the lookup tables LUT_j store weight coefficients K_j and the normalization parameters Is a pre-calculated product result; Summing the output results of the four lookup tables LUT_j through a hardware adder tree, and calculating a basic weight value The following is shown: Wherein the method comprises the steps of Is a preset reference weight value; The basic weight value is smoothed by a first-order IIR exponential smoothing filter Filtering to obtain filtering weight value The filter formula is: Where alpha is a smoothing factor and where alpha is a smoothing factor, The filtering weight value of the previous period; And setting a minimum guarantee WEIGHT threshold MIN_WEIGHT, and setting the minimum guarantee WEIGHT threshold MIN_WEIGHT as a final dynamic WEIGHT coefficient when the filter WEIGHT value weight_filtered is smaller than the minimum guarantee WEIGHT threshold MIN_WEIGHT.
  4. 4. The method for accelerating adaptive data distribution of FPGA hardware based on multi-dimensional state awareness according to claim 3, wherein in step S3, data distribution is performed based on dynamic weight coefficients, comprising: the first-level distribution module performs coarse granularity distribution on the input data stream according to the distribution period T_a by a weighted polling algorithm based on the dynamic weight coefficient of each SATA channel, and the data stream distribution proportion of each SATA channel The following is shown: Wherein, the For the dynamic weight coefficient of the ith SATA channel, T_a is more than or equal to 1 mu s and less than or equal to 100 mu s, which is the sum of dynamic weight coefficients of all SATA channels; The secondary distribution module monitors the water level state of the dedicated FIFO of each SATA channel in real time, and when the FIFO water level of any SATA channel exceeds a preset high threshold value, data redirection is triggered within response time delta t, wherein the response time delta t is less than or equal to 200ns; The data redirection decision selects a data transmission alternative path from the standby SATA channels with highest current dynamic weight coefficients and no overrun of the FIFO water level, and forwards the subsequent input data stream of the FIFO water level overrun channel to the selected standby channel.
  5. 5. The method for adaptive data distribution acceleration of FPGA hardware based on multidimensional state sensing according to claim 1, wherein in step S4, the evaluation parameters are dynamically corrected by a gradient descent algorithm implemented by hardware, comprising: the closed loop feedback optimizing unit calculates the actual throughput of each SATA channel every T milliseconds And expected throughput Is (are) relative deviation of The deviation formula is: Wherein the value range of T is more than or equal to 1 and less than or equal to 100; And updating the weight coefficient Kj of the state evaluation unit by adopting a hardware-implemented least mean square algorithm, wherein the updating formula is as follows: Where μ is the learning rate that is configurable, For the normalized value of the j-th dimension state parameter corresponding to the i-th SATA channel, j=1, 2,3,4 corresponds to four dimensions of the four-dimensional state parameter, respectively.
  6. 6. The method for adaptive data distribution acceleration of FPGA hardware based on multidimensional state awareness according to claim 1, wherein in step S4, the starting a progressive degradation strategy comprises: When the closed loop feedback optimization unit continuously detects that M times of CRC check errors occur in a certain SAT channel, a progressive channel degradation strategy is started, wherein M is more than or equal to 3; The progressive channel degradation strategy execution logic is that when CRC check errors are detected for the first time, the dynamic weight coefficient of the channel is reduced by a first proportion, and then when CRC check errors are detected every time, the dynamic weight coefficient of the channel is sequentially reduced by a higher proportion until the Mth CRC check errors are continuously detected, the dynamic weight coefficient of the channel is set to zero, the channel is completely isolated, and any new input data stream is stopped being distributed to the channel; after the isolation of the channel is completed, the closed loop feedback optimization unit redistributes the unprocessed data to be processed in the isolated channel to the SATA channels with other healthy running states.
  7. 7. The method for accelerating adaptive data distribution based on FPGA hardware of multidimensional state sensing according to claim 1, further comprising priority processing of data value sensing before step S1: receiving a high-speed data stream through a 10G Ethernet data access unit, and analyzing application characteristics of each data packet in the high-speed data stream by an application oriented service framework (AOS); Based on a preset rule base, distributing any one of three classes of service quality grades of high, medium and low for the data packet according to the application characteristics; and in the process of executing data distribution by the two-stage data distribution execution unit, guaranteeing a preset minimum bandwidth for high-priority data according to the distributed service quality grade.
  8. 8. The method for accelerating adaptive data distribution of FPGA hardware based on multidimensional state sensing according to claim 1, further comprising learning type parameter optimization: Recording the corresponding relation between the historical state parameters of each SATA channel and the throughput deviation to form a state transition mode library; The system load data is analyzed through a mode identification unit realized by hardware, and the periodic characteristics and the change trend of the system load are identified; Predicting a load change trend in a short time in the future based on the identified features and trends; And according to the load change prediction result, the weight coefficient in the state evaluation unit or the data distribution strategy of the two-stage data distribution execution unit is adjusted in advance, so as to realize predictive load balancing.
  9. 9. A computer device comprising a memory and a processor, the memory having stored therein computer readable instructions which, when executed by the processor, cause the processor to perform the steps of a multi-dimensional state aware FPGA hardware accelerated adaptive data distribution method of any of claims 1 to 8.
  10. 10. A storage medium storing computer readable instructions which, when executed by one or more processors, cause the one or more processors to perform the steps of a multi-dimensional state-aware FPGA hardware accelerated adaptive data distribution method of any of claims 1 to 8.

Description

FPGA hardware acceleration self-adaptive data distribution method, device and storage medium based on multidimensional state sensing Technical Field The invention relates to the technical field of aerospace electronics, in particular to a method, equipment and a storage medium for FPGA hardware acceleration self-adaptive data distribution based on multidimensional state sensing. Background In order to respond to space networking and routing exchange, the requirements of space-earth integration situation calling, inter-satellite interconnection, intelligent aerospace and the like are generated. Conventional on-board computer systems usually adopt a design scheme of combining commercial processors (such as PowerPC, ARM and the like) with radiation-resistant reinforcement measures, but due to the specificity of space environment (such as single event effect, total dose radiation and the like), the reliability of commercial chips is difficult to meet the requirement of long-term on-orbit tasks. In addition, the traditional on-board system has the following technical bottlenecks in storage management, task scheduling, fault tolerance design and the like: With the development of aerospace technology, the data volume generated by modern spaceborne spacecrafts (including satellites, deep space probes and manned spacecrafts) grows exponentially. The high-resolution optical remote sensing, synthetic Aperture Radar (SAR), hyperspectral imaging, space science experiments and other loads commonly adopt a tera (10.3125 Gbps) Ethernet interface to output data. However, on-board storage systems face special challenges: The extreme environmental adaptability is poor, the existing space-borne storage system mostly adopts a static redundancy design, and under the conditions of space radiation and severe temperature change (-55 ℃ to +85 ℃) the SSD performance is degraded unevenly, so that the overall throughput of the system is reduced by more than 40%, and the continuous landing of 10G full line speed data cannot be ensured. The radiation effect is seriously influenced by the phenomenon that the SSD is subjected to high-energy particle radiation during the on-orbit operation of the spacecraft, so that bit overturn, bad block growth and the like occur. Conventional storage controllers lack real-time sensing and adaptation mechanisms for radiation effects, with SSD failure rates as high as 15-25% in typical earth orbit tasks (3-5 years). The energy constraint is strict, the energy of a satellite-borne system is precious, and the existing 10G data recording scheme is generally provided with an excessive cache (> 8GB DDR3) and a redundant controller, so that the power consumption exceeds the standard by 30-40%, and the strict power consumption budget of a spacecraft is not met. The autonomy requirement is high, the physical maintenance of the spacecraft cannot be carried out during the on-orbit period, the fault recovery of the existing system (such as SpaceCube 2.0.0 of NASA open source) depends on ground instructions, and the recovery time is as long as several hours, so that key scientific data are lost. The data value is unbalanced, namely the data value difference in aerospace tasks is huge, for example, the data value of a planetary surface image in deep space exploration and gamma ray storm event in astronomical observation is far higher than that of conventional state data, but the prior system adopts a first-in first-out strategy, and can not dynamically allocate storage resources according to scientific value. The long service life challenge is that the period of modern aerospace tasks is prolonged (such as goddess project and space Mars detection), the storage system is required to continuously work for 5-10 years, the service life of the traditional SATA SSD is only 2-3 years, and the design life is further shortened in a space radiation environment. Therefore, a self-adaptive data distribution architecture based on multidimensional state sensing, which can be autonomously realized at the FPGA hardware level, is specially designed for optimizing the space environment, and meets the high-reliability data recording requirement of the spaceborne spacecraft under the severe conditions of radiation, temperature change, energy limitation and the like. Disclosure of Invention The invention aims to solve the defects in the prior art, and provides an FPGA hardware acceleration self-adaptive data distribution method based on multidimensional state sensing, which comprises the following steps: S1, configuring a sampling period of a multidimensional state sensing unit, directly sampling internal signals of N SATA controllers through a hardware register, and collecting four-dimensional state parameters of each SATA channel in real time, wherein N is more than or equal to 4, and the four-dimensional state parameters comprise a command queue state, an equipment internal state, a physical layer performance index and a temperature res