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CN-122020097-A - Test data analysis method and server applied to circuit board detection

CN122020097ACN 122020097 ACN122020097 ACN 122020097ACN-122020097-A

Abstract

The invention provides a test data analysis method and a server applied to circuit board detection, wherein the method comprises the steps of firstly obtaining an electric signal response waveform sequence and an area optical scanning image of each test point of a circuit board; the method comprises the steps of carrying out response characteristic distinction on data to generate a to-be-analyzed pointing mark set of each point, then independently mining the mark set by calling a preset multipath exploration model to generate a signal waveform depth representation map and an optical image local structure representation map corresponding to each pointing path, carrying out cross-path characteristic comparison on the maps to screen out characteristic evolution leading paths and construct path characteristic association maps thereof, finally determining the category and position distribution of defects according to the maps, and generating a test optimization instruction containing point position identifiers and time sequence adjustment identifiers so as to guide test equipment to dynamically adjust test flows. The invention realizes the deep analysis of the test data of the circuit board and the self-adaptive optimization of the test flow.

Inventors

  • HUANG ZONGZHENG
  • JIANG XIUQING
  • YANG JUN
  • YANG MEIRONG

Assignees

  • 贵州工业职业技术学院
  • 深圳市晶荣利科技有限公司

Dates

Publication Date
20260512
Application Date
20260409

Claims (10)

  1. 1. The test data analysis method applied to circuit board detection is characterized by comprising the following steps: acquiring an initial test response collection set of a circuit board to be detected, wherein the initial test response collection set comprises an electric signal response waveform sequence acquired for each test point position on the circuit board and an area optical scanning image corresponding to the test point position; Performing response characteristic preliminary distinguishing processing on the initial test response collection set, and generating a to-be-analyzed pointing mark set corresponding to each test point according to the waveform contour fluctuation trend of the electric signal response waveform sequence and the image gray level distribution of the area optical scanning image; invoking a preset test data multi-path exploration model to perform path independent excavation operation on the to-be-analyzed pointing mark set, and respectively generating a signal waveform depth representation map and an optical image local structure representation map corresponding to each pointing path; Performing cross-path feature comparison screening based on the signal waveform depth representation map and the optical image local structure representation map, determining a pointing path with a feature comparison result meeting a preset condition as a feature evolution dominant path, and generating a path feature association map corresponding to the feature evolution dominant path; and determining defect type distribution and defect position distribution existing in the circuit board to be detected according to the path characteristic association map, generating a test optimization instruction containing test point position identifiers and test time sequence adjustment identifiers based on the defect type distribution and the defect position distribution, and transmitting the test optimization instruction to circuit board test equipment.
  2. 2. The method for analyzing test data applied to circuit board detection according to claim 1, wherein the performing a response characteristic preliminary distinguishing process on the initial test response collection set, generating a to-be-analyzed pointing mark set corresponding to each test point according to a waveform profile fluctuation trend of the electric signal response waveform sequence and an image gray level distribution of the area optical scanning image, includes: Extracting an electric signal response waveform sequence of each test point, carrying out waveform profile trend analysis on the electric signal response waveform sequence, determining the amplitude difference accumulation condition of the peak position and the trough position in each waveform sequence as waveform profile fluctuation trend, and marking the test point where the waveform profile fluctuation trend meets the preset fluctuation trend condition as a waveform to-be-analyzed pointing point according to the comparison result of the waveform profile fluctuation trend and the preset fluctuation trend condition; Extracting an area optical scanning image of each test point, carrying out gray level analysis on the area optical scanning image, determining the distribution range of gray values of all pixels in the image as image gray level distribution, and marking the test points of which the image gray level distribution meets the preset gray level condition as the pointing points to be analyzed of the image according to the comparison result of the image gray level distribution and the preset gray level condition; Obtaining physical layout coordinates of each test point, constructing a test point layout map according to the physical layout coordinates, marking the test points marked as waveform to-be-analyzed pointing points and image to-be-analyzed pointing points on the test point layout map as first-level pointing points, and marking the test points marked as waveform to-be-analyzed pointing points or image to-be-analyzed pointing points as second-level pointing points; performing adjacent region merging processing on the test point location layout map, performing aggregation operation on the pointing points with adjacent physical layout coordinates and the same level label, generating a plurality of pointing point location adjacent regions, and distributing a unique region pointing identifier for each pointing point location adjacent region; And carrying out association storage on the region pointing identifier corresponding to each pointing point position adjacent region and the level marking information of all the test points in the region to generate a to-be-analyzed pointing mark set corresponding to each test point position, wherein the to-be-analyzed pointing mark set comprises a first level pointing point position adjacent region identifier and a second level pointing point position adjacent region identifier.
  3. 3. The method for analyzing test data applied to circuit board detection according to claim 2, wherein the step of performing an adjacent region merging process on the test point location layout map, performing an aggregation operation on the pointing points with the same level label and adjacent physical layout coordinates, and generating a plurality of pointing point location adjacent regions includes: Performing boundary tracking processing on the test point position layout map, extracting physical layout coordinates of each pointing point position, calculating the space adjacency between the pointing point positions according to the physical layout coordinates, and marking the pointing point position pairs with the space adjacency meeting the preset adjacency condition as point position pairs to be aggregated; Constructing an initial association graph based on the point pairs to be aggregated, taking each pointing point as a node in the initial association graph, and taking the connection relation between the pointing points corresponding to the point pairs to be aggregated as an edge in the initial association graph to generate an initial association topological structure with the nodes and the edges; performing connected subgraph division processing on the initial association topological structure, traversing all nodes in the initial association topological structure, performing deep search along edges from any non-access node, dividing all nodes which can reach each other through the edges into the same connected subgraph, and generating a plurality of connected subgraph sets; Carrying out contour extraction processing on each connected sub-graph set, obtaining physical layout coordinates of all pointing points in the connected sub-graph set, calculating convex hulls of all coordinates to serve as initial adjacent region boundaries corresponding to the connected sub-graph, and determining the pointing point set contained in the region according to the initial adjacent region boundaries; Carrying out smooth correction processing on the initial adjacent region boundary, removing abnormal points deviating from the main contour on the boundary, re-fitting according to the residual boundary points to generate a corrected adjacent region boundary, and extracting region geometric center coordinates corresponding to the corrected adjacent region boundary; And carrying out association storage on the boundary of the corrected adjacent region, the geometric center coordinates of the region and the pointing point position set contained in the region, generating the pointing point position adjacent region corresponding to each connected subgraph, and distributing a unique region pointing identifier for each pointing point position adjacent region.
  4. 4. The method for analyzing test data applied to circuit board detection according to claim 3, wherein the performing association storage on the modified boundary of the adjacent region, the geometric center coordinates of the region, and the set of pointing points included in the region, generating a pointing point adjacent region corresponding to each connected subgraph, and allocating a unique region pointing identifier to each pointing point adjacent region includes: acquiring a corrected adjacent region boundary corresponding to each connected subgraph, converting the corrected adjacent region boundary into a closed boundary ring structure, and carrying out ring filling treatment on the boundary ring structure to generate a solid region mask with a boundary ring as a contour, wherein the solid region mask is used for marking the coverage range of a pointing point position adjacent region in a test point position layout map; extracting the geometric center coordinates of the area corresponding to each connected subgraph, transmitting radial detection lines to a plurality of directions by taking the geometric center coordinates of the area as a starting point, recording the intersection point coordinates of each radial detection line and the boundary of the adjacent area after corresponding correction, and generating a radial span feature set of the adjacent area of the point location according to the distances between all the intersection point coordinates and the geometric center coordinates of the area; performing point location distribution density analysis on the pointing point location set corresponding to each connected subgraph, projecting all point location coordinates in the pointing point location set to a two-dimensional plane, constructing a point location distribution density map, and extracting the number and the positions of density peak areas from the point location distribution density map as point location aggregation features; Inputting the radial span feature set and the point location aggregation feature into a region type distinguishing unit, and performing joint evaluation on multi-directional distance distribution in the radial span feature set and peak region distribution in the point location aggregation feature by the region type distinguishing unit to generate a region morphology category identifier of the point location adjacent region; Calling a corresponding identification coding template from a preset identification coding library based on the region morphology category identification, and carrying out combined coding treatment on the identification coding template and the number information of the connected subgraph to generate a unique region pointing identification of each pointing point position adjacent region; And packaging and storing the solid area mask, the area geometric center coordinates, the pointing point location set and the unique area pointing identifier, constructing pointing point location adjacent area record entries, and summarizing all the pointing point location adjacent area record entries to generate a pointing point location adjacent area record set.
  5. 5. The method for analyzing test data applied to circuit board detection according to claim 1, wherein the step of calling a preset test data multi-path exploration model to perform path independent mining operation on the to-be-analyzed pointing mark set to generate a signal waveform depth characterization map and an optical image local structure characterization map corresponding to each pointing path respectively comprises the following steps: inputting the to-be-analyzed pointing mark set into a path distribution layer of a test data multipath exploration model, and establishing a corresponding number of independent data processing channels according to the number of area pointing marks contained in the to-be-analyzed pointing mark set by the path distribution layer, wherein each independent data processing channel corresponds to one pointing path; extracting electric signal response waveform sequences of all the test points in the adjacent areas of the pointing points indicated by the pointing marks of the corresponding areas in each independent data processing channel, combining the extracted electric signal response waveform sequences according to the spatial arrangement sequence of the test points in the adjacent areas, and generating a waveform sequence combined map corresponding to the pointing path; Inputting the waveform sequence combined spectrum into a signal waveform depth mining sub-network of a test data multipath exploration model, extracting waveform form evolution features and waveform time sequence bearing features in the waveform sequence combined spectrum through multi-level feature extraction operation of the signal waveform depth mining sub-network, and generating a signal waveform depth representation spectrum corresponding to the pointing path; Extracting region optical scanning images of all test points in the adjacent region of the pointing point position indicated by the corresponding region pointing mark in each independent data processing channel, combining the extracted region optical scanning images according to the spatial arrangement sequence of the test points in the adjacent region, and generating an optical image combined map corresponding to the pointing path; Inputting the optical image combined spectrum into an optical image local structure mining sub-network of the test data multipath exploration model, extracting line edge trend characteristics and welding spot area texture characteristics in the optical image combined spectrum through multi-level characteristic extraction operation of the optical image local structure mining sub-network, and generating an optical image local structure representation spectrum corresponding to the pointing path.
  6. 6. The method for analyzing test data applied to circuit board detection according to claim 5, wherein the inputting the waveform sequence combined spectrum into the signal waveform depth mining sub-network of the test data multipath exploration model extracts waveform morphology evolution features and waveform time sequence accepting features in the waveform sequence combined spectrum through a multi-level feature extraction operation of the signal waveform depth mining sub-network, and generating the signal waveform depth characterization spectrum corresponding to the pointing path comprises: Performing first-level feature extraction on the waveform sequence combined spectrum, and performing feature operation on the waveform sequence combined spectrum by adopting a plurality of first feature extraction kernels to generate a plurality of first-level feature maps, wherein each first-level feature map corresponds to waveform local morphological features with different scales in the waveform sequence combined spectrum; performing feature concentration operation on the plurality of first-level feature maps, reducing the spatial resolution of the first-level feature maps, reserving significant response areas in waveform local morphological features, and generating a concentrated first-level feature map set; performing second-level feature extraction on the concentrated first-level feature map set, and performing feature operation on the concentrated first-level feature maps by adopting a plurality of second feature extraction cores to generate a plurality of second-level feature maps, wherein each second-level feature map corresponds to combined association features among different waveform local morphological features; Inputting the plurality of second-level feature maps into a time sequence receiving modeling module, receiving and modeling feature changes along the direction of the waveform sequence in the second-level feature maps through receiving units of the time sequence receiving modeling module, and extracting front-back receiving relations of the waveform sequence in the time dimension as waveform time sequence receiving features; And carrying out feature fusion on the waveform time sequence bearing features and the second-level feature map to generate a fused feature map, and carrying out global feature concentration on the fused feature map to obtain a feature map with fixed dimension as a signal waveform depth representation map corresponding to the pointing path.
  7. 7. The method for analyzing test data applied to circuit board detection according to claim 6, wherein inputting the plurality of second-level feature maps into the timing sequence accepting modeling module, accepting and modeling feature changes along a waveform sequence direction in the second-level feature maps by an accepting unit of the timing sequence accepting modeling module, extracting front-back accepting relations of the waveform sequence in a time dimension as waveform timing sequence accepting features, comprises: performing segmentation processing on each second-level feature map according to the direction of the waveform sequence to generate feature slices corresponding to a plurality of time steps, wherein each feature slice corresponds to a feature representation of one time point in the waveform sequence; inputting the characteristic slice of the first time step into the input gating of the receiving unit, and generating an input gating control signal corresponding to the memory information to be received in the current time step through the activation processing of the input gating; Inputting the characteristic slice of the current time step and the hidden state of the last time step into the forgetting gating of the receiving unit, and generating a forgetting gating control signal corresponding to the ratio of memory information of the last time step to be reserved through the activation processing of the forgetting gating; Updating the memory cell state of the receiving unit according to the input gating control signal and the forget gating control signal, inputting the characteristic slice of the current time step and the updated memory cell state into the output gating of the receiving unit, and generating the hidden state of the current time step through the activation processing of the output gating; Stacking the hidden states of all time steps according to a time sequence to generate a hidden state sequence, extracting global maximum characteristics of the hidden state sequence, and extracting the most obvious time sequence bearing relation in the whole waveform sequence as the waveform time sequence bearing characteristics.
  8. 8. The method for analyzing test data applied to circuit board detection according to claim 1, wherein the step of performing cross-path feature comparison screening based on the signal waveform depth representation spectrum and the optical image local structure representation spectrum, determining a pointing path with a feature comparison result meeting a preset condition as a feature evolution dominant path, and generating a path feature association spectrum corresponding to the feature evolution dominant path comprises the steps of: Acquiring signal waveform depth representation maps and optical image local structure representation maps corresponding to all the pointing paths, and constructing a path feature vector for each pointing path, wherein the path feature vector is formed by feature stitching of the signal waveform depth representation maps and the optical image local structure representation maps; Determining the characteristic distance between path characteristic vectors of any two pointing paths, and generating characteristic difference degree matrixes between every two pointing paths, wherein each element of the characteristic difference degree matrixes represents the characteristic difference degree between the two corresponding paths; Carrying out normalization processing on the characteristic difference matrix, mapping all element values in the matrix into a unified interval range, and generating a normalized characteristic difference matrix; For each directional path, determining the cumulative value of the normalized feature difference degree of the path and all other paths as the total difference degree of the path, and marking the directional path with the minimum total difference degree as an initial feature evolution leading path, wherein the directional path with the minimum total difference degree represents that the features of the path have the highest similarity and representativeness with the features of other paths in the whole; Acquiring a signal waveform depth representation map and an optical image local structure representation map corresponding to the initial feature evolution dominant path, splicing the two representation maps in a feature channel dimension to generate an initial path feature association map, carrying out graph structure modeling on the initial path feature association map, taking each feature point in the representation map as a node in a graph, and taking a spatial position relation between adjacent feature points as edges in the graph to generate a path feature association map corresponding to the initial feature evolution dominant path.
  9. 9. The method for analyzing test data applied to circuit board detection according to claim 8, wherein the performing graph structure modeling on the initial path feature association graph, taking each feature point in the characterization graph as a node in the graph, and taking a spatial position relationship between adjacent feature points as edges in the graph, and generating the path feature association graph corresponding to the initial feature evolution dominant path includes: analyzing the dimension information of the initial path feature association spectrum, obtaining the height, the width and the feature channel number of the characterization spectrum, regarding the feature vector on each spatial position in the characterization spectrum as a graph node, wherein each graph node contains feature values of the corresponding feature channel number; constructing an adjacency relation between nodes according to the spatial resolution of the characterization map, taking, for each node, an adjacent node of the node in each neighborhood direction in the characterization map as a first-order neighborhood node of the node, and taking the connection between the node and the first-order neighborhood node as an edge in the map; Assigning an initial weight to each edge, calculating a distance influence coefficient according to the space distance between adjacent nodes, taking the distance influence coefficient as the initial weight of the edge, and carrying out normalized mapping on the distance influence coefficient to obtain the distance influence coefficient, so that the distance influence coefficient changes within a range from 0 to 1, the smaller the space distance is, the closer the distance influence coefficient is to 1, the larger the space distance is, the closer the distance influence coefficient is to 0, and an initial adjacent weight map is generated; Performing feature transformation on the feature vector of each graph node, mapping the original feature vector to a preset graph feature dimension space, and generating a transformed feature vector corresponding to each node; Constructing a Laplace matrix of the graph based on the initial adjacent weight graph and the transformed feature vectors of all nodes, carrying out graph convolution operation on the Laplace matrix and the transformed feature vectors to generate graph feature vectors updated by each node, arranging the graph feature vectors of all nodes according to original spatial positions to obtain a graph structure modeled feature graph, and taking the node feature vectors in the graph structure modeled feature graph and the adjacent weight graph between the nodes together as a path feature associated graph corresponding to the initial feature evolution dominant path.
  10. 10. A server for a server, which comprises a server and a server, characterized by comprising the following steps: a memory for storing computer executable instructions or computer programs; A processor for implementing the test data analysis method for board detection according to any one of claims 1 to 9 when executing the computer executable instructions or computer programs stored in the memory.

Description

Test data analysis method and server applied to circuit board detection Technical Field The present application relates to the field of data processing, and in particular, to a method and a server for analyzing test data applied to circuit board detection. Background In the field of circuit board manufacturing and testing, along with the continuous improvement of the integration level and complexity of electronic products, the quality detection requirements on the circuit board are also increasingly strict. At present, generally, electric signal response data and corresponding optical image data of each test point on a circuit board to be detected are obtained, then the electric signal data or the optical image data are respectively processed, or the two types of data are simply related and compared, and then the states of the test points are judged according to a preset threshold value or a template matching rule so as to determine whether defects exist or not and the types of the defects. However, when the analysis mode faces the variable defect modes caused by increasingly finer circuit board manufacturing process, deep-level feature related information contained in test data is difficult to fully excavate and utilize, so that defects are not positioned accurately enough, the defect types are not discriminated comprehensively enough, the overall accuracy and the test efficiency of circuit board detection are further affected, and how to more effectively extract and use the defect features from complex test response data becomes a problem which needs to be faced by a person skilled in the art. Disclosure of Invention The invention provides a test data analysis method and a server applied to circuit board detection In a first aspect, an embodiment of the present invention provides a method for analyzing test data applied to circuit board detection, including: acquiring an initial test response collection set of a circuit board to be detected, wherein the initial test response collection set comprises an electric signal response waveform sequence acquired for each test point position on the circuit board and an area optical scanning image corresponding to the test point position; performing response characteristic preliminary distinguishing processing on the initial test response collection set, and generating a to-be-analyzed pointing mark set corresponding to each test point according to the waveform contour fluctuation trend of the electric signal response waveform sequence and the image gray level distribution of the regional optical scanning image; Invoking a preset test data multipath exploration model to perform path independent excavation operation on the to-be-analyzed pointing mark set, and respectively generating a signal waveform depth representation map and an optical image local structure representation map corresponding to each pointing path; Performing cross-path feature comparison screening based on the signal waveform depth representation map and the optical image local structure representation map, determining a pointing path with a feature comparison result meeting a preset condition as a feature evolution dominant path, and generating a path feature association map corresponding to the feature evolution dominant path; Determining defect type distribution and defect position distribution existing in the circuit board to be detected according to the path characteristic association map, generating a test optimization instruction containing test point position identifiers and test time sequence adjustment identifiers based on the defect type distribution and the defect position distribution, and transmitting the test optimization instruction to circuit board test equipment. In a second aspect, an embodiment of the present invention provides a server, including a memory, configured to store computer executable instructions or a computer program, and a processor, configured to implement the above test data analysis method applied to board detection when executing the computer executable instructions or the computer program stored in the memory. The embodiment of the application has the following beneficial effects: According to the test data analysis method applied to circuit board detection, the initial test response collection set comprising the electric signal response waveform sequence and the regional optical scanning image is obtained, the response characteristic preliminary distinguishing processing is carried out based on the waveform profile fluctuation trend and the image gray level distribution, the to-be-analyzed pointing mark set of each test point position is generated, and the ordered screening of mass test data and the focusing of the concerned region are realized. The path independent excavation is carried out on the to-be-analyzed pointing mark set by calling a preset test data multipath exploration model, a signal waveform depth representation map and an optical image local