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CN-122021502-A - Software and verification environment high-speed interaction method and system based on back door access

CN122021502ACN 122021502 ACN122021502 ACN 122021502ACN-122021502-A

Abstract

The invention belongs to the field of chip verification, and relates to a method and a system for high-speed interaction between software and verification environment based on back door access, wherein the system comprises a C language printing function, a C language other function, a monitor and a printer; calling a C language printing function or other C language functions at a software side, embedding assembly writing interaction marks into a mark register in a CPU, pre-storing printing data in the SoC, acquiring a register state by a monitor back door, identifying interaction and triggering a printer, acquiring printing information from a target register in the CPU, analyzing and outputting to a simulation log. The invention not only achieves quality improvement on simulation performance and interaction efficiency, but also shows remarkable advantages on compatibility, expandability and engineering practicability, and can effectively support high-efficiency, stable and low-cost operation of modern SoC chips in a large-scale system-level verification stage.

Inventors

  • CHEN PENGYUAN

Assignees

  • 北京数渡信息科技有限公司

Dates

Publication Date
20260512
Application Date
20260416

Claims (7)

  1. 1. A high-speed interaction system of software and verification environment based on back door access, comprising: The system comprises a CPU, a C language printing function, an interface definition and a memory, wherein the interface definition is consistent with the standard C language, a printing mark is written into a mark register in the CPU by adopting an embedded assembly mode in the C language printing function, a compiler distributes parameters of the C language printing function to a general purpose register or stack space in the CPU according to the calling convention of a target platform ABI, and partial data related to printing is written into a memory in the SoC in advance in a starting stage of the CPU; writing the interactive mark of the corresponding interactive type into an internal mark register of the CPU by the embedded assembly code by other functions of the C language; The monitor is used for independently setting up a monitor instance for each CPU core in the SoC, acquiring the state of a marking register in the CPU through SystemVerilog Interface in a back door access mode, transmitting SystemVerilog Interface to a monitor object through a virtual interface, continuously monitoring the state change of the marking register by the monitor, identifying the interaction type, and executing corresponding operation according to different interaction types; And the printer acquires the formatted character string address and related parameters to be printed from the general purpose register in the CPU after being triggered by the monitor, analyzes and replaces the related parameters according to the C language standard, and prints the replaced result into the simulation log.
  2. 2. The high-speed interaction system for software and verification environment based on back door access of claim 1, wherein the flag register is selected in relation to the architecture and implementation of the CPU, comprises a general purpose register, a special state register or a reserved debug register, and can be reliably accessed by the verification environment through a back door mode.
  3. 3. The high-speed interaction system of software and verification environment based on back door access of claim 1, wherein SystemVerilog Interface is used for information observation only and does not participate in functional logic calculation of CPU.
  4. 4. The high-speed interaction system of software and verification environment based on back door access according to claim 1, wherein the interaction type identified by the monitor comprises a printing mark, a synchronization mark and an error mark, the operation corresponding to the printing mark is used for triggering a printer to execute the printing operation, the operation corresponding to the synchronization mark is used for sending a synchronization event to the verification environment, and the operation corresponding to the error mark is used for outputting key information related to the error mark in a simulation log.
  5. 5. The high-speed interaction method of the software and the verification environment based on the back door access is characterized by being applied to the high-speed interaction system of the software and the verification environment based on the back door access, which is disclosed in any one of claims 1 to 4, and comprises the following steps: The method comprises the steps that a software side calls a C language printing function or other C language functions, corresponding interactive marks are written into a CPU internal mark register in an embedded assembly mode, and partial data related to printing are written into an SoC internal memory in advance in a CPU starting stage; Step 2, the monitor acquires the state of the internal mark register of the CPU in real time in a back door mode through SystemVerilog Interface; step 3, the monitor recognizes the interaction type according to the mark value of the mark register and executes corresponding operation; And 4, after receiving a printing operation signal triggered by the monitor, the printer acquires the formatted character string address and related parameters to be printed from a general purpose register in the CPU, analyzes and replaces the related parameters, and prints the replaced result into a simulation log.
  6. 6. The method of high-speed interaction of software with a verification environment based on back door access of claim 5, wherein in step 3, the monitor identifies the corresponding operation after the interaction type comprises: If the synchronous mark is identified, a synchronous event is sent to the verification environment; If the error mark is identified, outputting key information related to the error mark in a simulation log; And if the printing mark is identified, triggering the printer to execute the corresponding printing operation.
  7. 7. The method of high-speed interaction between software and verification environment based on back door access of claim 5, wherein in step 4, the printer parses the formatted string according to the C language standard, and replaces the corresponding relevant parameters to the corresponding positions of the formatted string.

Description

Software and verification environment high-speed interaction method and system based on back door access Technical Field The invention relates to a method and a system for high-speed interaction between software and verification environment based on back door access, and belongs to the technical field of chip verification. Background With the continuous increase of the integration level and complexity of integrated circuit designs, the verification scale and verification scenario of System on Chip (SoC) are exponentially growing. The SoC usually integrates a plurality of processor cores, a dedicated acceleration unit, bus interconnections and rich peripheral modules, and the system-level functional verification of the SoC needs to cover not only the logic correctness of each sub-module, but also the overall collaborative operation and timing consistency of the system. In this context, the number and complexity of verification tasks increases dramatically, with the verification period extending. How to effectively shorten the verification time on the premise of ensuring the verification coverage rate becomes one of the key problems to be solved in the chip design flow. A system level verification method represented by Co-Simulation (Co-Simulation, COSIM for short) has become one of the current mainstream verification means. The method enables the verification use case to realize flexible data interaction and function verification between the simulation environment and the embedded software. However, with the continuous expansion of the scale of SoC and the increase of software complexity, the interaction requirement between software and verification environment is far more than basic synchronization, error reporting and status monitoring. In early development and debugging stages of the chip, a verifier often needs to assist in analyzing system behavior and positioning problems through a large amount of information printing (such as log output, state tracking, debugging information recording, etc.). At present, the common practice in the industry is to write a bottom printing function on a software side by a verifier, transmit interaction information to a designated memory address space through a system bus, set a bus monitor on a verification environment side to capture related transactions in real time, and trigger corresponding interaction requests such as synchronization, error reporting, printing and the like according to different address matching relations. The front-door printing mode is simple to realize and good in compatibility, but the efficiency is severely limited by the system bus bandwidth and the execution time of a CPU (the CPU refers to an RTL CPU simulation model in the SoC to be verified, and is not a server CPU running simulation). On one hand, the scheme needs to occupy a certain memory address space for information transmission, and on the other hand, when the printing data volume is large, the CPU needs to execute a printing function for a long time, and a large number of instruction cycles are occupied, so that the simulation time (the simulation time refers to the time of running a circuit or a system in a simulation environment, and not the real time in the real world) is obviously prolonged. Particularly in the simulation stage, the printing operation may become a performance bottleneck, seriously affects the verification speed and the system simulation stability, and is difficult to meet the high-efficiency verification requirement in the complex SoC development. Therefore, on the premise of not influencing the correctness of the simulation logic, an efficient, low-cost and quick interaction mechanism between the software and the verification environment is realized, and the important technical direction in the chip verification process is realized. The method can effectively reduce the occupation of simulation resources, improve the verification execution efficiency, shorten the debugging period and further accelerate the overall progress of chip projects. At present, in the simulation stage of chip design, the interaction mode between software and verification environment is still relatively original, and the main stream is still dependent on the CPU to access a specific address space through a system bus, and print information or debug data is transferred to the verification environment for processing. The typical front gate interaction mode has simple structure and low implementation cost, but the essence of the mode is that the CPU executes a printing function to write character data into a memory mapping area byte by byte, so that monitoring logic on the verification side is triggered. This process is very prone to becoming a performance bottleneck in a logic simulation environment. In the related patent document, publication number CN116306410B provides a "method and apparatus for printing information based on tightly coupled memory, and a hardware verification method", a