CN-122021517-A - Harmonic balance simulation method, device, equipment, storage medium and program product

Abstract

The invention relates to a harmonic balance simulation method, a device, equipment, a storage medium and a program product. The harmonic balance simulation method comprises the steps of determining a transient analysis result of a target circuit, executing envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis result, and executing harmonic balance analysis on the target circuit according to the envelope analysis result to obtain steady-state response of the target circuit. On the premise of ensuring the solving precision of the harmonic balance equation, the simulation and design efficiency can be improved, and the simulation and design cost can be reduced.

Inventors

• MENG JUN
• DENG ZHOU
• YANG JIE
• YU HAN
• YANG LULU
• Zou Lanrong

Assignees

• 深圳华大九天科技有限公司

Dates

Publication Date

20260512

Application Date

20260130

Claims (10)

1. 1. The harmonic balance simulation method is characterized by comprising the following steps of: determining a transient analysis result of the target circuit; performing envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis result; And carrying out harmonic balance analysis on the target circuit according to the envelope analysis result to obtain the steady-state response of the target circuit.
2. 2. The method of claim 1, wherein determining the transient analysis result of the target circuit comprises: And performing transient analysis of a first preset time length on the target circuit to obtain a transient analysis result of the target circuit.
3. 3. The harmonic balance simulation method according to claim 1, wherein the performing an envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis result comprises: Performing envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis solution corresponding to each sampling time point; And determining the envelope analysis result according to the envelope analysis solutions corresponding to the adjacent sampling time points.
4. 4. A harmonic balance simulation method according to claim 3, wherein the determining the envelope analysis result according to the envelope analysis solutions corresponding to the adjacent sampling time points comprises: And when the difference value between the envelope analysis solutions corresponding to the adjacent sampling time points is smaller than a preset threshold value, determining the envelope analysis solution corresponding to the next sampling time point in the adjacent sampling time points as the envelope analysis result.
5. 5. A harmonic balance simulation method according to claim 3, wherein the performing an envelope analysis on the target circuit according to the transient analysis result, to obtain an envelope analysis solution corresponding to each sampling time point, comprises: and taking the transient analysis result as an initial solution of envelope analysis, and executing envelope analysis on the target circuit to obtain an envelope analysis solution corresponding to each sampling time point.
6. 6. The method of claim 1, wherein the performing harmonic balance analysis on the target circuit according to the envelope analysis result to obtain a steady state response of the target circuit comprises: and taking the envelope analysis result as an initial solution of a harmonic balance equation of the target circuit, and solving the harmonic balance equation of the target circuit to obtain a steady-state response of the target circuit.
7. 7. A harmonic balance simulation apparatus, characterized in that the harmonic balance simulation apparatus comprises: A first analysis module configured to determine a transient analysis result of the target circuit; The second analysis module is configured to execute envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis result; and the third analysis module is configured to perform harmonic balance analysis on the target circuit according to the envelope analysis result to obtain steady-state response of the target circuit.
8. 8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the harmonic balance simulation method of any of claims 1 to 6 when the computer program is executed.
9. 9. A computer readable storage medium having stored thereon a computer program, characterized in that the computer program, when executed by a processor, implements the harmonic balance simulation method of any of claims 1 to 6.
10. 10. A computer program product comprising a computer program or instructions which, when executed by a processor, implements the harmonic balance simulation method of any of claims 1 to 6.

Description

Harmonic balance simulation method, device, equipment, storage medium and program product Technical Field The present invention relates to the field of integrated circuit computer aided design, and in particular, to a harmonic balance simulation method, apparatus, device, storage medium and program product. Background The radio frequency circuit is a key technology of application systems such as mobile communication, high-precision radar, aerospace and the like, and simulation software becomes an indispensable tool in the process of designing the radio frequency circuit. In the design of a radio frequency circuit, engineers often adopt a periodic signal excitation circuit to simulate the radio frequency circuit, and simulate the periodic signal excitation circuit to obtain the steady-state response of the radio frequency circuit, so as to further simulate on the basis to examine whether the radio frequency circuit meets the design requirement. In the solving process of the steady state response, the related technology adopts a harmonic balance method to solve the steady state response of the radio frequency circuit, namely, a Fourier transform is utilized to transform a periodic signal and a circuit equation on a time domain into a frequency domain, the Fourier coefficient of the periodic signal is used as an unknown number, a harmonic balance equation is solved in the frequency domain, and an initial solution of the harmonic balance equation is generally obtained by adopting a transient analysis method. However, when the time constant of the radio frequency circuit is large, the running time for obtaining the initial solution by adopting the transient analysis method is long in the simulation process, so that the simulation cost of the radio frequency circuit design is greatly increased. Disclosure of Invention To overcome the problems in the related art, the present invention provides a harmonic balance simulation method, apparatus, device, storage medium, and program product. According to a first aspect of an embodiment of the present invention, there is provided a harmonic balance simulation method, including: determining a transient analysis result of the target circuit; performing envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis result; And carrying out harmonic balance analysis on the target circuit according to the envelope analysis result to obtain the steady-state response of the target circuit. In some embodiments, the determining the transient analysis result of the target circuit includes: And performing transient analysis of a first preset time length on the target circuit to obtain a transient analysis result of the target circuit. In some embodiments, the performing an envelope analysis on the target circuit according to the transient analysis result, to obtain an envelope analysis result, includes: Performing envelope analysis on the target circuit according to the transient analysis result to obtain an envelope analysis solution corresponding to each sampling time point; And determining the envelope analysis result according to the envelope analysis solutions corresponding to the adjacent sampling time points. In some embodiments, the determining the envelope analysis result according to the envelope analysis solutions corresponding to the adjacent sampling time points includes: And when the difference value between the envelope analysis solutions corresponding to the adjacent sampling time points is smaller than a preset threshold value, determining the envelope analysis solution corresponding to the next sampling time point in the adjacent sampling time points as the envelope analysis result. In some embodiments, the performing the envelope analysis on the target circuit according to the transient analysis result, to obtain an envelope analysis solution corresponding to each sampling time point includes: and taking the transient analysis result as an initial solution of envelope analysis, and executing envelope analysis on the target circuit to obtain an envelope analysis solution corresponding to each sampling time point. In some embodiments, the performing harmonic balance analysis on the target circuit according to the envelope analysis result to obtain a steady state response of the target circuit includes: and taking the envelope analysis result as an initial solution of a harmonic balance equation of the target circuit, and solving the harmonic balance equation of the target circuit to obtain a steady-state response of the target circuit. According to a second aspect of an embodiment of the present invention, there is provided a harmonic balance simulation apparatus including: A first analysis module configured to determine a transient analysis result of the target circuit; The second analysis module is configured to execute envelope analysis on the target circuit according to the transient analysis result to obtain a