CN-122024627-A - Reference circuit, driving chip and display device

Abstract

The embodiment of the invention provides a reference circuit, a driving chip and a display device, and relates to the technical field of display screens. The reference circuit has small area and low power consumption. The reference circuit comprises an impedance circuit, a first current mirror circuit, a first transistor and a second transistor, wherein a first end of the first current mirror circuit is electrically connected with a first voltage end, a second end of the first current mirror circuit is electrically connected with a first end of the impedance circuit, the first voltage end is configured to output first voltage, a control end of the first transistor is electrically connected with a second end of the impedance circuit, a first end of the first transistor is electrically connected with a second end of the first transistor, a third end of the first transistor is electrically connected with a ground end, a control end of the second transistor is electrically connected with a third end of the first current mirror circuit, a first end of the second transistor is electrically connected with a second end of the second transistor, and a third end of the second transistor is electrically connected with the ground end.

Inventors

• LI XIAO
• WANG HUORONG

Assignees

• 钛铂思科技(上海)有限公司

Dates

Publication Date

20260512

Application Date

20241108

Claims (9)

1. 1. A reference circuit, comprising: An impedance circuit; A first current mirror circuit having a first end electrically connected to a first voltage terminal and a second end electrically connected to a first end of the impedance circuit, wherein the first voltage terminal is configured to output a first voltage; A first transistor, a control end of which is electrically connected with a second end of the impedance circuit, a first end of which is electrically connected with a second end of the first transistor, and a third end of which is electrically connected with the grounding end; A second transistor, wherein a control end of the second transistor is electrically connected with a third end of the first current mirror circuit, a first end of the second transistor is electrically connected with a second end of the second transistor, and the third end of the second transistor is electrically connected with the grounding end; The first current mirror circuit and the impedance circuit are configured to generate a first reference current from the first voltage; The first transistor and the second transistor achieve positive and negative temperature coefficient cancellation such that the generated first reference current is approximately independent of temperature.
2. 2. The reference circuit of claim 1, wherein the impedance circuit comprises a first resistor; The first end of the first resistor is the first end of the impedance circuit, and the second end of the first resistor is the second end of the impedance circuit.
3. 3. The reference circuit of claim 1, wherein a control terminal of the impedance circuit is electrically connected to a control terminal of the first current mirror circuit, a third terminal of the impedance circuit is electrically connected to the ground terminal, and a fourth terminal of the impedance circuit is electrically connected to the first voltage terminal; The first current mirror circuit is configured to generate a second voltage according to the first voltage and output the second voltage to the impedance circuit via the control terminal to change the impedance of the impedance circuit.
4. 4. The reference circuit of claim 3, wherein the impedance circuit comprises a self-bias voltage module and an impedance module; The control end of the self-bias voltage module is the control end of the impedance circuit, the first end of the self-bias voltage module is electrically connected with the first voltage end, the second end of the self-bias voltage module is the fifth end of the impedance circuit, the third end of the self-bias voltage module is the third end of the impedance circuit, and the fourth end of the self-bias voltage module is electrically connected with the control end of the impedance module; The first end of the impedance module is the first end of the impedance circuit, and the second end of the impedance module is the second end of the impedance circuit; the self-bias voltage module is configured to receive the second voltage and output a third voltage to the impedance module to change the impedance of the impedance module.
5. 5. The reference circuit of claim 4, wherein the self-bias voltage module comprises a third transistor, a fourth transistor, and a fifth transistor; the control end of the third transistor is a second end of the self-bias voltage module, the first end of the third transistor is a first end of the self-bias voltage module, and the second end of the third transistor is electrically connected with the first end of the fourth transistor; The control end of the fourth transistor is the control end of the self-bias voltage module, and the second end of the fourth transistor is electrically connected with the first end of the fifth transistor; the control end of the fifth transistor is electrically connected with the first end of the fifth transistor, the control end of the fifth transistor is the fourth end of the self-bias voltage module, and the second end of the fifth transistor is the third end of the self-bias voltage module.
6. 6. The reference circuit of claim 5, wherein the self-bias voltage module further comprises a sixth transistor; The control end of the sixth transistor is electrically connected with the second end of the fourth transistor, the first end of the sixth transistor is electrically connected with the second end of the sixth transistor, and the third end of the sixth transistor is the third end of the self-bias voltage module.
7. 7. The reference circuit of claim 4, wherein the impedance module comprises a seventh transistor; the control end of the seventh transistor is the control end of the impedance module, the first end of the seventh transistor is the first end of the impedance module, and the second end of the seventh transistor is the second end of the impedance module.
8. 8. A driving chip is characterized by comprising the reference circuit, the second current mirror circuit and the control circuit according to any one of claims 1-7; The input end of the second current mirror circuit is electrically connected with the output end of the reference circuit, the control end of the second current mirror circuit is electrically connected with the output end of the control circuit, and the output end of the second current mirror circuit is electrically connected with the cathode of the light-emitting diode; the anode of the light emitting diode is electrically connected with the power supply end; The second current mirror circuit is configured to convert the first reference current to a second reference current and transmit the second reference current to the light emitting diode; Wherein the first reference current and the second reference current are in a proportional relationship; The control circuit is configured to control the number of bits of the second current mirror circuit to control the magnitude of the second reference current.
9. 9. A display device, characterized in that the display device comprises: A plurality of the driving chips of claim 8; the LED lamp comprises a lamp panel, wherein the lamp panel is provided with a plurality of LEDs, and a plurality of driving chips are correspondingly connected with the LEDs.

Description

Reference circuit, driving chip and display device Technical Field The present invention relates to the field of display technologies, and in particular, to a reference circuit, a driving chip, and a display device. Background Many driving chips are used in the LED display technology, the whole area of a reference circuit in the existing driving chip is large, and the generated power consumption is large, so that the LED display technology is not beneficial to further popularization. Disclosure of Invention The embodiment of the invention provides a reference circuit, a driving chip and a display device. In a first aspect, some embodiments of the present application provide a reference circuit comprising an impedance circuit, a first current mirror circuit, a first transistor and a second transistor, a first end of the first current mirror circuit being electrically connected to a first voltage end, a second end of the first current mirror circuit being electrically connected to a first end of the impedance circuit, wherein the first voltage end is configured to output a first voltage, a control end of the first transistor being electrically connected to a second end of the impedance circuit, a first end of the first transistor being electrically connected to a second end of the first transistor, a third end of the first transistor being electrically connected to the ground, a control end of the second transistor being electrically connected to a third end of the first current mirror circuit, a first end of the second transistor being electrically connected to a second end of the second transistor, a third end of the second transistor being electrically connected to the ground, the first current mirror circuit and the impedance circuit being configured to generate a reference current that is approximately independent of temperature coefficient of the first and second temperature, and the first temperature offset transistor is achieved. Based on the above scheme, some embodiments of the present application provide a reference circuit, where the reference circuit uses a first transistor and a second transistor to replace the first transistor and the second transistor, so that the overall area of the reference circuit can be reduced, and meanwhile, the connection mode of the first transistor and the second transistor is changed, so that positive and negative temperature coefficients can be offset, and the influence generated by temperature rise in the working process of the reference circuit can be further reduced. In some embodiments, the impedance circuit includes a first resistor, a first end of the first resistor being a first end of the impedance circuit, and a second end of the first resistor being a second end of the impedance circuit. In some embodiments, the control terminal of the impedance circuit is electrically connected to the control terminal of the first current mirror circuit, the third terminal of the impedance circuit is electrically connected to the ground terminal, the fourth terminal of the impedance circuit is electrically connected to the first voltage terminal, the fifth terminal of the impedance circuit is electrically connected to the fourth terminal of the first current mirror circuit, and the first current mirror circuit is configured to generate a second voltage according to the first voltage and output the second voltage to the impedance circuit via the control terminal to change the impedance of the impedance circuit. In some embodiments, the impedance circuit comprises a self-bias voltage module and an impedance module, wherein the control end of the self-bias voltage module is the control end of the impedance circuit, the first end of the self-bias voltage module is electrically connected with the first voltage end, the second end of the self-bias voltage module is the fifth end of the impedance circuit, the third end of the self-bias voltage module is the third end of the impedance circuit, the fourth end of the self-bias voltage module is electrically connected with the control end of the impedance module, the first end of the impedance module is the first end of the impedance circuit, the second end of the impedance module is the second end of the impedance circuit, and the self-bias voltage module is configured to accept the second voltage and output the third voltage to the impedance module to change the impedance of the impedance module. In some embodiments, the self-bias voltage module comprises a third transistor, a fourth transistor and a fifth transistor, wherein the control end of the third transistor is the second end of the self-bias voltage module, the first end of the third transistor is the first end of the self-bias voltage module, the second end of the third transistor is electrically connected with the first end of the fourth transistor, the control end of the fourth transistor is the control end of the self-bias voltage module, the second end of the fourth