CN-122024660-A - Driving circuit for reducing power consumption and operation method for reducing power consumption

Abstract

A driving circuit for reducing power consumption and an operation method thereof are disclosed, which are suitable for driving a display panel, wherein the driving circuit comprises at least one operational amplifier. The operation method comprises the steps of firstly detecting and determining the input voltage of the operational amplifier, and providing a first operation voltage and a second operation voltage according to the input voltage. Based on the first operating voltage and the second operating voltage of the operational amplifier being adjustable and the first operating voltage and the second operating voltage being related to the input voltage, the invention enables the operational amplifier to operate in an adjustable voltage interval between the first operating voltage and the second operating voltage. Therefore, the invention effectively reduces the power consumption of the driving circuit, and can better realize the invention efficacy of minimizing the power consumption when being applied to driving the display panel device.

Inventors

• ZHENG YANCHENG

Assignees

• 联咏科技股份有限公司

Dates

Publication Date

20260512

Application Date

20250122

Priority Date

20241111

Claims (20)

1. 1. An operation method for reducing power consumption is suitable for a driving circuit, the driving circuit is suitable for driving a display panel, the driving circuit comprises an operational amplifier, and the operation method comprises the following steps: Determining an input voltage of the operational amplifier; Providing a first operation voltage and a second operation voltage according to the input voltage of the operational amplifier; the first operating voltage and the second operating voltage are electrically coupled to the operational amplifier, wherein the first operating voltage and the second operating voltage are determined according to the input voltage of the operational amplifier, so that the operational amplifier operates in an adjustable voltage range between the first operating voltage and the second operating voltage.
2. 2. The method of claim 1, wherein the first and second operating voltages are respectively determined as the power supply voltage VDDA and one half of the power supply voltage VDDA by 1/2 when the input voltage of the operational amplifier is between the power supply voltage VDDA and one half of the power supply voltage VDDA by 1/2.
3. 3. The method of claim 2, wherein the first and second operating voltages are respectively determined as half the power supply voltage VDDA 1/2 and the ground voltage GNDA when the input voltage of the operational amplifier is between half the power supply voltage VDDA 1/2 and the ground voltage GNDA.
4. 4. The method of claim 3, wherein the first and second operating voltages are respectively determined as the power supply voltage VDDA and the ground voltage GNDA when the input voltage of the operational amplifier is between a third operating voltage and a fourth operating voltage, the third operating voltage is slightly higher than one half of the power supply voltage VDDA by 1/2, and the fourth operating voltage is slightly lower than one half of the power supply voltage VDDA by 1/2.
5. 5. The method of claim 1, wherein the operational amplifier is electrically coupled to a digital-to-analog converter, and the input voltage of the operational amplifier is an output voltage of the digital-to-analog converter.
6. 6. The method of claim 5, wherein the first and second operating voltages of the operational amplifier are analog voltage signals.
7. 7. The method of claim 4, wherein the operational amplifier is electrically coupled to a first switch, a second switch, a third switch and a fourth switch, such that the operational amplifier selectively uses the power supply voltage VDDA or one half of the power supply voltage VDDA 1/2 as the first operating voltage and one half of the power supply voltage VDDA 1/2 or the ground voltage GNDA as the second operating voltage by the first switch or the second switch.
8. 8. The method of claim 1, wherein the first and second operating voltages are respectively determined as the power supply voltage VDDA and two-thirds of the power supply voltage VDDA by 2/3 when the input voltage of the operational amplifier is between the power supply voltage VDDA and two-thirds of the power supply voltage VDDA by 2/3.
9. 9. The method of claim 8, wherein the first and second operating voltages are respectively determined as two-thirds of the power supply voltage VDDA x 2/3 and one-third of the power supply voltage VDDA x 1/3 when the input voltage of the operational amplifier is between two-thirds of the power supply voltage VDDA x 2/3 and one-third of the power supply voltage VDDA x 1/3.
10. 10. The method of claim 9, wherein the first and second operating voltages are determined as one third of the power supply voltage VDDA x 1/3 and the ground voltage GNDA when the input voltage of the operational amplifier is between one third of the power supply voltage VDDA x 1/3 and the ground voltage GNDA.
11. 11. The method of claim 10, wherein the operational amplifier is electrically coupled to a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and a sixth switch, such that by the first switch, the second switch, or the third switch, the operational amplifier selectively uses the power supply voltage VDDA, two-thirds of the power supply voltage VDDA by 2/3, or one-third of the power supply voltage VDDA by 1/3 as the first operation voltage, and by the fourth switch, the fifth switch, or the sixth switch, the operational amplifier selectively uses two-thirds of the power supply voltage VDDA by 2/3, one-third of the power supply voltage VDDA by 1/3, or the ground voltage da as the second operation voltage.
12. 12. The method of claim 1, wherein the first and second operating voltages are respectively determined as the power supply voltage VDDA and three-fourths of the power supply voltages VDDA by 3/4 when the input voltage of the operational amplifier is between the power supply voltage VDDA and three-fourths of the power supply voltages VDDA by 3/4.
13. 13. The method of claim 12, wherein the first and second operating voltages are respectively determined as three-quarters of the power supply voltage VDDA x 3/4 and one-half of the power supply voltage VDDA x 2/4 when the input voltage of the operational amplifier is between three-quarters of the power supply voltage VDDA x 3/4 and one-half of the power supply voltage VDDA x 2/4.
14. 14. The method of claim 13, wherein the first and second operating voltages are respectively determined as one half of the power supply voltage VDDA x 2/4 and one quarter of the power supply voltage VDDA x 1/4 when the input voltage of the operational amplifier is between one half of the power supply voltage VDDA x 2/4 and one quarter of the power supply voltage VDDA x 1/4.
15. 15. The method of claim 14, wherein the first and second operating voltages are respectively determined as one-fourth of the power supply voltage VDDA x 1/4 and the ground voltage GNDA when the input voltage of the operational amplifier is between one-fourth of the power supply voltage VDDA x 1/4 and the ground voltage GNDA.
16. 16. The method of claim 15, wherein the operational amplifier is electrically coupled to a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, and an eighth switch, such that by the first switch, the second switch, the third switch, or the fourth switch, the operational amplifier is selectively operated with three power supply voltages VDDA, three quarters of the power supply voltages VDDA 3/4, one half of the power supply voltages VDDA 2/4, or one quarter of the power supply voltages VDDA 1/4 as the first operating voltage, and by the fifth switch, the sixth switch, the seventh switch, or the eighth switch, the operational amplifier is selectively operated with three quarters of the power supply voltages VDDA 3/4, one half of the power supply voltages VDDA 2/4, one quarter of the power supply voltages VDDA 1/4 as the ground voltage.
17. 17. The method of claim 1, wherein the driving circuit comprises a plurality of operational amplifiers, the adjustable voltage range operated by each of the operational amplifiers is uniform, such that the operational amplifiers share circuit layout area, further reducing circuit area consumption.
18. 18. A driving circuit for reducing power consumption, suitable for driving a display panel, comprising: A level shift circuit; A digital-to-analog converter electrically coupled to the level conversion circuit, and The operational amplifier is electrically coupled to the digital-to-analog converter, wherein an output voltage of the digital-to-analog converter is an input voltage of the operational amplifier, the operational amplifier is electrically coupled to a first operating voltage and a second operating voltage, and the first operating voltage and the second operating voltage are determined according to the input voltage of the operational amplifier, so that the operational amplifier is operated in an adjustable voltage range, and the adjustable voltage range is between the first operating voltage and the second operating voltage.
19. 19. The driving circuit of claim 18, wherein the first and second operating voltages of the operational amplifier are analog voltage signals.
20. 20. The driving circuit of claim 18, wherein the first and second operating voltages are respectively determined as the power supply voltage VDDA and one half of the power supply voltage VDDA by 1/2 when the input voltage of the operational amplifier is between the power supply voltage VDDA and one half of the power supply voltage VDDA by 1/2.

Description

Driving circuit for reducing power consumption and operation method for reducing power consumption Technical Field The present invention relates to a technology for reducing power consumption, and more particularly, to a driving circuit suitable for driving a display panel and an operating method thereof for reducing power consumption, which can effectively reduce power consumption of the driving circuit by controlling an operational amplifier in the driving circuit to operate in a variable voltage range. Background As is well known, the display driving chip is an integrated circuit chip that is used to control various operations and display functions of a display panel device, such as a Liquid crystal display (Liquid CRYSTAL DISPLAY, LCD) panel device or an Active-matrix organic light Emitting Diode (AMOLED) panel device. Generally, the main functions of these display driving chips include converting driving signals and data into electrical signals and transmitting the converted electrical signals to the display panel device, thereby controlling the display panel device. In addition, based on the key roles of driving the display panel device by the display driving chip and transmitting signals such as images or data to the display panel device by means of electric signals, the display driving chip can provide text or picture imaging, and in recent years, the requirements of the related technologies for the display driving chip are greatly increased. In general, the application range of the display driving chip is applicable to not only liquid crystal display panel devices and plasma display panel (PLASMA DISPLAY PANEL, PDP) devices, but also Organic Light-Emitting Diode (OLED) panel devices and other various panel devices. However, it is noted that in the known display driving chip, in order to generate an output signal, an operational amplifier is generally provided, and the operation voltage of the operational amplifier is generally limited to a specific voltage range. Since the power consumption P of the display driver chip is related to the operational voltage V of the operational amplifier by the current I flowing through the operational amplifier (p=v×i), when there are a plurality of operational amplifiers in the display driver chip, for example, N, the overall power consumption of the display driver chip is increased to v×i×n. Fig. 1 is a schematic diagram of a display driving chip for generating output signals with the same polarity in the prior art. In fig. 1, the power consumption p1=vdda×i_op1 of the display driver chip, wherein i_op1 is a current flowing through the operational amplifier OP1, and the power supply voltage VDDA is an operation voltage of the operational amplifier OP 1. On the other hand, fig. 2 and fig. 3 are schematic diagrams of display driving chips for generating output signals with different polarities in the prior art. In fig. 2, the power consumption p2= (vdda_op2)/2 of the display driver chip, wherein i_op2 is a current flowing through the operational amplifier OP2, one operational amplifier OP2 is electrically coupled between the power supply voltage VDDA and one half of the power supply voltage (VDDA 1/2, indicated by HVDDA in the figure), and the other operational amplifier OP2 is electrically coupled between one half of the power supply voltage (HVDDA) and the ground voltage (GNDA). Similarly, in the circuit configuration for outputting output signals with different polarities, as shown in fig. 3, one operational amplifier OP3 is electrically coupled between a positive analog operation voltage PAVDD and ground voltage (GNDA), and the other operational amplifier OP3 is electrically coupled between ground voltage (GNDA) and a negative analog operation voltage NAVDD. In this circuit configuration, the power consumption p3= (PAVDD ×i_op3)/2+ (| NAVDD |×i_op3)/2 of the display driver chip, where i_op3 is the current flowing through the operational amplifier OP3, PAVDD is the positive analog operating voltage of the operational amplifier OP3, for example, +6 volts, NAVDD is the negative analog operating voltage of the operational amplifier OP3, for example, -6 volts. Since the average power consumption of a display panel device is generally related to the average power consumption of its display driving chip, how to reduce the power consumption of the display driving chip more effectively is one of the research subjects to be solved in recent years. In view of this, although several methods have been disclosed in the prior art to ensure that the display panel device can maintain relatively low power consumption, the effects are not significant, so how to further reduce the power consumption is a drawback of the prior art, and improvement of the prior art is needed. Accordingly, it is apparent that those skilled in the art have a need to develop a driving circuit which is novel and creative and can be used for driving a display panel, and an operating method for reducing po