CN-122024782-A - Magnetic junction memory device and writing method thereof

Abstract

A magnetic junction memory device and a method of writing to the same are provided. A method of writing a magnetic junction memory device that uses a global write driver and first and second local write drivers to write data to first and second magnetic junction memory cells includes receiving, by the global write driver, first write commands and the first write data from a host, storing, by the global write driver, the first write data in a first write latch of the first local write driver while the global write driver receives second write commands and the second write data from the host, and writing, by the first local write driver, the first write data to the first magnetic junction memory cell in response to the first write commands while the global write driver receives the second write commands and the second write data from the host.

Inventors

• Jin Canjing
• JIN ZHIYAN
• Zheng Xuanze
• Jin Zhien
• JIN TAICHENG
• Zheng Shangxun
• ZHU ZAIYU

Assignees

• 三星电子株式会社

Dates

Publication Date

20260512

Application Date

20200721

Priority Date

20190722

Claims (18)

1. 1. A method of writing a magnetic junction memory device that uses a global write driver and first and second local write drivers to write data to first and second magnetic junction memory cells, the method comprising: receiving, by the global write driver, a first write command and first write data from a host; While the global write driver receives a second write command and second write data from the host, in response to the first write command, storing the first write data in a first write latch of the first local write driver, Writing, by the first local write driver, the first write data to the first magnetic junction memory cell in response to the first write command while the global write driver receives the second write command and the second write data from the host, and The first write data is written to the first magnetic junction memory cell by the first local write driver in response to the first write command and the second write data is written to the second magnetic junction memory cell in response to the second write command while the second local write driver stores the second write data in a second write latch of the second local write driver.
2. 2. The writing method of claim 1, further comprising: A third write command and third write data are received by the global write driver from the host while the second write data is written to the second magnetic junction memory cell by the second local write driver in response to the second write command.
3. 3. The method of writing of claim 1, wherein writing the first write data to the first magnetic junction memory cell by the first local write driver in response to the first write command includes receiving the first write data from the global write driver via a global data line, storing the first write data, and writing the stored first write data to the first magnetic junction memory cell via a local data line separate from the global data line.
4. 4. The writing method according to claim 1, wherein, The magnetic junction memory device further includes a third local write driver and a third magnetic junction memory cell, and The write method further includes receiving, by the global write driver, a third write command and third write data while the second write data is written to the second magnetic junction memory cell by the second local write driver in response to the second write command, and writing, by the second local write driver, the second write data to the second magnetic junction memory cell while the third write data is written to the third magnetic junction memory cell by the third local write driver in response to the third write command.
5. 5. The writing method according to claim 1, wherein, The first magnetic junction memory cells are disposed in a first memory bank, The second magnetic junction memory cells are arranged in a second memory group, and The first local write driver is disposed between the first memory bank and the second memory bank.
6. 6. The writing method of claim 1, wherein the host is external to a memory device.
7. 7. A magnetic junction memory device, comprising: a first memory bank comprising a plurality of first magnetic junction memory cells; A first local write driver adjacent to the first memory group and connected to the first global data line and the second global data line, the first local write driver configured to write data to the plurality of first magnetic junction memory cells via the first local data line and the second local data line; A second memory bank adjacent to the first memory bank and comprising a plurality of second magnetic junction memory cells; a second local write driver adjacent to the second memory group and connected to the first global data line and the second global data line, the second local write driver configured to write data to the plurality of second magnetic junction memory cells via third and fourth local data lines, the third and fourth local data lines not connected to the first and second local data lines; A global write driver configured to provide first write data to the first local write driver via the first global data line and the second global data line, and to provide second write data to the second local write driver via the first global data line and the second global data line; a column decoder connected to the first memory group and the second memory group, and A sensing circuit configured to read data from the first memory bank and the second memory bank, Wherein, the During a first write period, the global write driver is configured to receive the second write data from a host and the first local write driver is configured to receive the first write data from the global write driver and write the first write data to the plurality of first magnetic junction memory cells, During a second write period subsequent to the first write period, the global write driver is configured to receive third write data from the host, and the second local write driver is configured to receive the second write data from the global write driver and write the second write data to the plurality of second magnetic junction memory cells, The first memory bank includes a first array of sub-memory cells including the plurality of first magnetic junction memory cells, The second memory group includes a second sub-memory cell array including a plurality of second magnetic junction memory cells, and does not share a word line with the first sub-memory cell array, The first local write driver is between the first sub-mirror cell array and the second sub-mirror cell array, The first local write driver includes a first write latch configured to store the first write data to be written to the plurality of first magnetic junction memory cells, an The second local write driver includes a second write latch configured to store the cell and separate from the first write latch.
8. 8. The magnetic junction memory device of claim 7, wherein during the second write period, the first local write driver is configured to write the first write data to the plurality of first magnetic junction memory cells.
9. 9. The magnetic junction memory device of claim 8, further comprising: A third memory bank adjacent to the second memory bank and including a plurality of third magnetic junction memory cells, and A third local write driver adjacent to the third memory group and connected to the first global data line and the second global data line, the third local write driver configured to write data to the plurality of third magnetic junction memory cells via fifth and sixth local data lines, the fifth and sixth local data lines not being connected to the first, second, third and fourth local data lines, Wherein, the During a third write period subsequent to the second write period, the global write driver is configured to receive fourth write data from the host, and the third local write driver is configured to receive the third write data from the global write driver and write the third write data to the plurality of third magnetic junction memory cells.
10. 10. The magnetic junction memory device of claim 9, wherein during the third write period, the second local write driver is configured to write the second write data to the plurality of second magnetic junction memory cells.
11. 11. The magnetic junction memory device of claim 7, further comprising: A first sub-memory cell array selection element configured to connect the first global data line and the first local data line based on a group selection control signal and configured to connect the second global data line and the second local data line based on a group selection control signal, an A second sub memory cell array selection element configured to connect the first global data line and the third local data line based on a group selection control signal, and configured to connect the second global data line and the fourth local data line based on the group selection control signal.
12. 12. The magnetic junction memory device of claim 7, further comprising: a first bit line multiplexer configured to select the first local data line and the second local data line, and A second bit line multiplexer configured to select the third local data line and the fourth local data line.
13. 13. The magnetic junction memory device of claim 7 wherein, The first local data line is connected to a first end of each of the plurality of first magnetic junction memory cells, and The second local data line is connected to a second terminal of each of the plurality of first magnetic junction memory cells.
14. 14. The magnetic junction memory device of claim 13 wherein, The first global data line comprises a global source line, The second global data line comprises a global bit line, The first and third local data lines include first and third local source lines connected to the global source line, and The second and fourth local data lines include second and fourth local bit lines connected to the global bit line.
15. 15. A magnetic junction memory device, comprising: a global write driver configured to: during a first write period, receiving a first write command from a host for a first memory bank, the first memory bank including a plurality of first magnetic junction memory cells, Receiving a second write command from the host during a second write period, the second memory group comprising a plurality of second magnetic junction memory cells, the second write period being subsequent to the first write period, and Receiving a third write command from the host for a third memory bank during a third write period, the third memory bank including a plurality of third magnetic junction memory cells, the third write period subsequent to the second write period; A first local write driver configured to receive the first write command from the global write driver and perform a first write operation on the plurality of first magnetic junction memory cells during the second write period; a second local write driver configured to receive the second write command from the global write driver and perform a second write operation on the plurality of second magnetic junction memory cells during the third write period; A column decoder connected to the first memory bank and the second memory bank; a sensing circuit configured to read data from the first memory bank and the second memory bank; a first write latch configured to receive first write data from the global write driver during the second write period, and A second write latch configured to receive second write data from the global write driver during the third write period, Wherein the second write latch is separate from the first write latch, Wherein during the third write period, the first local write driver is configured to perform the first write operation on the plurality of first magnetic junction memory cells based on the first write command.
16. 16. The magnetic junction memory device of claim 15, further comprising: A third local write driver is provided, Wherein, the The global write driver is configured to receive a third write command for a third memory bank, the third memory bank comprising a plurality of third magnetic junction memory cells, During a fourth write period subsequent to the third write period, the third local write driver is configured to receive the third write command from the global write driver and perform a third write operation on the plurality of third magnetic junction memory cells, an During the fourth write period, the second local write driver is configured to perform the second write operation on the plurality of second magnetic junction memory cells based on the second write command.
17. 17. The magnetic junction memory device of claim 16, wherein during the third write period, the global write driver is configured to receive the third write command.
18. 18. The magnetic junction memory device of claim 16, further comprising: a fourth local write driver, Wherein, the The global write driver is configured to receive a fourth write command for a fourth memory bank, the fourth memory bank comprising a plurality of fourth magnetic junction memory cells, During a fifth write period subsequent to the fourth write period, the fourth local write driver is configured to receive the fourth write command from the global write driver and perform the fourth write operation on the plurality of fourth magnetic junction memory cells, and During the fifth write period, the third local write driver is configured to perform the third write operation on the plurality of third magnetic junction memory cells based on the third write command.

Description

Magnetic junction memory device and writing method thereof The application is a divisional application of the following application number 202010704346.5, application date 2020, 21, and the name of the application is magnetic junction memory device and writing method thereof. Technical Field The present disclosure relates to a magnetic junction memory device and a method of writing to the same. Background Random-access memory (RAM) may include volatile memory and nonvolatile memory. Volatile memory loses the data present therein whenever power is turned off, and nonvolatile memory retains its storage even when power is turned off. As a nonvolatile memory, a spin transfer torque magnetic random access memory (STT-MRAM) records data according to the resistance state of a magnetic tunnel junction (magnetic tunneling junction, MJT). That is, data can be written to the STT-MRAM by applying a write current to the memory cell to change the resistance state of the memory cell. However, during a write operation, it takes time to change the resistance state of the memory cell. Therefore, research is required to reduce the amount of time it takes to change the resistance state of the memory cell during a write operation. Disclosure of Invention Example embodiments of the present disclosure provide magnetic junction memory devices that can reduce the amount of time spent writing data. Example embodiments of the present disclosure provide a method of writing a magnetic junction memory device that can reduce the amount of time spent writing data. However, embodiments of the present disclosure are not limited to those set forth herein. The above and other embodiments of the present disclosure will become more readily apparent to those of ordinary skill in the art to which the present disclosure pertains by referencing the detailed description of the present disclosure given below. According to an embodiment of the present disclosure, there is provided a magnetic junction memory device comprising a first memory bank (bank) comprising a plurality of first magnetic junction memory cells, a first local write driver adjacent to the first memory bank and connected to the first global data line and the second global data line, the first local write driver configured to write data to the plurality of first magnetic junction memory cells via the first local data line and the second local data line, the second memory bank adjacent to the first memory bank and comprising a plurality of second magnetic junction memory cells, a second local write driver disposed adjacent to the second memory bank and connected to the first global data line and the second global data line, the second local write driver configured to write data to the plurality of second magnetic junction memory cells via the third local data line and the fourth local data line, the third local data line and the fourth local data line not being connected to the first local data line and the second local data line, the second local write driver configured to provide the first data line and the second global write driver with the first data line and the second global write driver via the first local data line and the second global data line. In accordance with the foregoing and other embodiments of the present disclosure, there is provided a magnetic junction memory device including a first local write driver adjacent to a first array of sub-memory cells including a plurality of first magnetic junction memory cells and configured to write first write data to the plurality of first magnetic junction memory cells via first and second local data lines, and a second local write driver adjacent to a second array of sub-memory cells including a plurality of second magnetic junction memory cells and configured to write second write data to the plurality of second magnetic junction memory cells via third and fourth local data lines, the third and fourth local data lines not being connected to the first and second local data lines, wherein the first write driver includes a first write latch configured to store the first write data to the second magnetic junction memory cells and the second write driver includes a second write latch configured to write the second write data to the second magnetic junction memory cells, the second write latch configured to the second write data to the second magnetic junction memory cells. In accordance with the foregoing and other embodiments of the present disclosure, there is provided a magnetic junction memory device including a global write driver configured to receive a first write command for a first memory bank including a plurality of first magnetic junction memory cells during a first write period and to receive a second write command for a second memory bank including a plurality of second magnetic junction memory cells during a second write period subsequent to the first write period, a first local write driver configured to receive the