CN-122024805-A - Method, device and equipment for testing EEPROM

Abstract

The embodiment of the application provides a method, a device and equipment for testing EEPROM. The method comprises the step of storing first data to the EEPROM to be tested based on the first read-write address. And reading first read data from the EEPROM to be tested based on the first read-write address, and reading second data from the EEPROM to be tested based on the second read-write address. The first read-write address is larger than or equal to the predicted capacity, the second read-write address is smaller than the predicted capacity, the difference between the first read-write address and the second read-write address is the predicted capacity, and the first data is different from the original data corresponding to the second read-write address. And determining the actual capacity of the EEPROM to be tested based on the first read data and the second data. The application is used for determining the actual capacity of the EEPROM.

Inventors

• ZHANG HONGMING
• WANG XIAOMENG
• ZHAO HAN
• RAN WEI
• Gan Yadan

Assignees

• 上汽通用五菱汽车股份有限公司

Dates

Publication Date

20260512

Application Date

20251211

Claims (10)

1. 1. A method of testing an EEPROM comprising: storing first data to an EEPROM to be tested based on the first read-write address; Reading first read data from the EEPROM to be tested based on the first read-write address, and reading second data from the EEPROM to be tested based on a second read-write address, wherein the first read-write address is larger than or equal to a predicted capacity, the second read-write address is smaller than the predicted capacity, a difference value between the first read-write address and the second read-write address is the predicted capacity, and the first data is different from original data corresponding to the second read-write address; and determining the actual capacity of the EEPROM to be tested based on the first read data and the second data.
2. 2. The method of claim 1, wherein determining the actual capacity of the EEPROM under test based on the first read data and the second data comprises: And determining that the actual capacity of the EEPROM to be tested is equal to the predicted capacity based on the first read data and the second data meeting a first condition, wherein the first read data and the second data are the same in the first condition.
3. 3. The method of claim 1, wherein determining the actual capacity of the EEPROM under test based on the first read data and the second data comprises: And determining that the actual capacity of the EEPROM to be tested is larger than the predicted capacity based on the first read data and the second data meeting a second condition, wherein in the second condition, the second data is original data corresponding to the second read-write address.
4. 4. The method of claim 3, wherein determining the actual capacity of the EEPROM under test based on the first read data and the second data further comprises: based on the fact that the actual capacity of the EEPROM to be tested is larger than the predicted capacity, and based on the first read-write address, storing corresponding original data into the EEPROM to be tested; Updating the predicted capacity, the first read-write address and the second read-write address, and jumping to the step of storing the first data to the EEPROM to be detected based on the first read-write address, wherein the updated predicted capacity is even times of the predicted capacity before updating, the difference between the updated first read-write address and the updated first read-write address is even times of the predicted capacity before updating, and the difference between the updated second read-write address and the updated second read-write address is odd times of the predicted capacity before updating.
5. 5. The method of claim 4, wherein the updated predicted capacity is 2 times greater than the pre-updated predicted capacity, wherein the difference between the updated first read-write address and the pre-updated first read-write address is the updated predicted capacity, and wherein the difference between the updated second read-write address and the pre-updated second read-write address is the pre-updated predicted capacity.
6. 6. The method of claim 1, wherein the first read-write address add n,0 satisfies: add n,0 =2 n+4 -offset The offset is a standard value, the standard value is greater than or equal to the byte length of the first data and less than or equal to 2 n +3 , n is a positive integer, and the initial value of n is a preset value; the predicted capacity is 2 n+3 .
7. 7. The method of claim 6, wherein determining the actual capacity of the EEPROM under test based on the first read data and the second data further comprises: based on the fact that the actual capacity of the EEPROM to be tested is larger than the predicted capacity, and based on the first read-write address, storing corresponding original data into the EEPROM to be tested; Updating the n value, and jumping to the step of storing the first data to the EEPROM to be tested based on the first read-write address, wherein the updated n value is larger than the n value before updating.
8. 8. The method of claim 1, further comprising determining whether read-write performance of the EEPROM under test is acceptable based on the first read data, the first data, and the second data.
9. 9. An apparatus for testing an EEPROM, comprising: The writing unit is used for storing first data to the EEPROM to be tested based on the first read-write address; The device comprises a read unit, a first read-write address and a second read-write address, wherein the read unit is used for reading first data from the EEPROM to be tested based on the first read-write address and reading second data from the EEPROM to be tested based on the second read-write address, the first read-write address is larger than or equal to a predicted capacity, the second read-write address is smaller than the predicted capacity, the difference value between the first read-write address and the second read-write address is the predicted capacity, and the first data is different from original data corresponding to the second read-write address; And the processing unit is used for determining the actual capacity of the EEPROM to be tested based on the first data and the second data.
10. 10. An apparatus, characterized in that, the device includes an EEPROM; wherein said EEPROM is tested on the basis of the method of any one of claims 1-8, And/or the apparatus comprises the device of claim 9.

Description

Method, device and equipment for testing EEPROM Technical Field The present application relates to the field of storage, and in particular, to a method, an apparatus, and a device for testing an EEPROM. Background EEPROM (ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY), electrically erasable programmable read only memory) is widely used in various electronic devices, such as controllers. In order to ensure the normal use of the electronic equipment in the later period, the EEPROM configured by the electronic equipment needs to be tested in the detection process of the electronic equipment. However, in the existing test method of the EEPROM, the test focus is on the read-write test of the EEPROM, and the address range of the read-write test is determined based on the design capacity. The test method is easy to cause inaccurate test results, for example, when the actual capacity of the EEPROM to be tested is larger or smaller than the design capacity, the test results can still pass through the test results according to the existing test method, and the passing of the test results can be judged as qualified read-write test and the test capacity is the design capacity, so that the capacity test results are wrong. Disclosure of Invention In view of the above, the embodiments of the present application provide a method, apparatus and device for testing an EEPROM to determine the actual capacity of the EEPROM. In a first aspect, an embodiment of the present application provides a method for testing an EEPROM, including: storing first data to an EEPROM to be tested based on the first read-write address; Reading first read data from the EEPROM to be tested based on the first read-write address, and reading second data from the EEPROM to be tested based on a second read-write address, wherein the first read-write address is larger than or equal to a predicted capacity, the second read-write address is smaller than the predicted capacity, a difference value between the first read-write address and the second read-write address is the predicted capacity, and the first data is different from original data corresponding to the second read-write address; and determining the actual capacity of the EEPROM to be tested based on the first read data and the second data. In a possible implementation manner of the first aspect, determining the actual capacity of the EEPROM to be tested based on the first read data and the second data includes: And determining that the actual capacity of the EEPROM to be tested is equal to the predicted capacity based on the first read data and the second data meeting a first condition, wherein the first read data and the second data are the same in the first condition. In a possible implementation manner of the first aspect, determining the actual capacity of the EEPROM to be tested based on the first read data and the second data includes: And determining that the actual capacity of the EEPROM to be tested is larger than the predicted capacity based on the first read data and the second data meeting a second condition, wherein in the second condition, the second data is original data corresponding to the second read-write address. In a possible implementation manner of the first aspect, determining the actual capacity of the EEPROM under test based on the first read data and the second data further includes: based on the fact that the actual capacity of the EEPROM to be tested is larger than the predicted capacity, and based on the first read-write address, storing corresponding original data into the EEPROM to be tested; Updating the predicted capacity, the first read-write address and the second read-write address, and jumping to the step of storing the first data to the EEPROM to be detected based on the first read-write address, wherein the updated predicted capacity is even times of the predicted capacity before updating, the difference between the updated first read-write address and the updated first read-write address is even times of the predicted capacity before updating, and the difference between the updated second read-write address and the updated second read-write address is odd times of the predicted capacity before updating. In a possible implementation manner of the first aspect, the updated predicted capacity is 2 times the predicted capacity before the update, the difference between the updated first read-write address and the first read-write address before the update is the updated predicted capacity, and the difference between the updated second read-write address and the second read-write address before the update is the predicted capacity before the update. In a possible implementation manner of the first aspect, the first read-write address add n,0 satisfies: addn,0=2n+4-offset The offset is a standard value, the standard value is greater than or equal to the byte length of the first data and less than or equal to 2 n+3, n is a positive integer, and the initial v