Search

CN-122025418-A - Preparation process of small-sized patch ceramic capacitor

CN122025418ACN 122025418 ACN122025418 ACN 122025418ACN-122025418-A

Abstract

The invention discloses a preparation process of a small-sized chip ceramic capacitor, and relates to the technical field of electronic component manufacturing. The method comprises the following steps of S1 preparing ceramic dielectric slurry, S2 preparing a raw ceramic tape from the ceramic dielectric slurry through a tape casting forming process, S3 printing inner electrode slurry on the raw ceramic tape, S4 alternately stacking a plurality of layers of raw ceramic chips printed with inner electrode patterns, and carrying out hot pressing lamination to form a composite raw compact, S5 cutting the composite raw compact into a single capacitor chip green compact, S6 degreasing and cofiring the capacitor chip green compact in a protective atmosphere, and S7 coating end electrode slurry at two ends of the ceramic chip, and sintering to form an end electrode to obtain a small-sized chip ceramic capacitor finished product. By adopting superfine ceramic powder and an optimized slurry formula and combining high-precision casting, an ultrathin and uniform dielectric layer can be prepared, and a foundation is laid for miniaturization and high capacity of the capacitor.

Inventors

  • CHU XIAOLAN
  • LUO YACHENG
  • ZHANG JIANGANG
  • LU LIJUAN
  • HU LIJUAN
  • CHEN XINGXING

Assignees

  • 泗阳群鑫电子有限公司

Dates

Publication Date
20260512
Application Date
20260401

Claims (9)

  1. 1. The preparation process of the small-sized patch ceramic capacitor is characterized by comprising the following steps of: s1, preparing ceramic dielectric slurry; s2, preparing the ceramic dielectric paste into a green ceramic tape through a tape casting forming process; s3, printing inner electrode slurry on the raw porcelain belt to form an inner electrode pattern; s4, alternately stacking the multilayer green ceramic chips printed with the internal electrode patterns, and carrying out hot-pressing lamination to form a composite green compact; s5, cutting the composite green body block into single capacitor chip green bodies; S6, degreasing and cofiring the green body of the capacitor chip in a protective atmosphere to form a compact ceramic chip; And S7, coating end electrode slurry at two ends of the ceramic chip, and sintering to form end electrodes to obtain the finished product of the small-sized patch ceramic capacitor.
  2. 2. The preparation process of the small-sized patch ceramic capacitor according to claim 1, wherein in the step S1, the ceramic dielectric paste comprises, by weight, 100 parts of ceramic powder, 5-10 parts of an organic binder, 30-50 parts of an organic solvent, 0.3-1 part of a dispersing agent and 1-3 parts of a plasticizer.
  3. 3. The process for preparing the small-sized patch ceramic capacitor according to claim 2, wherein the ceramic powder is a barium titanate-based dielectric material, the average particle diameter D50 of the ceramic powder is 100-300nm, the particle size distribution satisfies D90/D10 of 4.0 or less, and the organic binder is a mixture of at least two of polyvinyl butyral, polyacrylate and ethyl cellulose.
  4. 4. The process for manufacturing a small chip ceramic capacitor according to claim 1, wherein in the step S2, the gap between the doctor blades is controlled to be 3-20 μm during casting, the drying temperature is 40-80 ℃, the thickness of the formed green ceramic tape is 1.5-10 μm, and the thickness tolerance is controlled to be within + -5%.
  5. 5. The process for preparing the small-sized chip ceramic capacitor according to claim 1, wherein in the step S3, the internal electrode paste is nickel paste, copper paste or silver palladium paste, the printing is performed by adopting a high-precision screen printing or gravure printing process, the mesh number of a printing screen is 200-400 meshes, the line width of an internal electrode pattern after printing is 20-200 mu m, and the alignment precision is better than +/-10 mu m.
  6. 6. The process for manufacturing a small chip ceramic capacitor according to claim 1, wherein in the step S4, the hot-pressing lamination is performed under vacuum or an inert gas atmosphere, the hot-pressing temperature is 50-80 ℃, the pressure is 10-50MPa, and the dwell time is 10-60 minutes.
  7. 7. The process for manufacturing a small-sized chip ceramic capacitor according to claim 1, wherein the step S6 comprises: S61, degreasing treatment, namely raising the temperature to 300-500 ℃ at a temperature raising rate of 0.5-3 ℃ per minute in air or low oxygen partial pressure atmosphere and preserving the temperature for 1-5 hours so as to completely remove organic matters in the green compact of the capacitor chip; S62, co-firing treatment, namely raising the temperature to the sintering peak temperature of 1100-1350 ℃ at the temperature raising rate of 2-10 ℃ per minute under the reducing protective atmosphere, preserving the temperature for 1-5 hours, and then cooling to below 600 ℃ at the cooling rate of 1-5 ℃ per minute.
  8. 8. The process for manufacturing a small chip ceramic capacitor according to claim 7, wherein in the step S62, the reducing protective atmosphere is a mixed gas of nitrogen and hydrogen, wherein the hydrogen is 0.5% -5% by volume or a mixed gas of carbon monoxide and nitrogen, and the heating rate of the co-firing treatment in the stage of 800 ℃ is lower than that in the stage of 800 ℃ or lower.
  9. 9. The process for preparing a small chip ceramic capacitor according to claim 1, wherein in step S7, the end electrode paste is copper paste, silver paste or silver palladium paste containing glass powder, the sintering is performed in air, the sintering temperature is 600-850 ℃, and the heat preservation time is 10-30 minutes.

Description

Preparation process of small-sized patch ceramic capacitor Technical Field The invention relates to the technical field of electronic component manufacturing, in particular to a preparation process of a small-sized chip ceramic capacitor. Background The chip multilayer ceramic capacitor (MLCC) has the advantages of small volume, large capacity, good high-frequency characteristic, high reliability and the like, and is one of the most widely applied passive elements in modern electronic circuits. With the development of consumer electronics and communication equipment toward light weight, short weight and high performance, higher demands are being made on miniaturization (such as 01005 and 0201 sizes) and ultra-large capacity of MLCCs. The traditional MLCC preparation process faces many challenges when the process is developed to microminiaturization, namely extremely high lamination alignment precision requirement is caused by the increase of the number of dielectric layers and internal electrodes, uneven ceramic compactness and defects are easily caused in the sintering process due to the reduction of the thickness of the dielectric layers, and poor layering, cracking and the like are easily caused due to the increase of the difficulties in matching the thermal expansion coefficients of the internal electrodes and the ceramic dielectric and controlling co-firing shrinkage. These factors directly affect the capacity consistency, mechanical strength, and service life of the ultra-small MLCCs. Therefore, an advanced preparation process capable of precisely controlling each process and suitable for the large-scale production of the ultra-small MLCCs is needed. Disclosure of Invention Aiming at the defects of the prior art, the invention provides a preparation process of a small-sized patch ceramic capacitor, which solves the problems in the prior art. In order to achieve the above purpose, the invention is realized by the following technical scheme: a preparation process of a small-sized patch ceramic capacitor comprises the following steps: s1, preparing ceramic dielectric slurry; s2, preparing the ceramic dielectric paste into a green ceramic tape through a tape casting forming process; s3, printing inner electrode slurry on the raw porcelain belt to form an inner electrode pattern; s4, alternately stacking the multilayer green ceramic chips printed with the internal electrode patterns, and carrying out hot-pressing lamination to form a composite green compact; s5, cutting the composite green body block into single capacitor chip green bodies; S6, degreasing and cofiring the green body of the capacitor chip in a protective atmosphere to form a compact ceramic chip; And S7, coating end electrode slurry at two ends of the ceramic chip, and sintering to form end electrodes to obtain the finished product of the small-sized patch ceramic capacitor. Preferably, in the step S1, the ceramic dielectric paste comprises, by weight, 100 parts of ceramic powder, 5-10 parts of an organic binder, 30-50 parts of an organic solvent, 0.3-1 part of a dispersing agent and 1-3 parts of a plasticizer. Preferably, the ceramic powder is a barium titanate-based dielectric material, the average particle diameter D50 of the ceramic powder is 100-300nm, the particle diameter distribution is smaller than or equal to 4.0 and satisfies D90/D10, and the organic binder is a mixture of at least two of polyvinyl butyral, polyacrylate and ethylcellulose. Preferably, in the step S2, the gap of the doctor blade is controlled to be 3-20 mu m, the drying temperature is 40-80 ℃, the thickness of the formed green porcelain tape is 1.5-10 mu m, and the thickness tolerance is controlled to be within +/-5%. Preferably, in the step S3, the internal electrode slurry is nickel slurry, copper slurry or silver palladium slurry, the printing adopts a high-precision screen printing or gravure printing process, the mesh number of the printing screen is 200-400 mesh, the line width of the printed internal electrode pattern is 20-200 mu m, and the alignment precision is better than +/-10 mu m. Preferably, in the step S4, the hot-pressing lamination is performed under vacuum or inert gas protection environment, the hot-pressing temperature is 50-80 ℃, the pressure is 10-50MPa, and the dwell time is 10-60 minutes. Preferably, step S6 specifically includes: S61, degreasing treatment, namely raising the temperature to 300-500 ℃ at a temperature raising rate of 0.5-3 ℃ per minute in air or low oxygen partial pressure atmosphere and preserving the temperature for 1-5 hours so as to completely remove organic matters in the green compact of the capacitor chip; S62, co-firing treatment, namely raising the temperature to the sintering peak temperature of 1100-1350 ℃ at the temperature raising rate of 2-10 ℃ per minute under the reducing protective atmosphere, preserving the temperature for 1-5 hours, and then cooling to below 600 ℃ at the cooling rate of 1-5 ℃ per minute.