CN-122026831-A - Harmonic suppression switch capacitor power amplifier and method based on digital waveform synthesis

CN122026831ACN 122026831 ACN122026831 ACN 122026831ACN-122026831-A

Abstract

The invention discloses a harmonic suppression switch capacitor power amplifier and a method based on digital waveform synthesis, and belongs to the technical field of wireless communication. The amplifier comprises a multiphase generator, a quadrant selection module, a waveform synthesis logic circuit, a switch array and a matching network which are sequentially connected. The switch array is formed by connecting a plurality of switch units in parallel, and each switch unit comprises a power supply charging path, a discharging path and a charge redistribution path connected therebetween. The waveform synthesis logic circuit generates a plurality of time sequence control signals and drives the switching tube in each path to redistribute the capacitance charges, so that a preset multilevel stepped voltage waveform is directly synthesized at the differential output end. The waveform can significantly suppress the second, third and fourth harmonic components in the frequency domain. The invention can realize high-efficiency harmonic suppression without an external filter, has the advantages of high integration level, high efficiency and high frequency spectrum purity, and is particularly suitable for a wireless communication system with the frequency band lower than 1 GHz.

Inventors

YANG BINGZHENG
LIANG XIQING
LUO XUN

Assignees

深圳大学

Dates

Publication Date: 20260512
Application Date: 20260130

Claims (9)

1. A harmonic rejection switched capacitor power amplifier based on digital waveform synthesis, comprising: A multi-phase generator for generating multi-phase clock signals having different phases; the input end of the quadrant selection module is connected with the output end of the multiphase generator, and is used for receiving the multiphase clock signals and the phase information of the input signals, and selecting and outputting a group of multiphase signals corresponding to the quadrants according to the phase information; the input end of the waveform synthesis logic circuit is connected with the output end of the quadrant selection module, digital combination logic is contained in the waveform synthesis logic circuit and is configured to perform logic operation on the received group of multiphase signals to generate and output multipath control signals; The control end of the switch array is connected with the output end of the waveform synthesis logic circuit, and the output end of the switch array is connected with the matching network; the input end of the matching network is connected with the first output nodes and the second output nodes of all the switch units in the switch array, and the output end of the matching network is used for connecting a load; the waveform synthesis logic circuit controls the on and off time sequence of each switch tube in each switch unit in the switch array through the multipath control signals output by the waveform synthesis logic circuit, so that the differential output end of the switch array generates a multi-level step-shaped differential voltage waveform with a preset shape, and the waveform has a suppression effect on harmonic components of specific orders in a frequency domain.
2. A harmonic rejection switched capacitor power amplifier based on digital waveform synthesis as in claim 1 wherein in each of said switching elements: a first capacitor having one end connected to the first output node; a second capacitor having one end connected to the second output node; A power supply charging path connected between a first power supply node and the other end of the first capacitor, for selectively charging the first capacitor to the potential of the first power supply node under the control of at least one first control signal; A discharging path connected between a second power supply node and the other end of the second capacitor, for selectively discharging the second capacitor to the potential of the second power supply node under the control of at least one second control signal; And the charge redistribution path is connected between the other end of the first capacitor and the other end of the second capacitor and is used for selectively sharing charges between the first capacitor and the second capacitor under the control of at least one third control signal.
3. The harmonic rejection switched capacitor power amplifier of claim 2 wherein the multiplexed control signal generated by the waveform synthesis logic circuit comprises control signals for controlling the power supply charge path, discharge path and charge redistribution path to turn on and off, the waveforms being for alternately or sequentially outputting stepped waveforms comprising a plurality of different voltage levels relative to a reference ground potential at a single duty cycle at a first output node and a second output node of the switching element.
4. A harmonic rejection switched capacitor power amplifier based on digital waveform synthesis as claimed in any one of claims 1 and 3 wherein the coefficients of the second, third and fourth harmonic components in the fourier expansion of the predetermined shaped multi-level stepped differential voltage waveform are designed to be minimized or zero to achieve rejection at the second, third and fourth harmonics of the fundamental frequency.
5. The harmonic rejection switched capacitor power amplifier as in claim 1 wherein first output nodes of a plurality of switching elements in said switching array are connected to each other to form a first total output node and second output nodes are connected to each other to form a second total output node; The differential input ends of the matching network are respectively connected to the first total output node and the second total output node.
6. The harmonic rejection switched capacitor power amplifier of claim 5 wherein said polyphase generator is a six-phase generator, said set of polyphase signals output by said quadrant selection module is six-way, said waveform synthesis logic circuit receives said six-way signals and generates at least six control signals, said switched capacitor power amplifier being a six-phase architecture.
7. A harmonic suppression method based on digital waveform synthesis, applicable to the harmonic suppression switched capacitor power amplifier based on digital waveform synthesis as claimed in any one of claims 1 to 5, comprising: generating a multiphase clock signal by a multiphase generator; selecting a group of multiphase signals corresponding to the quadrants from the multiphase clock signals according to the phase information of the input signals through a quadrant selection module; performing digital logic processing on the group of multiphase signals through a waveform synthesis logic circuit to generate a plurality of paths of control signals with specific time sequence relations; Using the multipath control signals to control the switching tubes in each switching unit in the switch array to be turned on and turned off according to a preset sequence; The control process enables a power supply charging path, a discharging path and a charge redistribution path in each switch unit to be activated sequentially or alternately, so that a multi-level stepped voltage waveform is synthesized at a differential output end of the switch array; the multilevel stepped voltage waveform is output to a load through a matching network, and harmonic components of specific orders are restrained in the frequency spectrum of the waveform.
8. The harmonic suppression method of claim 7, wherein the control process comprises: In a first phase, activating the power supply charging path to charge the first capacitor, and simultaneously turning off the discharging path and the charge redistribution path; In a second phase, turning off the power supply charging path, activating the charge redistribution path, and performing charge sharing between the first capacitor and the second capacitor; in a third phase, the charge redistribution path is turned off, the discharge path is activated, and the second capacitor is discharged; the multi-level stepped voltage waveform is formed at the differential output terminal by repeating and phase-interleaving the above-described process of controlling the plurality of switching units.
9. The method of harmonic suppression according to claim 8, further comprising: According to the amplitude and/or phase information of the digital baseband modulation signal, the number of the switch units in an effective working state in the switch array or the duty ratio of control signals in each switch unit is dynamically adjusted, so that the amplitude and phase modulation of the signal is completed while harmonic suppression is realized, and the power rollback efficiency is improved.

Description

Harmonic suppression switch capacitor power amplifier and method based on digital waveform synthesis Technical Field The invention relates to the technical field of wireless communication, in particular to a harmonic suppression switch capacitor power amplifier and a method based on digital waveform synthesis. Background With the development of wireless communication technology, especially the development of the satellite internet of things, higher requirements are put forward on a radio frequency power amplifier working in a frequency band lower than 1GHz, high output power and high efficiency are required, and the output signal has extremely high spectral purity so as to avoid interference of harmonic waves and strays on adjacent frequency bands. Digital Power Amplifiers (DPAs), particularly Switched Capacitor Power Amplifiers (SCPAs), are of great interest because of their high power efficiency and high integration advantages. However, the DPA of the conventional switch-mode operation inevitably generates rich harmonic components (e.g., second and third harmonics) while outputting the target fundamental wave signal. These harmonics, if inadequately suppressed, can severely interfere with other frequency band wireless systems. The prior art mainly adopts two approaches to solve the problem, namely adding an on-chip or off-chip filter at the output end of the amplifier, which increases the system area, the cost and possibly introduces insertion loss, and secondly, suppressing harmonic waves by improving a circuit architecture, such as adopting multiphase synthesis or local oscillation signals with specific duty ratios. However, these improvements often have limitations, such as the need to sacrifice part efficiency, increase circuit complexity, require stringent layout symmetry requirements, or can only suppress specific order harmonics, and it is difficult to achieve effective suppression of multiple main harmonic components within a wideband while maintaining high efficiency and high integration. Therefore, a new SCPA architecture and operating method are urgently needed that can effectively suppress harmonics from the signal generation mechanism without requiring additional filtering networks, while maintaining high efficiency and good signal modulation capability. Disclosure of Invention The invention aims to provide a harmonic suppression switch capacitor power amplifier based on digital waveform synthesis, which is used for solving the technical problems. The technical scheme of the invention is realized as follows: In one aspect, the embodiment of the invention provides a harmonic suppression switch capacitor power amplifier based on digital waveform synthesis, which comprises a multiphase generator, a quadrant selection module, a waveform synthesis logic circuit, a switch array, a matching network and a waveform synthesis logic circuit, wherein the multiphase generator is used for generating multiphase clock signals with different multipath phases, the quadrant selection module is connected with the output end of the multiphase generator and is used for receiving phase information of the multiphase clock signals and the input signals and selecting and outputting a group of multiphase signals corresponding to quadrants according to the phase information, the waveform synthesis logic circuit is connected with the output end of the quadrant selection module and internally comprises digital combination logic and is used for carrying out logic operation on the group of received multiphase signals to generate and output multipath control signals, the control end of the switch array is connected with the output end of the waveform synthesis logic circuit and is connected with the matching network, the switch array comprises a plurality of parallel switch units, the input end of the matching network is connected with a first output node and a second output node of all switch units in the switch array, the output end of the matching network is used for being connected with a load, the waveform synthesis logic circuit is used for controlling the multipath control signals output by the waveform synthesis logic circuit, the switch units in the switch array to generate differential voltage-order waveform-shaped harmonic-order-shaped switching-turn-off waveform components in each switch unit to have a preset waveform-step-down order waveform level. Optionally, in each of the switching units: a first capacitor having one end connected to the first output node; a second capacitor having one end connected to the second output node; A power supply charging path connected between a first power supply node and the other end of the first capacitor, for selectively charging the first capacitor to the potential of the first power supply node under the control of at least one first control signal; A discharging path connected between a second power supply node and the other end of the second capacitor, for selectively dis