Search

CN-122026856-A - CTLE (positive working line) based on single amplifier and having direct current offset and common mode voltage modulation functions

CN122026856ACN 122026856 ACN122026856 ACN 122026856ACN-122026856-A

Abstract

The invention discloses a single-amplifier-based CTLE with direct current offset and common mode voltage modulation functions, which mainly solves the technical problems that the direct current working point of the traditional CTLE is easily affected by process deviation, common mode voltage of input signals and current mismatch, an additional direct current offset elimination loop is needed, and design and area complexity are increased. The CTLE of the present invention includes a first-stage equalization unit EQ1, a second-stage equalization unit EQ2, a low-pass filter LPF, a frequency compensation unit, and an offset and common-mode multiplexing amplifier OCMA. The CTLE adopts the single offset and common mode multiplexing amplifier OCMA, and simultaneously completes DC offset elimination and DC output control, thereby being capable of reducing design and area complexity.

Inventors

  • DONG SIWAN
  • LI XIAOHUI
  • ZHU JUNWEI
  • TONG XINGYUAN

Assignees

  • 西安邮电大学

Dates

Publication Date
20260512
Application Date
20260413

Claims (10)

  1. 1. A CTLE based on a single amplifier and having dc offset and common mode voltage modulation functions, characterized by: the low-pass filter comprises a first-stage equalization unit EQ1, a second-stage equalization unit EQ2, a low-pass filter LPF, a frequency compensation unit and a detuning and common-mode multiplexing amplifier OCMA; the input high end and the input low end of the first-stage equalization unit EQ1 are respectively used for receiving external differential input signals And The output high end and the output low end are respectively connected with the input high end and the input low end of the second-stage equalization unit EQ2, and the first-stage equalization unit EQ1 is used for differentially inputting signals And Performing preliminary high-frequency compensation and gain adjustment; the second-stage equalization unit EQ2 is used for performing further high-frequency compensation and gain adjustment on the signal output by the first-stage equalization unit EQ1 to obtain a differential output signal And ; The input high end and the input low end of the low pass filter LPF are respectively connected with the output high end and the output low end of the second-stage equalization unit EQ2, and the output high end and the output low end are respectively connected with the input high end and the input low end of the frequency compensation unit; the first output high end and the first output low end of the frequency compensation unit are respectively connected with the input high end and the input low end of the offset and common mode multiplexing amplifier OCMA, and the second output high end and the second output low end are respectively connected with the output high end and the output low end of the offset and common mode multiplexing amplifier OCMA; The output high end and the output low end of the offset and common mode multiplexing amplifier OCMA are respectively connected with the two tail current control ends of the first-stage equalization unit EQ1 through the intermediate buffer stage SF to form a direct current offset elimination loop, and the common mode feedback end of the offset and common mode multiplexing amplifier OCMA is connected with the feedback end of the first-stage equalization unit EQ1 to form a direct current output control loop.
  2. 2. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function according to claim 1, characterized by: the offset and common mode multiplexing amplifier OCMA comprises a differential input stage, a common source common gate gain stage, an output stage and a common mode feedback stage; The input high end and the input low end of the differential input stage are respectively connected with the first output high end and the first output low end of the frequency compensation unit, and the output high end and the output low end are respectively connected with the input high end and the input low end of the cascode gain stage; the output high end and the output low end of the cascode gain stage are respectively connected with the input high end and the input low end of the output stage; the output high end and the output low end of the output stage are respectively connected with the two tail current control ends of the first-stage equalization unit EQ1 through the intermediate buffer stage SF, and are respectively connected with the input high end and the input low end of the common-mode feedback stage; the output end of the common mode feedback stage is used as the common mode feedback end of the offset and common mode multiplexing amplifier OCMA and is connected with the feedback end of the first-stage equalization unit EQ 1.
  3. 3. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function according to claim 2, characterized by: The differential input stage comprises a PMOS tube PMOS tube And PMOS tube ; The PMOS tube The source electrode of the transistor is connected with the external power supply voltage VDD, and the gate electrode is connected with the external bias voltage The drain electrodes are respectively connected with the PMOS tube And PMOS tube A source of (a); the PMOS tube And PMOS tube The gates of the differential input stage are used as the input high end and the input low end of the differential input stage for respectively receiving the normal phase input signals output by the first output high end and the first output low end of the frequency compensation unit And inverting the input signal ; The cascode gain stage comprises a PMOS tube PMOS tube PMOS tube PMOS tube NMOS tube NMOS tube NMOS tube NMOS tube NMOS tube And NMOS tube ; The PMOS tube And PMOS tube The sources of the voltage source are connected with an external power supply voltage VDD, and the gates are commonly connected with an external bias voltage The PMOS tube Drain electrode of (C) is connected with PMOS tube Source electrode of the PMOS tube Drain electrode of (C) is connected with PMOS tube A source of (a); the PMOS tube And PMOS tube Is commonly connected with an external bias voltage The PMOS tube The drain electrodes of the N-channel metal oxide semiconductor (NMOS) tubes are respectively connected with Drain electrode of NMOS transistor Gate and NMOS transistor of (c) A grid electrode of the PMOS tube The drain electrodes of the N-channel metal oxide semiconductor (NMOS) tubes are respectively connected with Drain electrode of NMOS transistor Gate and NMOS transistor of (c) A gate electrode of (a); the NMOS tube The source electrodes of (a) are respectively connected with NMOS tubes NMOS tube And PMOS tube The drain electrode of the NMOS tube The source electrodes of (a) are respectively connected with NMOS tubes NMOS tube And PMOS tube The drain electrode of the NMOS tube And NMOS tube Is commonly connected with an external bias voltage ; The NMOS tube NMOS tube NMOS tube And NMOS tube Is commonly grounded; The output stage comprises a PMOS tube PMOS tube NMOS tube And NMOS tube ; The PMOS tube And PMOS tube Is commonly connected with an external power supply voltage VDD; the PMOS tube Is connected with PMOS tube Drain electrode of the NMOS transistor A drain electrode of (2); the PMOS tube Is connected with PMOS tube Drain electrode of the NMOS transistor A drain electrode of (2); the NMOS tube And NMOS tube Is commonly grounded; the NMOS tube And NMOS tube The drains of (a) are respectively used as the output high ends of the offset and common mode multiplexing amplifier OCMA And output low end The two tail current control ends of the first-stage equalization unit EQ1 are respectively connected through an intermediate buffer stage SF; The common mode feedback stage includes a resistor Resistance of resistor PMOS tube PMOS tube PMOS tube NMOS tube And NMOS tube ; The resistor And a resistor One end of each is connected with NMOS tube And NMOS tube The other end of the drain electrode is connected with the PMOS tube A gate electrode of (a); the PMOS tube The source electrode of the transistor is connected with the external power supply voltage VDD, and the gate electrode is connected with the external bias voltage The drain electrodes are respectively connected with the PMOS tube And PMOS tube A source of (a); the PMOS tube The drain electrodes of the N-channel metal oxide semiconductor (NMOS) tubes are respectively connected with Drain electrode of NMOS transistor Gate and NMOS transistor of (c) A gate electrode of (a); the PMOS tube Is connected with an external reference voltage Drain electrode is connected with NMOS tube Drain electrodes of the NMOS transistor are respectively connected with the NMOS transistor And NMOS tube And the connected node is used as the output end of the common mode feedback stage to output control voltage ; The NMOS tube And NMOS tube Is commonly grounded.
  4. 4. A CTLE based on a single amplifier and having dc offset and common mode voltage modulation functions according to any of claims 1-3, characterized by: The first-stage equalization unit EQ1 includes a first differential input pair, a first load network, a first source degeneration network, a first tail current source group, and a first detection unit; The second-stage equalization unit EQ2 comprises a second differential input pair, a second load network, a second source degeneration network, a second tail current source group, and a second detection unit The input high end and the input low end of the first differential input pair are respectively used for receiving external differential input signals And The two ends of the first detection unit are respectively connected with the output high end and the output low end of the first differential input pair, and the two connecting ends of the first differential input pair are respectively connected with the two connecting ends of the first tail current source group through a first source degeneration network; the output high end and the output low end of the second differential input pair are respectively connected with an external receiver and are respectively connected with two connecting ends of a second load network, the two ends of the second detection unit are respectively connected with the output high end and the output low end of the second differential input pair, and the two connecting ends of the second differential input pair are respectively connected with the two connecting ends of the second tail current source group through a second source degeneration network.
  5. 5. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function as claimed in claim 4, characterized by: the first differential input pair comprises NMOS transistors And NMOS tube The second differential input pair comprises NMOS transistors And NMOS tube ; The first load network includes an adjustable load resistor And an adjustable load resistor The second load network includes a load resistor And a load resistor ; The first source degeneration network includes adjustable source resistors arranged in parallel And a tunable source capacitance The second source degeneration network includes adjustable source resistors arranged in parallel And a tunable source capacitance ; The first tail current source group comprises adjustable tail current sources Tail current source Tail current source And an adjustable tail current source The second tail current source group comprises tail current sources Sum tail current source ; The first detection unit comprises detection resistors with one ends connected with each other And a detection resistor The second detection unit comprises detection resistors with one ends connected with each other And a detection resistor ; The NMOS tube And NMOS tube The gates of (2) are respectively used for receiving external differential input signals And ; The NMOS tube And NMOS tube The drain electrodes of the N-channel metal oxide semiconductor (NMOS) tubes are respectively connected with And NMOS tube The grid electrodes are respectively connected with the detection resistor And a detection resistor And an adjustable load resistor And an adjustable load resistor Is a member of the group; The adjustable load resistor And an adjustable load resistor The other end of the first equalization unit EQ1 is respectively connected with an external power supply voltage VDD, and the control end is used as a feedback end of the first equalization unit EQ1 and is commonly connected with a common mode feedback end of the offset and common mode multiplexing amplifier OCMA; the NMOS tube The source electrodes of the (a) are respectively connected with an adjustable source resistor And a tunable source capacitance Is provided, and an adjustable tail current source Sum tail current source Is a positive end of (2); the NMOS tube The source electrodes of the (a) are respectively connected with an adjustable source resistor And a tunable source capacitance At the other end of the transformer and a tail current source And an adjustable tail current source Is a positive end of (2); The adjustable tail current source Tail current source Tail current source And an adjustable tail current source Respectively grounded at the negative terminals; The adjustable tail current source And an adjustable tail current source The control ends of the first tail current source group are used as two tail current control ends of the first tail current source group and are respectively connected with two output ends of the intermediate buffer stage SF; the NMOS tube And NMOS tube The drains of the two transistors are respectively connected with an external receiver and are respectively connected with a detection resistor And a detection resistor Another end of (a) load resistor And a load resistor An input low end and an input high end of the low pass filter LPF; The load resistor And a load resistor The other ends of the two circuits are respectively connected with an external power supply voltage VDD; the NMOS tube The source electrodes of the (a) are respectively connected with an adjustable source resistor And a tunable source capacitance And a tail current source Is a positive end of (2); the NMOS tube The source electrodes of the (a) are respectively connected with an adjustable source resistor And a tunable source capacitance At the other end of the transformer and a tail current source Is a positive end of (2); The tail current source Sum tail current source Respectively, are grounded.
  6. 6. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function according to claim 1, characterized by: the low pass filter LPF comprises a filter resistor Filter resistor Filter capacitor And a filter capacitor ; The filter resistor And a filter resistor One end of the filter capacitor is respectively connected with the high output end and the low output end of the second-stage equalization unit EQ2, and the other end is respectively connected with the filter capacitor And a filter capacitor Two connected nodes are respectively used as output nodes and are connected with the input high end and the input low end of the frequency compensation unit; the filter capacitor And a filter capacitor The other ends of the two wires are respectively grounded.
  7. 7. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function as claimed in claim 6, characterized by: the frequency compensation unit comprises a compensation resistor Compensating resistor Compensating capacitor Compensating capacitor ; The compensation resistor Compensation resistor One end of the output node is respectively used as an input high end and an input low end of the frequency compensation unit and is respectively connected with two output nodes; The compensation resistor Compensation resistor The other ends of the two ends are respectively connected with compensation capacitors Compensating capacitor Is connected to the input high end and the input low end of the offset and common mode multiplexing amplifier OCMA, respectively; The compensation capacitor Compensating capacitor The other end of the common mode multiplexer OCMA is connected to the output high end and the output low end of the offset and common mode multiplexer respectively.
  8. 8. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function according to claim 1, characterized by: The low-frequency feedback unit is also included; The input high end and the input low end of the low-frequency feedback unit are respectively connected with the output high end and the output low end of the low-pass filter LPF, the output high end and the output low end are respectively connected with the input high end and the input low end of the second-stage equalization unit EQ2, and the low-frequency feedback unit is used for feeding back the low-pass filtered differential output signal to the input end of the second-stage equalization unit EQ2 so as to provide low-frequency gain improvement; The intermediate buffer stage SF includes a source follower SF1 and a source follower SF2; The input ends of the source follower SF1 and the source follower SF2 are respectively connected with the output low end and the output high end of the offset common mode multiplexing amplifier OCMA, and the output ends are respectively connected with the two tail current control ends of the first-stage equalization unit EQ 1.
  9. 9. The CTLE based on single amplifier and with dc offset and common mode voltage modulation function as claimed in claim 8, characterized by: The low-frequency feedback unit is a transconductance amplifier Comprises NMOS tube NMOS tube Sum tail current source ; The NMOS tube And NMOS tube The gates of the (C) are respectively used as the input high ends of the low-frequency feedback unit And input low end The output high end and the output low end of the low pass filter LPF are respectively connected; the NMOS tube And NMOS tube Is commonly connected with a tail current source The tail current source Is grounded; the NMOS tube And NMOS tube The drains of the (a) are respectively used as the output high ends of the low-frequency feedback unit And output low end The input high end and the input low end of the second equalization unit EQ2 are respectively connected.
  10. 10. CTLE based on a single amplifier and with direct current offset and common mode voltage modulation functions according to claim 8 or 9, characterized in that: the source follower SF1 comprises an NMOS tube And a resistor ; The source follower SF2 comprises an NMOS tube And a resistor ; The NMOS tube And NMOS tube The gates of the (a) are respectively the input ends of the source follower SF1 And the input of source follower SF2 The output low end and the output high end of the offset and common mode multiplexing amplifier OCMA are respectively connected; the NMOS tube And NMOS tube The drains of the transistors are respectively connected with an external power supply voltage VDD; the NMOS tube And NMOS tube The source electrodes of (a) are respectively connected with resistors And a resistor And respectively serve as the output terminal of the source follower SF1 And the output of source follower SF2 Two tail current control ends of the first-stage equalization unit EQ1 are respectively connected; The resistor And a resistor The other ends of the two wires are respectively grounded.

Description

CTLE (positive working line) based on single amplifier and having direct current offset and common mode voltage modulation functions Technical Field The present invention relates to CTLE (continuous time linear equalizer), and more particularly, to CTLE with dc offset and common mode voltage modulation based on a single amplifier. Background As data center, cloud computing, etc. applications continue to increase in data transmission rates, the signal integrity of high-speed serial links presents a significant challenge. Signals, when transmitted over bandwidth limited channels, suffer from severe intersymbol interference (ISI), resulting in closed eye diagrams and increased bit error rates. Equalization techniques are one of the key means to overcome ISI. CTLE is widely used in the front end of the receiver because of its ability to compensate for high frequency loss of the channel, no need for clocks, and the ability to handle inter-precursor interference. However, the conventional CTLE design has several limitations, namely, firstly, the frequency response is shaped by only one pair of poles, the equalization capability of the multi-voltage signals such as PAM4 is limited under high data rate (such as 56 Gb/s), and the eye pattern opening of the intermediate voltage is easy to be deteriorated due to overshoot, secondly, the direct current working point is easy to be influenced by process deviation, common mode voltage of input signals and current mismatch, an additional Direct Current Offset Cancellation (DCOC) loop is needed, the complexity of design and area is increased, thirdly, the peak gain of the CTLE needs to be adaptively adjusted for different channel losses, and the accuracy and the robustness of the conventional tuning algorithm based on statistics or peak detection face challenges when the conventional tuning algorithm is applied to the multi-voltage signals. Disclosure of Invention The invention aims to solve the technical problems that the direct current working point of the traditional CTLE is easily affected by process deviation, common-mode voltage of input signals and current mismatch, an additional direct current offset elimination loop is needed, and the design and area complexity are increased, and provides the CTLE which is based on a single amplifier and has direct current offset and common-mode voltage modulation functions. In order to achieve the above purpose, the technical solution provided by the present invention is: the CTLE based on a single amplifier and having direct current offset and common mode voltage modulation functions is characterized in that: the low-pass filter comprises a first-stage equalization unit EQ1, a second-stage equalization unit EQ2, a low-pass filter LPF, a frequency compensation unit and a detuning and common-mode multiplexing amplifier OCMA; The input high end and the input low end of the first-stage equalization unit EQ1 are respectively used for receiving external differential input signals AndThe output high end and the output low end are respectively connected with the input high end and the input low end of the second-stage equalization unit EQ2, and the first-stage equalization unit EQ1 is used for differentially inputting signalsAndPerforming preliminary high-frequency compensation and gain adjustment; the second-stage equalization unit EQ2 is used for performing further high-frequency compensation and gain adjustment on the signal output by the first-stage equalization unit EQ1 to obtain a differential output signal And; The input high end and the input low end of the low pass filter LPF are respectively connected with the output high end and the output low end of the second-stage equalization unit EQ2, and the output high end and the output low end are respectively connected with the input high end and the input low end of the frequency compensation unit; The first output high end and the first output low end of the frequency compensation unit are respectively connected with the input high end and the input low end of the offset and common mode multiplexing amplifier OCMA, and the second output high end and the second output low end are respectively connected with the output high end and the output low end of the offset and common mode multiplexing amplifier OCMA; The output high end and the output low end of the offset and common mode multiplexing amplifier OCMA are respectively connected with the two tail current control ends of the first-stage equalization unit EQ1 through the intermediate buffer stage SF to form a direct current offset elimination loop, and the common mode feedback end of the offset and common mode multiplexing amplifier OCMA is connected with the feedback end of the first-stage equalization unit EQ1 to form a direct current output control loop. Further, the offset and common mode multiplexing amplifier OCMA includes a differential input stage, a cascode gain stage, an output stage, and a common mode feedback stage; th