CN-122026894-A - High-speed high dV/dt immunity level shift circuit based on dynamic pull-down current

CN122026894ACN 122026894 ACN122026894 ACN 122026894ACN-122026894-A

Abstract

The invention relates to the technical field of integrated circuit level shifting, in particular to a low-power-consumption high-speed level shifting circuit based on dynamic pull-down current. The level shift circuit comprises a low-voltage domain and a high-voltage domain where a high-voltage floating power rail is located, wherein the low-voltage domain is provided with a dynamic pull-down current generating circuit, and the high-voltage domain is provided with a level shift circuit electrically connected with the low-voltage domain. When the low-voltage input signal generates level jump, the dynamic pull-down current generating circuit generates larger transient pull-down current in a controlled manner and injects the larger transient pull-down current into a high-voltage domain, the control node of the high-voltage domain is triggered to quickly turn over in a current comparison mode, reliable level shift from the low-voltage signal to a high-voltage floating power rail signal is realized, and the circuit maintains smaller static current during steady state of the input signal, so that the power consumption is remarkably reduced. The scheme gives consideration to high-speed response and low static power consumption, and is suitable for high-voltage isolation, floating driving and mixed voltage system scenes.

Inventors

LIU XUEFEI
LIU MINGQIANG
WANG GANG
GAO CHANGSONG
XU ZIQIANG
WANG ZHEN
WU YAN
LI YA
BI JINSHUN
WANG DEGUI
Erkin Abduvaiti
XIAO WENJUN
WU ZONGGUI
RONG XIAOFENG
Hao le

Assignees

贵州师范大学

Dates

Publication Date: 20260512
Application Date: 20260116

Claims (10)

1. A level shift circuit based on dynamic pull-down current triggering is characterized by comprising a low-voltage domain and a high-voltage domain where a high-voltage floating power rail is positioned, wherein the low-voltage domain and the high-voltage domain realize electric isolation and signal coupling through an isolation structure, The low voltage domain includes a dynamic pull-down current generating circuit for generating a dynamic pull-down current only when a level transition occurs in the low voltage input signal, The high voltage domain includes a level shifting circuit that includes at least one set of control nodes having bistable character, The dynamic pull-down current generating circuit injects the dynamic pull-down current into the control node when the low-voltage input signal jumps, so that the dynamic pull-down current forms transient current unbalance on the control node, thereby triggering the control node to generate state inversion to finish level shift, And during a period when the low-voltage input signal is in a steady state, the dynamic pull-down current generating circuit does not output the dynamic pull-down current, so that the level shifting circuit is in a low static power consumption state.
2. The level shifting circuit of claim 1, wherein the dynamic pull-down current generating circuit comprises a switching transistor controlled by a low voltage input signal, a current mirror structure, and a high voltage isolation device connected to the current mirror structure, the switching transistor to control the current mirror structure to conduct only during transitions of the low voltage input signal.
3. The level shifting circuit of claim 2, wherein the respective branch size ratios of the current mirror structure are set to a fixed ratio relationship such that the dynamic pull-down current output when the switching transistor is turned on is greater than the steady state bias current to shorten the charge-discharge time of the control node.
4. The level shifting circuit of claim 2, wherein the dynamic pull-down current generating circuit further comprises a voltage clamping structure coupled to the high voltage isolation device for limiting a gate-source voltage of the high voltage isolation device to prevent over-voltage stress.
5. An output circuit for improving the anti-interference capability of a level shift circuit under the condition of high voltage change rate is characterized by comprising an edge detection circuit and a latch circuit which are arranged under a high-voltage floating power supply rail, The edge detection circuit outputs a pulse signal only when the high-voltage domain control signal generates an effective level edge change, and does not output the pulse signal when the control signal is in a steady state, The latch circuit changes an output state according to the pulse signal and keeps the output state unchanged during a period when the pulse signal is absent, thereby suppressing an influence of common mode noise caused by a high voltage change rate on the output signal.
6. The output circuit of claim 5 wherein said edge detection circuit includes at least one delay chain of multi-stage inverting units and logic units such that said pulse signal is generated only on either a rising or falling edge of said control signal.
7. The output circuit of claim 5 wherein said latch circuit is of a cross feedback configuration that is only turned over under the action of said pulse signal and maintains its original output state during a change in the potential of said high voltage floating power rail.
8. A node transient compensation circuit for suppressing node disturbance caused by high voltage change rate is characterized by being arranged at a key control node of a high voltage domain and comprising a transient current path which is conducted only when rapid potential change occurs on a high voltage floating power rail, The transient current path is used for providing a fast charge-discharge path for parasitic capacitance of the key control node so as to inhibit disturbance of common mode noise current on the potential of the key control node.
9. The node transient compensation circuit of claim 8, wherein the transient current path is automatically closed when the high voltage floating power rail potential is in a steady state, thereby avoiding an impact on static power consumption.
10. The node transient compensation circuit of claim 8, wherein the node transient compensation circuits are respectively disposed at a plurality of symmetric control nodes corresponding to the level shifting circuit to reduce an overall impact of common mode noise on the level shifting circuit.

Description

High-speed high dV/dt immunity level shift circuit based on dynamic pull-down current Technical Field The invention belongs to the technical field of integrated circuits, and particularly relates to a high-speed high dV/dt immunity level shift circuit based on dynamic pull-down current. Background The level shift circuit is a key circuit module in an analog integrated circuit and is widely applied to a half-bridge driver and a high-voltage BUCK type converter. It is typically used as a transmission bridge between different voltage domains, transferring the potential of the control logic from the low voltage domain to the high voltage domain. For example, in a high-voltage Buck DC-DC (direct current voltage to direct current voltage) converter, the overall circuit is divided into two operating areas, a high-voltage tub area and a low-voltage tub area, as shown in fig. 1. The high-voltage basin area mainly comprises a level shift circuit, a high-side driving circuit and a bootstrap circuit, and the low-voltage basin area mainly comprises a power management circuit, a logic circuit, various protection circuits and the like. Unlike the power supply of the low-voltage basin (usually a fixed voltage below 5V), the high-voltage basin is mainly powered by a floating power supply (VSSH-VDDH), so that the high-side driving circuit belonging to the high-voltage basin can control the on and off of the power switch tube, and the original driving signal for controlling the high-side driving circuit comes from the logic control circuit of the low-voltage basin, which needs to convert the logic signal of the low-voltage basin into the logic signal of the high-voltage basin. The level shift circuit can convert a driving signal to the ground into a driving signal to the high-side floating rail so as to finish the on and off of the power switch tube, so that the level shift circuit is a bridge for connecting the low-voltage basin area and the high-voltage basin area and is an essential key module for a grid driver in an analog integrated circuit. However, the design of the level shift circuit has two main challenges, one is that the trade-off optimization between the transmission delay and the low power consumption is required, and the high transmission delay effect is especially fatal in the high-speed signal scenario. Yet another challenge is the dV/dt (rate of change of voltage over time, e.g., in fig. 1, referring to the change of switching node voltage VSW of Buck converter over time) noise immunity problem generated by the fast switching of the power transistors. If the level shift circuit has low dV/dt noise suppression capability, the reliability of signal transmission is directly affected, and erroneous conduction of the power tube is caused, so that reliability problems must be considered in circuit design. Disclosure of Invention When the existing level shift circuit works under the condition of a high-voltage floating power supply rail, the level shift of a low-voltage signal to a high-voltage domain is generally finished by depending on a continuous bias current or a static voltage threshold trigger mechanism. When the input signal level jumps, the structure has a large parasitic capacitance due to the existence of the high-voltage domain control node, and the charge and discharge processes are slow, so that the level shift transmission delay is large, and the application requirement of high-speed signal transmission is difficult to meet. Meanwhile, under the working condition that the high-voltage floating power rail has rapid potential change, the control node is easily affected by common-mode voltage change, and false triggering or unstable output phenomenon is generated. Therefore, on the premise of not introducing continuous static power consumption and not depending on absolute voltage threshold judgment, how to provide enough driving capability at the moment of input signal jump so as to accelerate the node overturn of a high-voltage domain and ensure that the level shift process can be stable and reliable in a high dV/dt noise environment is a core technical problem to be solved in the prior art. In order to solve the technical problems, the invention provides a level shift circuit based on dynamic pull-down current, which comprises a low-voltage domain and a high-voltage domain, wherein the low-voltage domain is provided with a dynamic pull-down current generating circuit, and the high-voltage domain is provided with a level shift circuit connected with the dynamic pull-down current generating circuit. The dynamic pull-down current generation circuit is used for controllably generating a large dynamic pull-down current when the level jump of the input signal in the low voltage domain occurs, and injecting the large dynamic pull-down current into the level conversion circuit in the high voltage domain so as to trigger the control node in the high voltage domain to overturn in a current comparison mode, th