CN-122026908-A - Analog-to-digital converter and driving chip
Abstract
The disclosure relates to the technical field of integrated circuits, and in particular relates to an analog-to-digital converter and a driving chip, wherein in the analog-to-digital converter, an analog summing circuit is used for receiving input analog voltage and reference voltage transmitted by a reference voltage selection circuit, an output end of the analog summing circuit is connected to an input end of an integrator, a second output end of the integrator is connected to a second input end of a first comparator and a second input end of a second comparator, the reference voltage selection circuit is used for outputting corresponding reference voltage according to comparison results of the first comparator and the second comparator, a digital filtering unit is used for outputting analog-to-digital conversion results according to comparison results of the first comparator and the second comparator, and the first comparator and the second comparator have different offset voltages. The embodiment of the disclosure can reduce quantization noise, improve anti-interference aliasing capability and improve the accuracy of analog-to-digital conversion.
Inventors
- CHEN LEI
- ZHANG WENRONG
- LI XIAO
- LUO PENG
Assignees
- 广东晟矽微电子有限公司
Dates
- Publication Date
- 20260512
- Application Date
- 20260123
Claims (10)
- 1. An analog-to-digital converter is characterized in that the analog-to-digital converter comprises an analog summing circuit, a reference voltage selecting circuit, an integrator, a first comparator, a second comparator and a digital filtering unit, wherein, The analog summing circuit is used for receiving the input analog voltage and the reference voltage transmitted by the reference voltage selecting circuit, The output of the analog summing circuit is connected to the input of the integrator, The first output end of the integrator is connected with the first input end of the first comparator and the first input end of the second comparator, The second output end of the integrator is connected with the second input end of the first comparator and the second input end of the second comparator, The output end of the first comparator and the output end of the second comparator are connected with the control end of the reference voltage selection circuit and the input end of the digital filtering unit, The reference voltage selection circuit is used for outputting corresponding reference voltages according to the comparison results of the first comparator and the second comparator, The digital filter unit is used for outputting an analog-to-digital conversion result according to the comparison results of the first comparator and the second comparator, The first comparator and the second comparator have different offset voltages.
- 2. The analog-to-digital converter of claim 1, wherein the analog summing circuit comprises a first summer, a second summer, wherein, A first input of the first summer is for receiving a positive voltage of the input analog voltage, The second input end of the first summer is used for receiving the first reference voltage or the second reference voltage output by the reference voltage selection circuit, A first input of the second summer is configured to receive a negative voltage of the input analog voltage, The second input end of the second summer is used for receiving the third reference voltage or the fourth reference voltage output by the reference voltage selection circuit.
- 3. The analog-to-digital converter of claim 2, wherein the reference voltage selection circuit comprises a first multiplexer, a second multiplexer, wherein, The control end of the first multiplexer is connected with the output end of the first comparator, The output end of the first multiplexer is connected with the second input end of the first summer, the output end of the first multiplexer is used for outputting the first reference voltage or the second reference voltage according to the comparison result of the first comparator, The control end of the second multiplexer is connected with the output end of the second comparator, The output end of the second multiplexer is connected to the second input end of the second summer, and the output end of the second multiplexer is used for outputting the third reference voltage or the fourth reference voltage according to the comparison result of the second comparator.
- 4. The analog-to-digital converter of claim 3, wherein the offset voltage of the first comparator is a positive offset voltage, wherein, When the difference voltage of the input end of the first comparator is larger than the positive offset voltage, the comparison result of the first comparator is high level, so that the first multiplexer outputs the first reference voltage; When the difference voltage of the input end of the first comparator is smaller than or equal to the positive offset voltage, the comparison result of the first comparator is in a low level, so that the first multiplexer outputs the second reference voltage.
- 5. The analog-to-digital converter of claim 3, wherein the offset voltage of the second comparator is a negative offset voltage, wherein, When the difference voltage of the input end of the second comparator is greater than or equal to the negative offset voltage, the comparison result of the second comparator is high level, so that the second multiplexer outputs the third reference voltage; when the difference voltage of the input end of the second comparator is smaller than the negative offset voltage, the comparison result of the second comparator is in a low level, so that the second multiplexer outputs the fourth reference voltage.
- 6. The analog-to-digital converter of claim 1, wherein the first comparator and the second comparator each comprise a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a first current source, wherein, The gate of the first transistor is used for receiving the positive voltage of the output voltage of the integrator, the gate of the fourth transistor is used for receiving the negative voltage of the output voltage of the integrator, The first end of the first transistor, the first end of the second transistor, the first end of the third transistor and the first end of the fourth transistor are connected to a power supply voltage through the first current source, The first terminal of the fifth transistor and the first terminal of the sixth transistor are each configured to receive a supply voltage, The grid electrode of the second transistor is used for being connected with a first preset reference voltage, the grid electrode of the third transistor is used for being connected with a second preset reference voltage, A second end of the first transistor, a second end of the second transistor, a drain and a gate of the seventh transistor, a drain and a gate of the eighth transistor, and a gate of the twelfth transistor are connected, A second end of the third transistor, a second end of the fourth transistor, a drain and a gate of the ninth transistor, a drain and a gate of the tenth transistor, and a gate of the eleventh transistor are connected, A second end of the fifth transistor, a gate of the sixth transistor, and a drain of the eleventh transistor are connected, A second terminal of the sixth transistor is connected to the drain of the twelfth transistor, The source of the seventh transistor, the source of the eighth transistor, the source of the ninth transistor, the source of the tenth transistor, the source of the eleventh transistor, and the source of the twelfth transistor are all grounded.
- 7. The analog-to-digital converter of claim 6, wherein the analog-to-digital converter comprises, For the first comparator, the first preset reference voltage is a negative reference voltage, and the second preset reference voltage is a positive reference voltage; For the second comparator, the first preset reference voltage is a positive reference voltage, and the second preset reference voltage is a negative reference voltage.
- 8. The analog-to-digital converter according to claim 6 or 7, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are PMOS transistors, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor are NMOS transistors, The first ends of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are sources or drains, and the second ends of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are drains or sources.
- 9. The analog-to-digital converter of claim 1, wherein the analog-to-digital converter is a Sigma-Delta analog-to-digital converter.
- 10. A driver chip, characterized in that the driver chip comprises an analog-to-digital converter according to any of claims 1-9.
Description
Analog-to-digital converter and driving chip Technical Field The disclosure relates to the technical field of integrated circuits, and in particular relates to an analog-to-digital converter and a driving chip. Background The ADC (analog-to-digital converter) is used for converting an analog signal of a natural environment into a digital signal which can be identified by a machine, and the Sigma-Delta analog-to-digital converter in the ADC can achieve an accuracy of more than 16 bits, so that the ADC is widely used. The output of the integrator of the traditional Sigma-Delta analog-digital converter fluctuates greatly, so that the defects of high power consumption, high quantization noise level and poor anti-interference capability are caused, and the loop is continuous in operation, so that the output of the comparator always turns over when the input signal of the comparator (the output of the integrator) is particularly small, the feedback of the loop causes the output of the integrator to always change the integrating direction, in addition, the possibility of erroneous judgment of the output of the comparator exists when the input signal of the comparator (the output of the integrator) is particularly small, the fluctuation of the output of the integrator is large, the quantization noise is large, and the digital filter normally processes the data, so that the loss of precision is caused. Therefore, it is necessary to provide an analog-to-digital converter with high accuracy and high anti-interference capability. Disclosure of Invention In view of this, the present disclosure proposes an analog-to-digital converter comprising an analog summing circuit, a reference voltage selection circuit, an integrator, a first comparator, a second comparator and a digital filtering unit, wherein, The analog summing circuit is used for receiving the input analog voltage and the reference voltage transmitted by the reference voltage selecting circuit, The output of the analog summing circuit is connected to the input of the integrator, The first output end of the integrator is connected with the first input end of the first comparator and the first input end of the second comparator, The second output end of the integrator is connected with the second input end of the first comparator and the second input end of the second comparator, The output end of the first comparator and the output end of the second comparator are connected with the control end of the reference voltage selection circuit and the input end of the digital filtering unit, The reference voltage selection circuit is used for outputting corresponding reference voltages according to the comparison results of the first comparator and the second comparator, The digital filter unit is used for outputting an analog-to-digital conversion result according to the comparison results of the first comparator and the second comparator, The first comparator and the second comparator have different offset voltages. In one possible implementation, the analog summing circuit includes a first summer, a second summer, wherein, A first input of the first summer is for receiving a positive voltage of the input analog voltage, The second input end of the first summer is used for receiving the first reference voltage or the second reference voltage output by the reference voltage selection circuit, A first input of the second summer is configured to receive a negative voltage of the input analog voltage, The second input end of the second summer is used for receiving the third reference voltage or the fourth reference voltage output by the reference voltage selection circuit. In one possible implementation, the reference voltage selection circuit includes a first multiplexer, a second multiplexer, wherein, The control end of the first multiplexer is connected with the output end of the first comparator, The output end of the first multiplexer is connected with the second input end of the first summer, the output end of the first multiplexer is used for outputting the first reference voltage or the second reference voltage according to the comparison result of the first comparator, The control end of the second multiplexer is connected with the output end of the second comparator, The output end of the second multiplexer is connected to the second input end of the second summer, and the output end of the second multiplexer is used for outputting the third reference voltage or the fourth reference voltage according to the comparison result of the second comparator. In one possible implementation, the offset voltage of the first comparator is a positive offset voltage, wherein, When the difference voltage of the input end of the first comparator is larger than the positive offset voltage, the comparison result of the first comparator is high level, so that the first multiplexer outputs the first reference voltage; When the difference voltage of the input end of the first compa