CN-122026914-A - Mixed signal acquisition and processing system and method of modularized design

CN122026914ACN 122026914 ACN122026914 ACN 122026914ACN-122026914-A

Abstract

The invention discloses a mixed signal acquisition and processing system and method of modularized design, belonging to the technical field of mixed signal acquisition, wherein the system comprises a core board, a base board and a pluggable module, a programmable clock unit and a sampling trigger and data channel are arranged on the base board, a DSP algorithm module, a storage and calibration management module and a peripheral output interface are arranged on the core board, the programmable clock unit is used for generating a reference clock, the sampling trigger and data channel is used for receiving signals input by the pluggable module, the DSP algorithm module is used for performing time domain and frequency domain processing on sampling data, the storage and calibration management module is used for storing configuration parameters, calibration data and operation logs, the pluggable module is used for realizing input conditioning or output conversion of the signals, and the peripheral output interface is used for providing a control and synchronization interface for an external device. The invention can improve the signal processing precision and the real-time processing capability, reduce the system cost, improve the maintenance convenience and has applicability.

Inventors

Han Wenle
MA YINGLUN
ZHENG XU
CHENG MINGJIAN

Assignees

西安电子科技大学

Dates

Publication Date: 20260512
Application Date: 20260415

Claims (10)

1. The mixed signal acquisition and processing system with the modularized design is characterized by comprising a core board, a bottom board and a pluggable module, wherein a programmable clock unit and a sampling triggering and data channel are arranged on the bottom board, a DSP algorithm module, a storage and calibration management module and a peripheral output interface are arranged on the core board, and the mixed signal acquisition and processing system is characterized in that: The programmable clock unit is used for generating a reference clock and providing a clock reference for the sampling trigger and data channel, the sampling trigger and data channel is used for receiving signals input by the pluggable module, realizing synchronous sampling of the signals under the clock reference provided by the programmable clock unit and transmitting sampled data to the DSP algorithm module, and the DSP algorithm module is used for carrying out time domain and frequency domain processing comprising self-adaptive sampling adjustment, filtering, frequency domain transformation and phase and frequency correction on the sampled data; the storage and calibration management module is used for storing configuration parameters, calibration data and operation logs, and loading the configuration parameters and the calibration data when the system operates; The pluggable module is used for realizing input conditioning or output conversion of signals and supporting automatic identification and dynamic binding, and the peripheral output interface is used for providing a control and synchronization interface for an external device and realizing synchronous output of signals.
2. The modular design of the mixed signal acquisition and processing system of claim 1, wherein the programmable clock unit employs a Si5351 clock chip, the Si5351 clock chip supporting PLL/Multisynth parameter computation and configuration capable of providing adjustable frequency output and phase bias, the clock configuration of the Si5351 clock chip and DSP algorithm module forming closed loop regulation.
3. The system of claim 1, wherein the sampling trigger and data channel comprises a timer, an ADC and a DMA, the timer is configured to divide and count based on a reference clock of the programmable clock unit, and is configured to generate a hardware trigger signal to drive the ADC to sample, the ADC samples a signal input by the pluggable module under the action of the hardware trigger signal, the sampled data is transmitted to the core board through the DMA, and the DSP algorithm module is notified through an event or callback after the transmission is completed.
4. The system of claim 1, wherein the adaptive sampling adjustment of the DSP algorithm module employs a first stage and a second stage, wherein the first stage and the second stage follow sampling theorem and anti-aliasing filtering requirements and constrain an adjustment rate.
5. The system of claim 4, wherein the first stage performs fast spectrum estimation by sampling with a short time window to obtain a main spectrum characteristic of the signal, and the second stage calculates an optimized sampling parameter or a reference clock parameter based on the spectrum characteristic, re-samples the sample after applying the optimized parameter, and compensates for the inter-channel phase.
6. The system of claim 1, wherein the pluggable module comprises an input module and an output module, wherein the pluggable module is configured with identification information, and the core board identifies the module type by reading the identification information, and searches the corresponding calibration data and configuration parameters from the storage and calibration management module, and binds the calibration data and configuration parameters to the corresponding sampling or signal processing entity during operation.
7. The system for acquiring and processing the mixed signal with the modularized design according to claim 1, wherein the storage and calibration management module is used for storing configuration parameters, calibration data and operation logs by adopting an SD card and FatFS file system, and supports degradation and fault tolerance strategies in a hot plug scene, and the loadable performance of core configuration data is ensured when a storage medium is abnormal.
8. The system of claim 1, wherein the data processing flow of the DSP algorithm module comprises original quantized sampled data, calibration and linear scaling, time domain prefiltering, window function processing and frequency domain transformation, amplitude/phase computation and peak detection, and output of the result to a memory module or a peripheral output interface; the time domain pre-filtering adopts an FIR filter or a cascaded second-order IIR filter, the frequency domain transformation adopts FFT operation, and the DSP algorithm module integrates ARM CMSIS-DSP library for accelerating operation.
9. The modular design mixed signal acquisition and processing system according to claim 1, wherein the peripheral output interface provides a driving interface for an external DDS device, the driving interface supports synchronization with a reference clock of a programmable clock unit through an IO-UPDATE signal, the external DDS device comprises an AD9910, three analog input module connection areas, two analog output module connection areas, a special module connection area and a power supply interface are arranged on the base plate, the power supply interface comprises a digital interface and an analog interface, KF2EDG connectors are adopted for the power supply interface, and two XH2.54 interfaces are reserved for communication with other devices or serial ports.
10. A method for acquiring and processing a mixed signal in a modular design, which adopts the mixed signal acquiring and processing system in a modular design as claimed in any one of claims 1 to 9, comprising the steps of: s1, identifying identification information of a pluggable module after the system is started, and calling corresponding configuration parameters and calibration data from a storage medium based on the identification information to complete dynamic binding of the pluggable module and the system; S2, configuring a programmable clock unit, enabling the programmable clock unit to generate a reference clock, and providing a clock reference for sampling triggering and a data channel; S3, under the reference of a reference clock, synchronous sampling is carried out on signals conditioned or converted by the pluggable module by the sampling trigger and the data channel, and sampling data are transmitted to the DSP algorithm module; S4, performing time domain and frequency domain processing including self-adaptive sampling adjustment, filtering processing, frequency domain transformation and phase and frequency correction on the received sampling data by utilizing a DSP algorithm module; s5, storing the time domain and frequency domain processing results and the system operation log into a storage medium, and providing control signals and synchronization signals for external devices through an external output interface to realize synchronous output of signals.

Description

Mixed signal acquisition and processing system and method of modularized design Technical Field The invention belongs to the technical field of mixed signal acquisition, and particularly relates to a mixed signal acquisition and processing system and method with a modularized design. Background Many low-end or early designs are designed to interrupt or poll the control ADC (Analog to Digital Converter, analog-to-digital converter) at present, which has the advantages of simple implementation, but poor channel-to-channel synchronization, high occupation of CPU (Central Processing Unit ), no guarantee of real-time and consistency, and no support for high-precision multichannel synchronous measurement. These methods are effective for general spectral analysis, but still limited to accurate measurements of near-fundamental frequency or narrow-band, and the frequency index offset problem cannot be fundamentally solved, in order to maintain a constant sampling rate and suppress spectral leakage through a window function, or to increase display resolution with zero padding. Currently, si5351 (Silicon Labs, programmable clock generator chip) is commonly used to provide reference clock and phase control to improve clock accuracy, but most of the implementation only configures the clock statically, and the clock configuration and sampling frequency estimation are not closed-loop regulated, so that it is difficult to dynamically optimize coherent sampling conditions in the measurement process. At present, CMSIS (Cortex Microcontroller Software INTERFACE STANDARD, a microcontroller software interface standard) is utilized to realize FFT (Fast Fourier Transform )/IIR (Infinite Impulse Response Filter, infinite impulse response filter) on STM32H7 (schematic semiconductors, STMicroelectronics, high-performance microcontroller series) and other platforms, real-time requirements can be met at a certain scale, but the real-time requirements are limited by memory (large window FFT) and computing resources, and the incoherence of a sampling domain cannot be compensated by simple software optimization. The existing modularized design realizes mechanical and power interfaces, but the cooperative realization of automatic identification, dynamic binding and clock/sampling synchronization mechanisms at the software side is insufficient, and synchronous measurement and calibration loading after plug-and-play on site often depend on manual or special processes. The current multichannel mixed signal acquisition and processing system has a plurality of common defects of limiting performance and usability in engineering application. Many schemes rely on software polling or interrupt triggering, failing to accurately align Ji Duolu ADCs at the hardware level, resulting In inter-channel phase and amplitude measurement errors, particularly In IQ (In-phase and Quadrature, in-phase/quadrature signal) measurement and phase sensitive applications. Secondly, the FFT frequency point and the signal main frequency are easily misplaced by a fixed sampling rate or a clock which cannot be finely adjusted, so that spectrum leakage and frequency estimation offset are generated, and a longer sampling window is generally required for improving the frequency resolution, so that response delay and higher memory occupation are brought. Accurate phase and programmable reference clocks typically rely on expensive or complex hardware, increasing system cost and reducing versatility. High throughput FFT, band-pass FIR (Finite Impulse Response Filter ) and cascaded IIR are implemented on a resource constrained MCU (Microcontroller Unit, microcontroller) without algorithm cooperation with hardware, which can cause processing bottlenecks or require sacrificing accuracy. The integrated board card is difficult to replace the functional module rapidly, and lacks an automatic loading calibration and configuration mechanism, so that the maintenance cost is high and the repeatability is poor. Finally, when integrated with devices such as external high-precision DDS (DIRECT DIGITAL Synthesizer ), the system lacks a uniform and synchronizable driving and control interface, increases the complexity of system integration and affects the synchronization performance. In the comprehensive view, in the current multi-channel mixed signal acquisition and processing, sampling synchronism is insufficient, accurate phases and programmable reference clocks depend on complex hardware, cost and universality are required to be optimized, and real-time frequency domain and time domain processing of an embedded end is not convenient enough. Disclosure of Invention The invention provides a mixed signal acquisition and processing system and method with a modularized design, and aims to solve the problems that in the existing multi-channel mixed signal acquisition and processing, sampling synchronism is insufficient, accurate phase and a programmable reference clock depend on complex hardwar