CN-122026983-A - Small loop comparison method for high-speed uplink signals in satellite communication

CN122026983ACN 122026983 ACN122026983 ACN 122026983ACN-122026983-A

Abstract

The invention provides a small loop comparison method for high-speed uplink signals in satellite communication, which enables the high-speed uplink signals to be normally locked by a demodulator after radio frequency closed loop through sending an AOS idle frame, wherein after a demodulation link is stably locked, a modulation data source starts to send normal uplink data, a virtual channel identifier in the uplink data is inconsistent with a virtual channel identifier of the idle frame, the encoded uplink data frame is stored in a DDR FIFO, when the DDR operation is idle, the DDR operation is started and written in the DDR, after a certain amount of data frames are written, part of data can be read in the DDR read FIFO in advance, when the demodulation data frame is uplink data, the data are sequentially read from the inside of the FIFO and compared with the demodulation data, and when the data in the FIFO buffer data are less, the subsequent data can be automatically read from the DDR in sequence according to the last reading address.

Inventors

YANG CHENGWU
LI SIJIA
Xu Huangxia
ZHENG JIANJUN
ZHANG TINGYUAN
LIU XIANGNAN
LUO XIA

Assignees

北京遥测技术研究所

Dates

Publication Date: 20260512
Application Date: 20251224

Claims (10)

1. A small loop comparison method for high-speed uplink signals in satellite communication is characterized by comprising the following steps: S1, taking AOS idle frame data locally generated by a satellite as a data source, enabling a demodulator of the satellite to lock a high-speed uplink signal after radio frequency closed loop by sending the AOS idle frame data, and starting to send a normal high-speed uplink signal by a ground modulation data source after a demodulation link is stably locked; The virtual channel identifier of the AOS idle frame data is different from the virtual channel identifier in the high-speed uplink signal; s2, the satellite network receives normal high-speed uplink data frames; s3, when the satellite network does not receive the high-speed uplink data, performing signal processing on the AOS idle frame data to obtain signal processed data; when the satellite network receives the high-speed uplink data, the high-speed uplink data is subjected to signal processing to obtain signal processed data; The modulation of the data after the signal processing enters a step S4, and the writing of the data frame enters a step S6; s4, modulating the signal processed data to obtain a modulated signal; s5, sending the modulated signal into a high-speed small loop link, performing digital-to-analog conversion, outputting an analog signal, and entering a step S9; S6, judging whether the current frame is the high-speed uplink data or the AOS idle frame through the virtual channel identifier field of the data after the signal processing; Writing the data into DDR write FIFO when judging that the data after signal processing is a high-speed uplink data frame; S7, when the DDR does not have a read operation currently and data frames exist in the DDR write FIFO or no new data frames exist in the designated time to be written into the FIFO, writing the data in the DDR write FIFO into the DDR at one time; S8, when the DDR does not have write operation at present and the DDR has written effective data frames, starting pre-reading, and firstly reading partial data of the DDR into a DDR read FIFO; Step S11 is entered; S9, receiving the analog signal, performing analog-to-digital conversion and demodulating the sampled data to obtain a demodulation frame; s10, judging whether the demodulation frame is a non-AOS idle frame or not according to the virtual channel identifier, if so, judging that the demodulation frame is a high-speed uplink data frame and outputting the high-speed uplink data frame to a small ring comparison module, and entering a step S12; S11, reading data from the DDR read FIFO and outputting the data to the small loop comparison module; and S12, the small loop comparison module compares the data read from the read FIFO with the demodulation frame in real time and outputs a comparison result, wherein the comparison result is a small loop comparison result of the high-speed uplink signal.
2. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 1, wherein in step S1, the filling content of AOS idle frame data is settable; In step S3, the data processing method includes scrambling and encoding.
3. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 2, wherein the codes in step S3 are LDPC codes, and the modulation system in step S4 is 16QAM.
4. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 1, wherein in step S8, when the valid data bytes in DDR are greater than a threshold value, reading the threshold value bytes into DDR read FIFO, and when the valid data bytes in DDR are less than or equal to the threshold value, reading the valid data into DDR read FIFO; In step S11, when the data size byte in the DDR read FIFO is smaller than the threshold value, the data is quickly read from the DDR and written into the DDR read FIFO.
5. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 4, wherein the threshold is 32768.
6. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 1, wherein said AOS idle frame data is a CCSDS-AOS frame; The frame format of the AOS idle frame data comprises a synchronous head, a VCDU main guide head and a VCDU data unit area which are sequentially arranged; The VCDU main header comprises a version number, a VCDU identifier, a VCDU counter and a signal domain which are sequentially arranged, wherein the VCDU identifier comprises a spacecraft identifier and a virtual channel identifier, and the signal domain comprises a playback mark and a standby area.
7. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 6, wherein said VCDU primary pilot further comprises a VCDU pilot error control field disposed at a rear of said signal field.
8. The method for small loop comparison of high speed uplink signals in satellite communications of claim 6, wherein said AOS idle frame data further comprises a VCDU insert field disposed between said VCDU primary header and said VCDU data unit region.
9. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 6, wherein said AOS idle frame data further comprises a VCDU word tail and a channel coding check field sequentially arranged at the rear of said VCDU data unit region, said VCDU word tail comprises an operation control field and a VCDU error control field sequentially arranged.
10. The method for small loop comparison of high speed uplink signals in satellite communication according to claim 1, wherein the modulation parameters in step S4 and step S5 are in one-to-one correspondence with the demodulation parameters in step S9; in step S5, the high-speed small loop link is a radio frequency closed loop link, and includes an intermediate frequency matrix, a first optical transceiver, an up-converter, a down-converter, a second optical transceiver, and an intermediate frequency matrix.

Description

Small loop comparison method for high-speed uplink signals in satellite communication Technical Field The invention relates to the technical field of satellites, in particular to a small loop comparison method for high-speed uplink signals in satellite communication. Background In satellite communication systems, the uplink serves as a key element for the ground station to transmit signals to the satellite, and its transmission rate and reliability directly affect the performance of the overall system. In particular, the demand for high-speed uplink signals is particularly urgent in the fields of satellite internet, emergency communication, internet of things, industrial automation and the like. For example, in satellite internet service, users need not only high bandwidth of downlink but also enough rate of uplink to support bidirectional interaction, in emergency communication scenario, high-speed uplink can upload field data and images faster to fight for valuable time for rescue action, while in scientific detection and specific application, high-speed uplink is a core support for guaranteeing real-time data return. Therefore, aiming at the requirement of the satellite high-speed uplink signal, development of reliability and integrity verification of the transmission of the high-speed uplink signal is needed, and a solid foundation is laid for upgrading and developing a future satellite communication system. The Chinese patent with publication number CN114327625B discloses a method and a system for determining the instruction sending state of a spacecraft, and the method provides a small loop information comparison method and a state determination system for the instruction codes of the spacecraft, which can only meet the determined use requirement of a ground control center for sending a remote control instruction to the spacecraft, but do not support the small loop comparison scene of high-speed uplink signals. The invention discloses a testing device for inter-satellite chain measurement and control data transmission signals, which can meet the functions of test receiving and small ring comparison of data transmission receiving and measurement and control signals in a time sharing manner, but does not support small ring comparison of high-speed uplink signals. The paper (Zhou Chenggang, on-board measurement and control system remote control small ring error analysis and solution [ J ], "aircraft measurement and control school newspaper") establishes a relation model between remote control subcarrier receiving and transmitting phase delay and data demodulation for a remote control device in a certain type of on-board measurement and control system, and provides an improved design scheme, which realizes the real-time monitoring capability of remote control command transmitting state information, but does not have the small ring real-time comparison capability of high-speed uplink signals. Therefore, there is a need for a small loop alignment method for high speed uplink signals in satellite communications. Disclosure of Invention The invention provides a small loop comparison method for high-speed uplink signals in satellite communication, which aims to solve the reliability and integrity verification problem of high-speed uplink signal transmission, and can realize real-time small loop comparison of the high-speed uplink signals by reasonably designing a high-speed data read-write control logic of a high-speed uplink idle frame format and DDR, detect the correctness and integrity of the transmitted high-speed uplink signals and support 2Gbps at most. The invention provides a small loop comparison method for high-speed uplink signals in satellite communication, which comprises the following steps: S1, taking AOS idle frame data locally generated by a satellite as a data source, enabling a demodulator of the satellite to lock a high-speed uplink signal after radio frequency closed loop by sending the AOS idle frame data, and starting to send a normal high-speed uplink signal by a ground modulation data source after a demodulation link is stably locked; the virtual channel identifier of the AOS idle frame data is different from the virtual channel identifier in the high-speed uplink signal; s2, the satellite network receives normal high-speed uplink data frames; s3, when the satellite network does not receive the high-speed uplink data, performing signal processing on the AOS idle frame data to obtain signal processed data; when the satellite network receives the high-speed uplink data, the high-speed uplink data is subjected to signal processing to obtain signal processed data; The modulation of the data after signal processing enters step S4, and the writing of the data frame enters step S6; S4, modulating the data after signal processing to obtain a modulated signal; S5, sending the modulated signal into a high-speed small loop link, performing digital-to-analog conversion, outputting an analog signal