CN-122026985-A - PCIe XDMA-based broadband satellite terminal data transmission method

Abstract

The invention belongs to the technical field of broadband satellite terminal data transmission processing, and particularly relates to a PCIe XDMA-based broadband satellite terminal data transmission method capable of realizing high-speed and low-speed data exchange through a PCIe interface and an AXI bus. The invention is a data exchange method between satellite signal processing unit and information processing unit in broadband satellite terminal, realize high-speed, low-speed data exchange through PCIe interface and AXI bus specifically, use DMA Bridge to turn PCIe bus into AXI bus, realize signal processing unit and information processing unit Bridge, the bus mounts the high-speed, low-speed apparatus at the same time, have visit the high-speed apparatus through DMA, visit the ability of the low-speed apparatus through Lite bus, and distinguish a plurality of different apparatuses through AXI bus address to realize flexible expansion ability.

Inventors

• LV GUOCHENG
• DONG MINGKE
• DUAN ZHONGXIONG
• JIN YE

Assignees

• 北京大学

Dates

Publication Date

20260512

Application Date

20251226

Claims (5)

1. 1. The broadband satellite terminal data transmission method based on PCIe XDMA is characterized in that a signal processing unit of the satellite terminal is realized by adopting an FPGA, an information processing unit is realized by adopting an embedded CPU, and the FPGA is connected with the embedded CPU through a PCIe interface, and the method comprises the following steps: Generating XDMA cores in an FPGA, converting PCIe interface protocol into AXI bus protocol, wherein the XDMA cores provide standard AXI bus and AXI Lite bus; Mounting high-speed data transmission equipment by using the standard AXI bus, wherein the high-speed data transmission equipment is a storage unit constructed based on an asynchronous dual-port RAM and is used for processing uplink data and downlink data of a satellite terminal respectively; Mounting low-speed data transmission equipment by using the AXI Lite bus, wherein the low-speed data transmission equipment is used for carrying out working parameter configuration and running state acquisition; when data exchange is carried out, the embedded CPU is informed to initiate DMA read-write operation by triggering PCIe interrupt, and when the interrupt trigger condition is met, the FPGA sends an interrupt request to the embedded CPU.
2. 2. The method of claim 1, wherein the asynchronous dual port RAM-based memory cell is constructed by allocating independent asynchronous dual port RAMs for the uplink and the downlink, respectively, the write-in port of the uplink RAM and the read-out port of the downlink RAM are connected to the embedded CPU, the read-out port of the uplink RAM and the write-in port of the downlink RAM are connected to the FPGA, and when a data packet is stored in the dual port RAM, the power of 2, which is close to the maximum packet length, is used as a memory boundary, and the actual length of the data packet is identified by using specific bytes at the start position of the data packet.
3. 3. The method according to claim 1 or 2, wherein the interrupt trigger condition comprises a buffered data amount exceeding a preset threshold or a data write timer timeout.
4. 4. The method according to claim 1 or 2, wherein when allocating buffer capacity for the dual port RAM of the uplink and the downlink, respectively, the calculation and allocation are performed according to the interrupt response time of the embedded CPU, the data transmission rate of the corresponding link, and reserving the buffer redundancy space.
5. 5. The method of claim 1, wherein the operational state obtained through the axilite bus includes a data storage depth of a dual port RAM, a read-write pointer, and an interrupt state vector.

Description

PCIe XDMA-based broadband satellite terminal data transmission method Technical Field The invention belongs to the technical field of broadband satellite terminal data transmission processing, and particularly relates to a PCIe XDMA-based broadband satellite terminal data transmission method. Background The satellite communication terminal is a key device in the satellite communication device, and the core of the key device is data exchange between the ground and the satellite. For the satellite downlink, the satellite terminal receives the frequency conversion signals processed by the antenna feed unit, and recovers the original information after quadrature frequency conversion, baseband signal demodulation/decoding and network protocol conversion, and for the satellite uplink, the satellite terminal receives network data to package the data according to the satellite air interface standard, and sends the data to the antenna feed unit to transmit after baseband coding and modulation and quadrature frequency conversion. The signal processing unit mainly realizes baseband signal and quadrature frequency conversion processing, and is usually completed in an FPGA, and the information processing unit mainly completes protocol conversion and the like, and is usually realized in an embedded CPU. The signal processing unit and the information processing unit realize data exchange through data transmission. The data exchange process is also a key part of the satellite terminal, and the working performance of the data exchange process also determines the processing capacity of the whole satellite terminal. The embedded CPU has various buses and interfaces to complete the data interaction with the FPGA, wherein some low-speed buses such as I2C, SPI, UART can only complete the data interaction with lower speed, and higher-speed interfaces such as expansion buses of the CPU, ethernet interfaces, PCI/PCIe and the like are needed for higher-speed data exchange. The expansion bus protocol is relatively simple, the exchange rate depends on the clock frequency of the expansion bus, but due to the adoption of parallel data transmission, the data transmission of hundreds of Mbps is difficult to achieve, the expansion bus is often related to the framework of a CPU, synchronous adjustment is needed in product upgrading iteration, an Ethernet interface has the data transmission capability of Gbps, the interface is relatively simple, a relatively complex Ethernet transmission protocol needs to be processed in an FPGA, PCIe adopts serial transmission, the interface is simple, the data throughput is high, an x1 interface can achieve data transmission of up to 7.563 GB/s in the PCIe 6.0 standard, a high-performance FPGA and an embedded CPU support PCIe interfaces, and PCIe replaces PCI to become a main stream bus in high-speed application. With deployment and application of multi-point wave beams and high-capacity satellites, higher requirements are put on signal processing and protocol conversion capability of satellite terminals, transmission bandwidth is increased to tens of MHz to hundreds of MHz, and higher requirements are put on data exchange processing capability. In addition, as a key part of the satellite terminal, it is particularly important that the data exchange processing keeps the interface and the processing mode stable in the iterative updating process of the product, and meanwhile, the data exchange processing also has a certain expansion capability. As can be seen, satellite terminals are typically composed of a satellite signal processing unit and an information processing unit. The satellite signal processing unit mainly completes intermediate frequency and baseband signal processing, and is usually realized by a high-capacity FPGA, and the information processing unit mainly completes protocol processing, and is usually realized by an embedded CPU. The data transmission process is used as a bridge for interaction between the satellite signal processing unit and the information processing unit, is a core part in satellite terminal processing, and has typical asymmetric characteristics due to the transmission characteristics of a satellite link, and the transmission bandwidth of a downlink is generally higher than that of an uplink. With deployment application of multi-point wave beams and high-capacity satellites, satellite communication develops to higher frequency bands and higher bandwidths, and processing capacity, expandability and product iteration upgrading capacity of satellite terminals put forward higher requirements, and communication bandwidths supported by the satellite terminals develop from tens of MHz to hundreds of MHz, so that the satellite terminals are required to have higher-speed data exchange capacity. In addition, the method has the low-speed data exchange capability of monitoring the state of equipment, configuring parameters and the like besides finishing high-speed data exchange, and m